GB8909668D0 - Look-ahead flag generation in a memory store - Google Patents

Look-ahead flag generation in a memory store

Info

Publication number
GB8909668D0
GB8909668D0 GB898909668A GB8909668A GB8909668D0 GB 8909668 D0 GB8909668 D0 GB 8909668D0 GB 898909668 A GB898909668 A GB 898909668A GB 8909668 A GB8909668 A GB 8909668A GB 8909668 D0 GB8909668 D0 GB 8909668D0
Authority
GB
United Kingdom
Prior art keywords
look
memory store
flag generation
ahead flag
ahead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB898909668A
Other versions
GB2231981A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
STC PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STC PLC filed Critical STC PLC
Priority to GB8909668A priority Critical patent/GB2231981A/en
Publication of GB8909668D0 publication Critical patent/GB8909668D0/en
Publication of GB2231981A publication Critical patent/GB2231981A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
GB8909668A 1989-04-27 1989-04-27 Memory read/write arrangement Withdrawn GB2231981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8909668A GB2231981A (en) 1989-04-27 1989-04-27 Memory read/write arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8909668A GB2231981A (en) 1989-04-27 1989-04-27 Memory read/write arrangement

Publications (2)

Publication Number Publication Date
GB8909668D0 true GB8909668D0 (en) 1989-06-14
GB2231981A GB2231981A (en) 1990-11-28

Family

ID=10655837

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8909668A Withdrawn GB2231981A (en) 1989-04-27 1989-04-27 Memory read/write arrangement

Country Status (1)

Country Link
GB (1) GB2231981A (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665416A (en) * 1969-10-09 1972-05-23 Mitsuo Hikosaka On-line real time data processing system
US3680055A (en) * 1970-07-06 1972-07-25 Burroughs Corp Buffer memory having read and write address comparison for indicating occupancy
US3836891A (en) * 1973-07-05 1974-09-17 Bendix Corp Tape reader system with buffer memory
JPS5766515A (en) * 1980-10-13 1982-04-22 Victor Co Of Japan Ltd Memory address control system
US4884069A (en) * 1987-03-19 1989-11-28 Apple Computer, Inc. Video apparatus employing VRAMs

Also Published As

Publication number Publication date
GB2231981A (en) 1990-11-28

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)