GB8631061D0 - Electrical circuit arrangements - Google Patents

Electrical circuit arrangements

Info

Publication number
GB8631061D0
GB8631061D0 GB868631061A GB8631061A GB8631061D0 GB 8631061 D0 GB8631061 D0 GB 8631061D0 GB 868631061 A GB868631061 A GB 868631061A GB 8631061 A GB8631061 A GB 8631061A GB 8631061 D0 GB8631061 D0 GB 8631061D0
Authority
GB
United Kingdom
Prior art keywords
electrical circuit
circuit arrangements
arrangements
electrical
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB868631061A
Other versions
GB2199470B (en
GB2199470A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales Contact Solutions Ltd
Original Assignee
Racal Recorders Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Racal Recorders Ltd filed Critical Racal Recorders Ltd
Priority to GB8631061A priority Critical patent/GB2199470B/en
Publication of GB8631061D0 publication Critical patent/GB8631061D0/en
Publication of GB2199470A publication Critical patent/GB2199470A/en
Application granted granted Critical
Publication of GB2199470B publication Critical patent/GB2199470B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
GB8631061A 1986-12-31 1986-12-31 Electrical circuit arrangements Expired - Lifetime GB2199470B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8631061A GB2199470B (en) 1986-12-31 1986-12-31 Electrical circuit arrangements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8631061A GB2199470B (en) 1986-12-31 1986-12-31 Electrical circuit arrangements

Publications (3)

Publication Number Publication Date
GB8631061D0 true GB8631061D0 (en) 1987-02-04
GB2199470A GB2199470A (en) 1988-07-06
GB2199470B GB2199470B (en) 1991-01-30

Family

ID=10609693

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8631061A Expired - Lifetime GB2199470B (en) 1986-12-31 1986-12-31 Electrical circuit arrangements

Country Status (1)

Country Link
GB (1) GB2199470B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2277659B (en) * 1993-04-15 1998-01-21 Miles Consultants Limited Transmitting digital signals
DE4426713C2 (en) * 1994-07-21 1997-03-27 Siemens Ag Method for measuring the phase jitter of a data signal
JP3481422B2 (en) 1997-05-23 2003-12-22 シャープ株式会社 Digital recording and playback device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4005477A (en) * 1975-11-24 1977-01-25 International Business Machines Corporation Phase equalized readback apparatus and methods
CH604425A5 (en) * 1975-12-31 1978-09-15 Ibm
EP0153107A3 (en) * 1984-02-10 1987-02-04 Prime Computer, Inc. Clock recovery apparatus and method for a ring-type data communications network
US4615037A (en) * 1985-01-29 1986-09-30 Ampex Corporation Phase scatter detection and reduction circuit and method

Also Published As

Publication number Publication date
GB2199470B (en) 1991-01-30
GB2199470A (en) 1988-07-06

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19971231