GB8630540D0 - External memory controller - Google Patents

External memory controller

Info

Publication number
GB8630540D0
GB8630540D0 GB868630540A GB8630540A GB8630540D0 GB 8630540 D0 GB8630540 D0 GB 8630540D0 GB 868630540 A GB868630540 A GB 868630540A GB 8630540 A GB8630540 A GB 8630540A GB 8630540 D0 GB8630540 D0 GB 8630540D0
Authority
GB
United Kingdom
Prior art keywords
memory controller
external memory
external
controller
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB868630540A
Other versions
GB2184580A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of GB8630540D0 publication Critical patent/GB8630540D0/en
Publication of GB2184580A publication Critical patent/GB2184580A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
GB08630540A 1985-12-23 1986-12-22 External memory controller Withdrawn GB2184580A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60287965A JPS62147548A (en) 1985-12-23 1985-12-23 External storage controller

Publications (2)

Publication Number Publication Date
GB8630540D0 true GB8630540D0 (en) 1987-02-04
GB2184580A GB2184580A (en) 1987-06-24

Family

ID=17724042

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08630540A Withdrawn GB2184580A (en) 1985-12-23 1986-12-22 External memory controller

Country Status (2)

Country Link
JP (1) JPS62147548A (en)
GB (1) GB2184580A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6476345A (en) * 1987-09-18 1989-03-22 Fujitsu Ltd Disk cache control system
AU614044B2 (en) * 1988-03-25 1991-08-15 Nec Corporation Information processing system capable of quickly detecting an extended buffer memory regardless of a state of a main memory device
JPH087715B2 (en) * 1990-11-15 1996-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション Data processing device and access control method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3618040A (en) * 1968-09-18 1971-11-02 Hitachi Ltd Memory control apparatus in multiprocessor system
US3581291A (en) * 1968-10-31 1971-05-25 Hitachi Ltd Memory control system in multiprocessing system
US3735360A (en) * 1971-08-25 1973-05-22 Ibm High speed buffer operation in a multi-processing system
US4142234A (en) * 1977-11-28 1979-02-27 International Business Machines Corporation Bias filter memory for filtering out unnecessary interrogations of cache directories in a multiprocessor system
JPS5849945B2 (en) * 1977-12-29 1983-11-08 富士通株式会社 Buffer combination method
US4228503A (en) * 1978-10-02 1980-10-14 Sperry Corporation Multiplexed directory for dedicated cache memory system
US4399506A (en) * 1980-10-06 1983-08-16 International Business Machines Corporation Store-in-cache processor means for clearing main storage

Also Published As

Publication number Publication date
GB2184580A (en) 1987-06-24
JPS62147548A (en) 1987-07-01

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)