GB8620291D0 - Integrated circuit devices - Google Patents
Integrated circuit devicesInfo
- Publication number
- GB8620291D0 GB8620291D0 GB8620291A GB8620291A GB8620291D0 GB 8620291 D0 GB8620291 D0 GB 8620291D0 GB 8620291 A GB8620291 A GB 8620291A GB 8620291 A GB8620291 A GB 8620291A GB 8620291 D0 GB8620291 D0 GB 8620291D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- integrated circuit
- circuit devices
- devices
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3738—Semiconductor materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73207—Bump and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8620291A GB2194388A (en) | 1986-08-20 | 1986-08-20 | Integrated circuit devices |
PCT/GB1987/000588 WO1988001437A1 (en) | 1986-08-20 | 1987-08-20 | Integrated circuit devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8620291A GB2194388A (en) | 1986-08-20 | 1986-08-20 | Integrated circuit devices |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8620291D0 true GB8620291D0 (en) | 1986-10-01 |
GB2194388A GB2194388A (en) | 1988-03-02 |
Family
ID=10602999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8620291A Withdrawn GB2194388A (en) | 1986-08-20 | 1986-08-20 | Integrated circuit devices |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB2194388A (en) |
WO (1) | WO1988001437A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4907065A (en) * | 1988-03-01 | 1990-03-06 | Lsi Logic Corporation | Integrated circuit chip sealing assembly |
DE3851335D1 (en) * | 1988-12-05 | 1994-10-06 | Heinz Karl Diedrich | Vacuum container for cryogenically cooling a package for an electronic assembly. |
JP2726141B2 (en) * | 1990-06-05 | 1998-03-11 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2312172A1 (en) * | 1975-05-22 | 1976-12-17 | Ibm | Monolithically integrated circuits assembly production - involves large monocrystal substrate with metallic pattern and pin soldering system |
EP0007993A1 (en) * | 1978-07-12 | 1980-02-20 | Siemens Aktiengesellschaft | Conductor plate for mounting and electrically connecting semiconductor chips |
US4246597A (en) * | 1979-06-29 | 1981-01-20 | International Business Machines Corporation | Air cooled multi-chip module having a heat conductive piston spring loaded against the chips |
JPS58143556A (en) * | 1982-02-22 | 1983-08-26 | Fujitsu Ltd | Package for high-density integrated circuit |
US4561011A (en) * | 1982-10-05 | 1985-12-24 | Mitsubishi Denki Kabushiki Kaisha | Dimensionally stable semiconductor device |
GB2144907A (en) * | 1983-08-09 | 1985-03-13 | Standard Telephones Cables Ltd | Mounting integrated circuit devices |
-
1986
- 1986-08-20 GB GB8620291A patent/GB2194388A/en not_active Withdrawn
-
1987
- 1987-08-20 WO PCT/GB1987/000588 patent/WO1988001437A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
GB2194388A (en) | 1988-03-02 |
WO1988001437A1 (en) | 1988-02-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |