GB833781A - Improvements in binary digital parallel adders - Google Patents
Improvements in binary digital parallel addersInfo
- Publication number
- GB833781A GB833781A GB11670/57A GB1167057A GB833781A GB 833781 A GB833781 A GB 833781A GB 11670/57 A GB11670/57 A GB 11670/57A GB 1167057 A GB1167057 A GB 1167057A GB 833781 A GB833781 A GB 833781A
- Authority
- GB
- United Kingdom
- Prior art keywords
- carry
- pulse
- transistors
- gate
- accumulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
- G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US361417XA | 1956-04-12 | 1956-04-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB833781A true GB833781A (en) | 1960-04-27 |
Family
ID=21886884
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB11670/57A Expired GB833781A (en) | 1956-04-12 | 1957-04-10 | Improvements in binary digital parallel adders |
Country Status (5)
| Country | Link |
|---|---|
| BE (1) | BE556428A (enrdf_load_stackoverflow) |
| CH (1) | CH361417A (enrdf_load_stackoverflow) |
| FR (1) | FR1174193A (enrdf_load_stackoverflow) |
| GB (1) | GB833781A (enrdf_load_stackoverflow) |
| NL (1) | NL216061A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3325634A (en) * | 1964-02-03 | 1967-06-13 | Hughes Aircraft Co | Dynamic high speed parallel adder using tunnel diode circuits |
-
0
- BE BE556428D patent/BE556428A/xx unknown
- NL NL216061D patent/NL216061A/xx unknown
-
1957
- 1957-04-09 CH CH361417D patent/CH361417A/de unknown
- 1957-04-10 GB GB11670/57A patent/GB833781A/en not_active Expired
- 1957-04-12 FR FR1174193D patent/FR1174193A/fr not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3325634A (en) * | 1964-02-03 | 1967-06-13 | Hughes Aircraft Co | Dynamic high speed parallel adder using tunnel diode circuits |
Also Published As
| Publication number | Publication date |
|---|---|
| CH361417A (de) | 1962-04-15 |
| NL216061A (enrdf_load_stackoverflow) | |
| BE556428A (enrdf_load_stackoverflow) | |
| FR1174193A (fr) | 1959-03-06 |
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