GB823609A - Improvements in or relating to delay storage device - Google Patents

Abstract

823,609. Electric digital-data-storage apparatus. INTERNATIONAL COMPUTERS & TABULATORS Ltd. March 19, 1957 [April 24, 1956], No. 12499/56. Class106 (1). Apparatus for registering input signals comprises a plurality of storage stages which receive the input signals over a common line, a pulse distributer having a plurality of output lines supplying control signals to the storages in turn, means operated upon coincidence of input and control signals to set associated storage stages, and means for reading out the settings in succession to a common line. As shown in Fig. 1, data entering in the form of a series-mode pulse train on line 2 is fed in parallel to all stages 1(a) . . . 1(d) of the store, distribution being effected by a pulse generator 6 which selects the stages in turn. Read-out on line 3 is also controlled by the distributer. All the stages can be re-set by a signal on line 5. In a more detailed embodiment saturable magnetic cores are used as the storage elements, each being settable either to two states or, as described in Specification 767,005, to ten states (Fig. 7, not shown). As shown in Fig. 2, data in the form of a binary pulse train passes through a gate 31 under control of a clock pulse source 32, and is applied to all the input windings 42(1), 42(2) .. 42(n) of a series of saturable magnetic cores 41(1), 41(2) . . . 41(n). The opposite end of each winding is connected to a pulse distributer 33 via a diode 26(1), 26(2) ... 26(n) which is normally blocked, but the diodes are unblocked by the distributer in succession to allow entry of significant digits by reversal of corresponding cores. The distributer subsequently supplies pulses of read-out current to successive cores via further diodes 27(1), 27(2) ... 27(n); this gives rise to a complemented pulse train in which the re-setting of each core storing a significant digit is represented by the absence of a pulse. This pulse train passes via a gate and complementer 34 to a utilization device. This read-out is destructive, but in a circuit using additional diodes (Fig. 3, not shown) a non-destructive read-out is achieved. Arrangements are also described whereby read-out can be started before read-in is completed, and may be performed in a different order. This last facility is accomplished by employing delay elements in the circuit.