GB788927A - Improvements in or relating to multiplying arrangements for electronic digital computing machines - Google Patents
Improvements in or relating to multiplying arrangements for electronic digital computing machinesInfo
- Publication number
 - GB788927A GB788927A GB10798/53A GB1079853A GB788927A GB 788927 A GB788927 A GB 788927A GB 10798/53 A GB10798/53 A GB 10798/53A GB 1079853 A GB1079853 A GB 1079853A GB 788927 A GB788927 A GB 788927A
 - Authority
 - GB
 - United Kingdom
 - Prior art keywords
 - signals
 - staticisor
 - line
 - digit
 - passed
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Expired
 
Links
Classifications
- 
        
- G—PHYSICS
 - G06—COMPUTING OR CALCULATING; COUNTING
 - G06F—ELECTRIC DIGITAL DATA PROCESSING
 - G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
 - G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
 - G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
 - G06F7/52—Multiplying; Dividing
 - G06F7/523—Multiplying only
 - G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
 - G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
 
 
Landscapes
- Physics & Mathematics (AREA)
 - Engineering & Computer Science (AREA)
 - General Physics & Mathematics (AREA)
 - Mathematical Analysis (AREA)
 - Mathematical Optimization (AREA)
 - Pure & Applied Mathematics (AREA)
 - Computational Mathematics (AREA)
 - Theoretical Computer Science (AREA)
 - Computing Systems (AREA)
 - General Engineering & Computer Science (AREA)
 - Complex Calculations (AREA)
 - Electronic Switches (AREA)
 - Logic Circuits (AREA)
 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| GB327350X | 1953-04-20 | 
Publications (1)
| Publication Number | Publication Date | 
|---|---|
| GB788927A true GB788927A (en) | 1958-01-08 | 
Family
ID=10343227
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| GB10798/53A Expired GB788927A (en) | 1953-04-20 | 1953-04-20 | Improvements in or relating to multiplying arrangements for electronic digital computing machines | 
Country Status (7)
| Country | Link | 
|---|---|
| US (1) | US2856126A (en:Method) | 
| BE (1) | BE528222A (en:Method) | 
| CH (1) | CH327350A (en:Method) | 
| DE (1) | DE1046917B (en:Method) | 
| FR (1) | FR1104050A (en:Method) | 
| GB (1) | GB788927A (en:Method) | 
| NL (2) | NL186882B (en:Method) | 
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| BE542991A (en:Method) * | 1954-11-22 | |||
| NL202098A (en:Method) * | 1954-11-23 | |||
| US3016195A (en) * | 1954-12-30 | 1962-01-09 | Ibm | Binary multiplier | 
| US3021062A (en) * | 1955-08-08 | 1962-02-13 | Digital Control Systems Inc | Methods and apparatus for differentiating difunction signl trains | 
| DE1203024B (de) * | 1956-01-17 | 1965-10-14 | Fuji Tsushinki Seizo Kabushiki | Schaltungsanordnung fuer einen aus einer Kombination von Vervielfachungsstromkreisenaufgebauten Multiplikator | 
| US3201762A (en) * | 1957-01-25 | 1965-08-17 | Honeywell Inc | Electrical data processing apparatus | 
| US3069085A (en) * | 1958-04-15 | 1962-12-18 | Ibm | Binary digital multiplier | 
| US3123707A (en) * | 1960-03-18 | 1964-03-03 | Computing machines | |
| NL260164A (en:Method) * | 1960-03-30 | |||
| US3185825A (en) * | 1961-05-23 | 1965-05-25 | Ibm | Method and apparatus for translating decimal numbers to equivalent binary numbers | 
| US3221158A (en) * | 1961-06-28 | 1965-11-30 | Ibm | Combinatorial word analyzer | 
| NL282621A (en:Method) * | 1961-08-30 | |||
| US3115574A (en) * | 1961-11-29 | 1963-12-24 | Ibm | High-speed multiplier | 
| US3192367A (en) * | 1962-05-09 | 1965-06-29 | Sperry Rand Corp | Fast multiply system | 
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| US2166928A (en) * | 1934-05-10 | 1939-07-25 | Ibm | Multiplying machine | 
| US2332304A (en) * | 1936-10-27 | 1943-10-19 | Addressograph Multigraph | Printing and calculating machine | 
| BE437366A (en:Method) * | 1938-10-21 | |||
| US2304495A (en) * | 1941-05-17 | 1942-12-08 | Ibm | Multiplying machine | 
| US2604262A (en) * | 1949-01-19 | 1952-07-22 | Ibm | Multiplying and dividing means | 
- 
        0
        
- BE BE528222D patent/BE528222A/xx unknown
 - NL NL106122D patent/NL106122C/xx active
 - NL NLAANVRAGE7807146,A patent/NL186882B/xx unknown
 
 - 
        1953
        
- 1953-04-20 GB GB10798/53A patent/GB788927A/en not_active Expired
 
 - 
        1954
        
- 1954-04-13 US US422886A patent/US2856126A/en not_active Expired - Lifetime
 - 1954-04-20 DE DEN8779A patent/DE1046917B/de active Pending
 - 1954-04-20 FR FR1104050D patent/FR1104050A/fr not_active Expired
 - 1954-04-20 CH CH327350D patent/CH327350A/fr unknown
 
 
Also Published As
| Publication number | Publication date | 
|---|---|
| NL106122C (en:Method) | |
| US2856126A (en) | 1958-10-14 | 
| BE528222A (en:Method) | |
| CH327350A (fr) | 1958-01-31 | 
| DE1046917B (de) | 1958-12-18 | 
| FR1104050A (fr) | 1955-11-15 | 
| NL186882B (nl) | 
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