GB587655A - Improvements in or relating to thermionic valve circuits - Google Patents

Abstract

587,655. Valve counting circuits. TAYLOR, S. M. Dec. 30, 1944, No. 26191. [Class 40 (v)] In a valve counter circuit for delivering a pulse coincident with the last of a group of regularly recurring input pulses, a group of resetting pulses of equal recurrence frequency is generated for comparison with the input pulses, each resetting pulse being prevented from stopping the counting sequence when it coincides with an input pulse. The Figure shows a radar receiver 1 feeding echo signals to the suppressor grid of biassed gating valve 2. A synchronizing pulse from the receiver locks a saw-tooth voltage waveform which is compared with an adjustable steady voltage in circuit 3,to produce a positive pulse when the two voltages are of equal amplitude. These selector pulses are made to coincide with particular echo pulses and overcome the bias on valve 2 to allow the echo pulses to pass exclusively through separator 5. to successive scale-of-2 count-down circuits 6, 8 so that a negative output pulse is fed to the indicator for every 4 echo pulses from the receiver. Each selector pulse from circuit 3 is also fed to a resetting pulse generator 11 which feeds a slightly delayed positive pulse to the control grid of gating valve 12 which is rendered non-conducting by negative pulses on the suppressor grid from circuit 6, corresponding in time to the echo signals. The resetting pulse is therefore suppressed when it coincides with an echo pulse. Chance coincidences from spurious signals of different recurrence frequency occur less than four times in succession, and at a non-coincidence a resetting pulse is transmitted by valve 12 'to the Kipp relay 14 which has a restoration time such that a negative pulse is produced after the time base period has lapsed to restore count-down circuits 6, 8 to their original condition. The positive pulses appearing at the output valves of circuits (i, 8 during the restoration process, are made non-effective by applying a bias voltage from receiver 1 to the suppressor grids of the output valve 7 and its counterpart 8 during the rest periods between time bases. Specifications 581,996 and 582,169 are referred to.