GB2616601B - Sub-vector-supporting instruction for scalable vector instruction set architecture - Google Patents

Sub-vector-supporting instruction for scalable vector instruction set architecture Download PDF

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Publication number
GB2616601B
GB2616601B GB2203431.8A GB202203431A GB2616601B GB 2616601 B GB2616601 B GB 2616601B GB 202203431 A GB202203431 A GB 202203431A GB 2616601 B GB2616601 B GB 2616601B
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United Kingdom
Prior art keywords
vector
instruction
sub
set architecture
supporting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2203431.8A
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English (en)
Other versions
GB202203431D0 (en
GB2616601A (en
Inventor
Martinez Vicente Alejandro
Sun Peng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB2203431.8A priority Critical patent/GB2616601B/en
Publication of GB202203431D0 publication Critical patent/GB202203431D0/en
Priority to IL314882A priority patent/IL314882A/en
Priority to EP22826607.8A priority patent/EP4490612A1/en
Priority to PCT/GB2022/053244 priority patent/WO2023170373A1/en
Priority to US18/844,296 priority patent/US20250156184A1/en
Priority to CN202280093265.3A priority patent/CN118829969A/zh
Priority to JP2024551945A priority patent/JP2025507837A/ja
Priority to KR1020247033147A priority patent/KR20240159595A/ko
Priority to TW112105151A priority patent/TW202403546A/zh
Publication of GB2616601A publication Critical patent/GB2616601A/en
Application granted granted Critical
Publication of GB2616601B publication Critical patent/GB2616601B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G06F9/38873—Iterative single instructions for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G06F9/38873—Iterative single instructions for multiple data lanes [SIMD]
    • G06F9/38875—Iterative single instructions for multiple data lanes [SIMD] for adaptable or variable architectural vector length

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
GB2203431.8A 2022-03-11 2022-03-11 Sub-vector-supporting instruction for scalable vector instruction set architecture Active GB2616601B (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
GB2203431.8A GB2616601B (en) 2022-03-11 2022-03-11 Sub-vector-supporting instruction for scalable vector instruction set architecture
JP2024551945A JP2025507837A (ja) 2022-03-11 2022-12-15 スケーラブルベクトル命令セットアーキテクチャのためのサブベクトルサポート命令
EP22826607.8A EP4490612A1 (en) 2022-03-11 2022-12-15 Sub-vector-supporting instruction for scalable vector instruction set architecture
PCT/GB2022/053244 WO2023170373A1 (en) 2022-03-11 2022-12-15 Sub-vector-supporting instruction for scalable vector instruction set architecture
US18/844,296 US20250156184A1 (en) 2022-03-11 2022-12-15 Sub-vector-supporting instruction for scalable vector instruction set architecture
CN202280093265.3A CN118829969A (zh) 2022-03-11 2022-12-15 用于可缩放向量指令集架构的子向量支持指令
IL314882A IL314882A (en) 2022-03-11 2022-12-15 Sub-vector-supporting instruction for scalable vector instruction set architecture
KR1020247033147A KR20240159595A (ko) 2022-03-11 2022-12-15 스케일링 가능한 벡터 명령어 세트 아키텍처를 위한 서브벡터 지원 명령어
TW112105151A TW202403546A (zh) 2022-03-11 2023-02-14 用於可擴縮向量指令集架構的子向量支援指令

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2203431.8A GB2616601B (en) 2022-03-11 2022-03-11 Sub-vector-supporting instruction for scalable vector instruction set architecture

Publications (3)

Publication Number Publication Date
GB202203431D0 GB202203431D0 (en) 2022-04-27
GB2616601A GB2616601A (en) 2023-09-20
GB2616601B true GB2616601B (en) 2024-05-08

Family

ID=81254804

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2203431.8A Active GB2616601B (en) 2022-03-11 2022-03-11 Sub-vector-supporting instruction for scalable vector instruction set architecture

Country Status (9)

Country Link
US (1) US20250156184A1 (cg-RX-API-DMAC7.html)
EP (1) EP4490612A1 (cg-RX-API-DMAC7.html)
JP (1) JP2025507837A (cg-RX-API-DMAC7.html)
KR (1) KR20240159595A (cg-RX-API-DMAC7.html)
CN (1) CN118829969A (cg-RX-API-DMAC7.html)
GB (1) GB2616601B (cg-RX-API-DMAC7.html)
IL (1) IL314882A (cg-RX-API-DMAC7.html)
TW (1) TW202403546A (cg-RX-API-DMAC7.html)
WO (1) WO2023170373A1 (cg-RX-API-DMAC7.html)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0205809A2 (en) * 1985-06-17 1986-12-30 International Business Machines Corporation Vector processing
US20150227367A1 (en) * 2014-02-07 2015-08-13 Arm Limited Data processing apparatus and method for performing segmented operations
EP3125108A1 (en) * 2015-07-31 2017-02-01 ARM Limited Vector processing using loops of dynamic vector length

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2540939B (en) * 2015-07-31 2019-01-23 Advanced Risc Mach Ltd An apparatus and method for performing a splice operation
US10108581B1 (en) * 2017-04-03 2018-10-23 Google Llc Vector reduction processor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0205809A2 (en) * 1985-06-17 1986-12-30 International Business Machines Corporation Vector processing
US20150227367A1 (en) * 2014-02-07 2015-08-13 Arm Limited Data processing apparatus and method for performing segmented operations
EP3125108A1 (en) * 2015-07-31 2017-02-01 ARM Limited Vector processing using loops of dynamic vector length

Also Published As

Publication number Publication date
GB202203431D0 (en) 2022-04-27
IL314882A (en) 2024-10-01
WO2023170373A1 (en) 2023-09-14
TW202403546A (zh) 2024-01-16
KR20240159595A (ko) 2024-11-05
GB2616601A (en) 2023-09-20
CN118829969A (zh) 2024-10-22
JP2025507837A (ja) 2025-03-21
EP4490612A1 (en) 2025-01-15
US20250156184A1 (en) 2025-05-15

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