GB2602003A - Quantum Computing System and Methods thereof - Google Patents

Abstract

A system for quantum computing, such as a trapped ion quantum computer, comprises a controller 110 communicating with a driver unit or cell 230 connected to an electrode suitable for applying an analogue signal. The driver unit comprises a digital to analogue converter (DAC) 260 connected to a local memory 240 and a local processor for controlling the DAC. The driver unit is suitable for receiving waveform commands asynchronously from the controller. In a method for quantum computing, a controller is provided with multiple predefined waveform commands defining operations for a quantum computer. The waveform commands are provided asynchronously to a driver unit comprising a DAC connected to a local memory and a local processor. The driver unit may output an analogue voltage depending on timing commands from the controller, and may retrieve or generate an operation associated with the waveform command from the local memory. The local processor may select and output operation waveforms based on the received waveform commands. Multiple surface electrodes (fig. 5, 501a-504b) may be connected with respective driver units. Also claimed is a carrier carrying multiple driver units connected to respective row 220 and column 210 drivers to provide asynchronous timing commands.

Description

Quantum Computing System and Methods therefor

Introduction

The present application relates to quantum computing systems, including for example, but not limited by, such systems utilizing ions and ion traps, and relates to apparatus and methods for operating such systems.

Background

Quantum computing in general, unlike so-called "classical computing", relies on the quantum mechanical properties of particles or matter to produce or alter data. The data may be represented by quantum bits or "qubits", which may involve the superposition of quantum states, or for example entanglement in which the state of one particle or atom is influenced by another particle or atom.

Quantum mechanical qubits can encode information as combinations of zeros and ones simultaneously. Such properties open numerous complex numerical applications that are traditionally difficult for classical computers. Examples include artificial Intelligence, image processing and recognition, cryptography, or secure communications and so on.

Surface ion traps may be used to create quantum computers. This involves the trapping of super cooled ions on or above surface patterned electrodes forming an ion trap, exciting other ions so that they interact or superpose with another ion, and manipulating or moving the ions on the electrodes by altering the surface electrode fields and "reading out" the result from the qubit. The surface electrode potentials of an ion-trap are preferably controlled by Digital to Analogue Converters (DACs) as described for example in: "Lekitsch, Bjoern & Weidt, Sebastian & Fowler, Austin & Memel-, Klaus & Devitt, Simon & Wunderlich, Christof & Hensinger, W.. (2017). Blueprint for a microwave trapped ion quantum computer. Science Advances. 3. e1601540. 10.1126/sciadv.1601540." 1.

In the above paper, numerous multi-channel-DACs (AD5370) are driven using Field Programmable Gate Arrays (FPGAs) and memory, and all DAC data originates from FPGA processing or from stored data in the memory. All data for all DACs must be sent via a bus from the central controlling computer, the bus being for example a Serial Processing Interface bus, to control the ion in real time. This has a disadvantage in that updating all DACs synchronously is slow with respect to the update rate of a single DAC. A further problem lies in the scalability of such an architecture (and hence "computing power") owing to the disadvantage.

There is therefore a desire to provide improved quantum computing systems and methods for operation of such architectures.

Summary

According to a first aspect there is provided a system for quantum computing comprising a controller in communication with at least one or more driver units, the each or at least one driver unit connected to a respective electrode for applying an analogue signal, the each or at least one driver unit comprising a Digital Analogue Converter (DAC) connected with a local memory and a local processor for controlling the DAC, and wherein the at least one or more driver units are adapted to receive waveform commands asynchronously from the controller.

According to another aspect there is provided a method for quantum computing, comprising providing a controller with a plurality of predefined waveform commands defining operations on a quantum computer, providing said waveform commands, asynchronously to at least one or more driver units comprising a Digital Analogue Converter (DAC) connected with a local memory and a local processor.

Advantageously, the at least one electrode driver units are adapted to receive waveform commands asynchronously from the controller.

In an embodiment, the local processor is adapted to select and output an operation waveform in dependence on the received procedure call and data stored in the local memory.

In another embodiment, the electrode driver circuit processor generates parameterized waveforms from functions stored in the local memory.

In a further embodiment, the electrode driver circuit processor generates parameterized waveforms from functions stored in the local memory wherein the functions comprise one or more of a ramp, % sine wave, or descending or any mixture of these.

In yet another embodiment, a system is provided further comprising a plurality of surface electrodes, each connected with a respective electrode driver circuit to provide procedural calls defining waveforms for local storage and execution on said surface electrodes.

In an embodiment, a system is provided further comprising a plurality of surface electrodes, each connected with a respective electrode driver circuit to provide procedural calls defining waveforms for local storage and execution on said surface electrodes, and wherein the electric potential of the or each surface electrodes is controlled by the respective DAC output of the electrode driver circuit in accordance with the selected or generated waveform.

In an embodiment according to the second aspect, there is provided a method for quantum computing, comprising providing a computer with a plurality of predefined procedural calls defining operations on a quantum computer, providing said procedure calls to at least one or more electrode driver circuits comprising a Digital Analogue Converter (DAC) connected with a local memory and a local processor for controlling the DAC, and further comprising the electrode driver circuit retrieving from the local memory, under control of the local processor, an operation associated with the provided procedure call, and controlling the DAC in dependence on the operation.

In another embodiment according to the second aspect, there is provided a method comprising the electrode driver circuit generating from the local memory, under control of the local processor, an operation associated with the provided procedure call, and controlling the DAC in dependence on the operation In another aspect, there is provided a carrier for quantum computing carrying a plurality of electrode driver circuits in connection with respective row and column drivers for use with a control processor.

In yet another aspect, there is provided computer code for controlling an ion in a quantum computer comprising instructions, which when executed by a processor, cause said processor to perform the steps of the second aspect.

In the abovementioned aspects the electrode driver circuit architecture provides a form of local processing and memory for each electrode driver circuit and therefore the quantum computer controller may only need to send very small amounts of predefined control or procedural data to the distributed local electrode driver circuit processors to execute very large sequences of DAC value up-dates, thereby providing a scale-able architecture.

Advantageously, in one example, the local memory may store data defining multiple waveforms defining ion operations.

In another example, the local processor may retrieve data from the memory associated with that local processor, the data defining a waveform and the processor may provide the data to the input of the DAC to control the surface electrode potential of an ion trap to achieve the desired operation.

In yet a further example, the local memory may store code instructions comprising the assembly or generation of multiple waveforms, advantageously enabling "on electrode driver circuit" generation of a complex procedure thereby decoupling the generation and provision of input data to the DAC from the control computer and enhancing scalability.

In another example the control computer may provide global timing and synchronisation signals in addition to the predefined procedure calls.

In yet another example, the control computer may provide one or more of the predefined procedure calls relating to the waveform to be applied to the DAC, in a stack or consecutive loop.

This advantageously decouples the provision of the waveforms from the central computer and enables faster loading and computation.

These, and other advantages will become apparent with reference to the accompany drawings and description, in which: Figure 1 shows a quantum computing system, Figure 2 illustrates a quantum computing system according to an aspect of the present disclosure, Figure 3 shows an electrode driver circuit in accordance with the present disclosure, Figure 4 is an example of a table of procedure calls, and their associated operations, Figure 5 is a diagram illustrating example waveforms and electrical potential timing to move or perform a "shuttle" operation on an ion from left to right across the electrode, Figure 6 is a block diagram illustrating steps in a method according to an aspect of the present disclosure.

Figure 7 illustrates a quantum system in accordance with the foregoing.

Detailed Description

Figure 1 shows an example quantum computer (100) in which surface ions or other matter may be used to provide qubits for the quantum computer (100). Ion movement may be subjected to applied surface electrode potentials, instructed by a central processor (110) and memory (120) provided via a bus (130) to each Digital to Analogue Converter DAC (140).

For example, traditional techniques of driving multiple DC electrodes of a surface ion based quantum computer (100) may be typically achieved using bussed (serial or parallel) communication(130) between a centralized controller/processor (110) and Digital to Analogue Converters (DACs) 140, thereby controlling the DC electrode voltage and hence surface potential to influence the ion in question.

In this architecture the central processor (110) may have to generate large amounts of data in real time. The central processor (110) may also typically access data stored in a central memory (120) in communication with the central processor (110). An example of such memory storage associated with a central processor (110) is, as will be appreciated DDR (120), and all DACs (140) must share that memory.

This creates memory (120) access bottlenecks and may further invoke bus line (130) delays. Furthermore, as will be appreciated by those skilled in the art, the quantum computer (100) may require substantive parallel wiring (130) between the central processor (110) and the multiple DACs (140) leading to noise.

Figure 2 depicts an embodiment of a quantum computing architecture (200) according to the present disclosure. In this embodiment there is provided a substrate (215), for example silicon, in which the processing in any computer (110) and memory (120) is not unconstrained and arbitrary.

In this embodiment, the substrate or wafer (215) comprises a column (210) and a row (220) arrangement to address each cell (230) of the matrix (215) such obtained.

In another embodiment the substrate or carrier may be in the form of an Application Specific Integrated circuit (ASIC) or a custom IC or chip.

As illustrated in Figure 3, Each cell (230) or electrode driver circuit (230) comprises its own local processor (250) or microcontroller (250) connected to a local memory store (240) in communication with a DAC (260) for that electrode.

By providing an electrode driver circuit (230) the central processor (110) and memory (120) are decoupled from the current electrode voltage waveforms applied to the DAC 260 for each electrode function. Hence noise is reduced.

With reference to Figure 4, and in yet a further embodiment the or each particular procedure or waveform representing such may be simply instructed by the central processor (110) and the local processor (250) may look up from local memory (240) and provide the required procedure or waveform for the required ion movement.

In another embodiment this may be repeated for each electrode having an associated electrode driver circuit (230) or cell. This has the advantage of decoupling the control processor (110) and memory (120) from the DAC (260) responsible for the electrode waveform or potential applied to the electrode to move, trap or read out an ion.

Figure 4 illustrates example procedures (410a,b) and waveforms (420) or partial waveforms (snippets) that may be realized or useful. For example, and with reference to Figure 4, each waveform (420) or snippet or portion of a waveform, or a sequence of snippets or portions may be considered a procedure. For instance, example procedures may comprise at least (See Figure 4): o Move single ion Right/Left o Merge 2 ions -Left and Right -to form crystal, o Split 2 ion crystal to form LEFT-RIGHT ion pair, o Move LEFT ion pair to the left, 0 In an embodiment according to a method of operation, and with refence to Figure 4 the waveforms (420) and associated procedures (410a,b) are stored, with reference to each cell or electrode driver circuit (230) in the local memory (240) of that cell or electrode driver circuit (230) and available for lookup via the local cell processor (250).

Hence a hardware architecture is provided that, whilst allowing central control (110, 120) also provides a distributed cell architecture that alleviates the problem of multiplexing memory access (120, 130) and reduces the data transfer overhead on the central processor (110).

To further illustrate this, and with reference to Figure 5, distributed processing at the DAC level of hierarchy is achieved by decoupling the central processor (110) from the DAC (260) Figure 5 illustrates, on the left, the waveforms applied over time to move or shuffle the trapped ion to the right on an electrode, so as to be measured or otherwise at a Gate Trap or Measurement Zone (right of the figure). The local memory (240) may contain a finite number of waveform snippets that can be conjoined, without discontinuity, to provide synced or looped waveform operation. The output of the memory (240) is preferably directly connected to the DAC (260) input. Those skilled in the art will appreciate that the number and configuration of DC electrodes and their respective spacing may vary and the waveforms stored or supplied to each DAC (260) via local memory (240) will vary in dependence on the geometry and design of the electrodes.

In yet another embodiment, each co-processor (250) may be programmed to synthesize or generate parameterized waveforms from locally stored mathematical functions -such as increasing or decreasing ramp, % sine wave and so on.

The communication between central processor (110) and DAC co-processors (250) may consist of a protocol that calls for the local processor (250) to perform a command from a finite set of available commands. At the lowest level, commands are the identification of which waveform or waveform snippets are to be applied to the DC electrodes. Advantageously, only the order and time at which the snippet or waveform should be applied need be transmitted by the central processor (110).

A stack (410a, 410b) of such commands may be stored in the same local memory (240) as waveform (420) snippets or formulae for generation in yet another embodiment.

The waveform (420) may be preloaded to the DAC (260) local memories (240) during periods when quantum processing is not occurring, such as in an initialization phase. This pre-loading may occur on the same bus as the commands. The bus would use a protocol that allows data or commands to be sent using the same physical bus.

In one embodiment, the memory (240) is dual port, allowing simultaneous read and write. This local memory (240) of the electrode driver circuit (230) may then be updated at the same time as a procedure (410a, 410b) is being executed (250). In this fashion the DAC (260) and the electrode it outputs too is not limited in the sense that a procedure or waveform may be updated whilst another is executing.

In an embodiment the array of micro-processors (250) are addressed so that the central computer (110) updates the local memories (250). This is achieved, with reference to Figure 2, by using row (220) and column (210) addressing in the same fashion as TFT displays. Data or procedure commands from the central computer (110) are input to the column drive (210), which may be for example a shift register with Nc columns. The Row drive (220) may then be a N to 2" decoder or a single bit shift resister. The row output (220) defines which row is active to receive data. Data is then parallel loaded into the local data processor (250). The local processor (250) updates the local memory (240) with respect to the data it receives.

The central processor (110) may this thus provide global signals (130) indicating timing for synchronization purposes. These may include, for example, a global reset, a global start program clock, a global DAC update clock, a snippet update frame clock.

By way of example, in the above embodiments a large array of DACs (260) control the position of multiple ions on a smaller array of surface ion traps -for example, cross or X-junctions, As the processing power of the quantum computer increases the number of DACs (260) needed to be controlled increases leading to the requirement of scale-able system architectures for increased computing power. The inventors have realised that using a central processor and memory to provide data for these DACs is not scale-able. Hence, in the above having central control (110) of distributed architectures (210, 220, 230) including a local (to each electrode) drive circuit (230) comprising local processing (250) and memory (240) enables large arrays (215) to be built and utilised and therefore provides a scaling solution for quantum computing.

The distributed processors (250) may be used to do low level data retrieval of waveforms stored in local memory (240) -the waveforms are used to move ions on the trap surface. The memory can be pre-programmed ROM, may usefully be RAM.

The local processor may also generate parameterised waveform-snippet sequences.

It is noted that the number of waveform or waveform-snippets required to be stored in local memory (240) is finite as there is only a finite number of on movement states that are controlled by each DAC (260).

In the foregoing embodiments, a snippet or waveform comprises a number of DAC values and the times for which they are applied. The snippet defines the shape of the waveform, for example, sigmoid, 'A sine wave, exponential or linear. The snippet can additionally be parameterized, for example stretch in time, stretch in amplitude or offset in value. It can also be an arbitrary waveform with no underlying mathematical function.

When applied (250) to the DAC (260) the snippet would perform a task on the ion, see for example Figure 4.

By way of example only, and with Reference to Figures 5 and 6 there now follows embodiments illustrating the efficient movement of ions using the aforementioned embodiments.

In general, the electric field generated by DC electrodes controls the position and movement of the one or more trapped ions. Each ion may then be shuttled between trapping zones, measurement zones and quantum gate zones (See Figure 5 right hand side for a X-junction arrangement with such zones). The trapping zone is usually where the ion is first captured and held in position from the background noise. The ion is then moved to a quantum gate zone where a quantum state can be imposed on the ion using for example microwave radiation.

To perform a quantum gate operation, the ion is subsequently transported to a gate zone. Here it may interact with another ion. Subsequently, the ion would be moved to a measurement zone where the final quantum state of the ion may be read using a laser of suitable wavelength, for example.

In Figure 5 the left side graphs show examples of the applied potential waveforms along the x-junction arm. The graphs are labelled coded so that a graph line 504 is the potential due to the voltage applied to one of the electrodes 504a, 504b and the waveform 501 is the potential at one of the electrodes 501a or 501b. The y-axis represents electric field strength and the x-axis represents ion position along the arm of the x-junction. For example in the first graph a potential, indicated by line 504 has been applied to electrode 504a.

The three graphs on the left, depict example waveforms applied sequentially at Time.0, Time.1 and Time.2. As can be seen, during these time intervals the ion has been "shuttled" from a position at the left-hand electrode (502a) to a position of the right hand electrode (502b). The right-hand figure shows the layout of the x-junction and the ion position at the 2nd time interval (Time.1) as the ion moves to the right.

During this period the electrode 501a starts at a high potential (Time=0) and falls to a lower potential at Time=1. Finally the electrode 501b returns to a high potential. All the DAC values between time =0 and time =3 form a waveform and this is called a snippet. That snippet defines, for each electrode, the waveform required to shuttle the ion from its left-hand side 501a to its right-hand side 501b. Other snippets shuttle the ion from right to left, or two ions left to right.

In the context of some embodiments we use the term distributed processing to refer to the fact that control of the data flow from memory to the DAC is local to the DAC and that that local processor can be programmed using the local memory and synchronised with global timing. Hence a central control computer provides local waveform data to the electrode driver circuits, or at least the memory associated with each. Following this and each electrode driver circuit, via timing impulses, provides the analogue output required in respect of the waveform.

Figure 6 is a technical block diagram illustrating steps of a method in an embodiment. A central processor 610 in communication with memory 620 retrieves and provides a procedure call or command 630 to a local electrode driver circuit comprising a local processor 640 and a DAC. At step 650 the local processor controls the DAC of its respective electrode driver circuit to output the required waveform to the surface electrode.

It should be noted that in some embodiments the central processor (110) has loaded the local memories (240) with waveform and program data and subsequently has no role in the actual transfer of data from the local memory (240) to the local DAC (260) other than via synchronization or timing pulses.

Any function applied to the waveform such as stretch, amplitude gain, interpolate and so on may be carried out by the local processor (250). This functionality may further, in another embodiment, be achieved by parametrizing the waveform or snippet with those parameters also held in the local memory (240).

Referring to Figure 7, the diagram (700) illustrates the basic electronic and quantum phenomena underlying the circuitry described above. There are provided "channels" 710 that provide excitation of a Qubit and subsequent moving of such a qubit towards a circuit gate (720). In addition, and as a separated event occurring independently (740) of the generation of the first quibit, a second quibit state is generated (730) by the laser or other stimuli. The result of the calculation, via the DAC is then read out via channel j.

In the foregoing there is provided a system and methods in which local tasks are enabled to be handled asynchronously and hence are effectively distributed via each electrode driver circuit thereby leading to a local-distributed system that enables scaling in quantum computing.

Claims (14)

1. Claims 1 A system for quantum computing comprising a controller (110) in communication with at least one or more driver units (230), the each or at least one driver unit (230) connected to a respective electrode for applying an analogue signal, the each or at least one driver unit (230) comprising a Digital Analogue Converter (DAC) (260) connected with a local memory (240) and a local processor (250) for controlling the DAC (260), and wherein the at least one or more driver units (230) are adapted to receive waveform commands (210), (220) asynchronously from the controller (110).
2. 2. A system according to claim 1, wherein the at least one or more driver units (230) are adapted to output a required analogue voltage in dependence on timing commands provided by the controller (110).
3. 3. A system according to claims 1 or 2, wherein the local processor (250) associated with a driver unit (230) is adapted to select and output an operation waveform in dependence on the waveform command.
4. 4 A system according to claim 3, wherein the local processor (250) is adapted to output the operation waveform in dependence on parameterized waveforms (420) stored in the respective local memory (240).
5. A system according to claim 4, wherein the parametrized waveform is generated by the local processor (250) in dependence on one or more predefined functions stored in the local memory (240).
6. 6 A system according to claim 5, where one or more predefined functions stored in the local memory (240) comprise one or more of a constant voltage ramp, a % sine wave, a descending voltage ramp.
7. 7 A system according to any preceding claim, further comprising a plurality of surface electrodes (510a,b), each connected with a respective driver unit (230) to receive and output waveform commands..
8. 8 A system according to claim 7, wherein the electric potential of the or each surface electrodes (510a,b) is controlled by the respective DAC output of the driver unit in accordance with the selected or generated waveform command.
9. 9. A method for quantum computing, comprising providing a controller (110) with a plurality of predefined waveform commands defining operations on a quantum computer, providing said waveform commands, asynchronously to at least one or more driver units comprising a Digital Analogue Converter (DAC) connected with a local memory and a local processor.
10. 10.A method according to claim 9, comprising the one or more driver units retrieving from the local memory, under control of the local processor, an operation associated with the provided waveform command, and controlling the DAC in dependence on the provided waveform command.
11. 11. A method according to claims 9 or 10, comprising the driver unit generating from the local memory, under control of the local processor, an operation associated with the provided waveform command, and controlling the DAC in dependence on the generated operation.
12. 12. A unit according to claim 1, wherein the local processor (250) is adapted to generate an analogue waveform (420) in dependence on the received waveform command (410a, b).
13. 13. A carrier carrying a plurality of driver units in connection with respective row and column drivers to provide asynchronous timing commands.
14. 14. Computer code for controlling an ion in a quantum computer comprising instructions, which when executed by a processor, cause said processor to perform the steps of any of method claims 9 to 13.