GB2546576A - Hybrid switched mode amplifier - Google Patents

Hybrid switched mode amplifier Download PDF

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Publication number
GB2546576A
GB2546576A GB1617096.1A GB201617096A GB2546576A GB 2546576 A GB2546576 A GB 2546576A GB 201617096 A GB201617096 A GB 201617096A GB 2546576 A GB2546576 A GB 2546576A
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United Kingdom
Prior art keywords
terminal
load
voltage
switch
output
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GB1617096.1A
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GB201617096D0 (en
Inventor
He Zhaohui
J King Eric
Laurence Melanson John
Maru Siddharth
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Cirrus Logic International Semiconductor Ltd
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Cirrus Logic International Semiconductor Ltd
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Priority claimed from US15/168,680 external-priority patent/US9985587B2/en
Priority claimed from US15/270,631 external-priority patent/US9906196B2/en
Application filed by Cirrus Logic International Semiconductor Ltd filed Critical Cirrus Logic International Semiconductor Ltd
Publication of GB201617096D0 publication Critical patent/GB201617096D0/en
Publication of GB2546576A publication Critical patent/GB2546576A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2178Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2173Class D power amplifiers; Switching amplifiers of the bridge type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0222Continuous control by using a signal derived from the input signal
    • H03F1/0227Continuous control by using a signal derived from the input signal using supply converters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0277Selecting one or more amplifiers from a plurality of amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3217Modifications of amplifiers to reduce non-linear distortion in single ended push-pull amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/432Two or more amplifiers of different type are coupled in parallel at the input or output, e.g. a class D and a linear amplifier, a class B and a class A amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

A switching power stage producing a load voltage VOUT includes a first processing path VPC coupled to a first output terminal + by a first switch 64 and to a second output terminal by a second switch 66; and a second processing path VAMP coupled to the first output terminal by a third switch 68 and to the second output terminal by a fourth switch 70. A controller (fig 3, 24) controls the switches to generate the load voltage VOUT as a function of an input signal such that either first switch 64 or the second switch 66 operates in a linear region of operation and either third switch 68 or fourth switch 70 operates in a saturated region of operation for a predominance of a dynamic rage of the load voltage. First processing path VPC may comprise a power converter (fig 4, 40) having an inductor and plural switches. Second processing path VAMP may comprise a linear amplifier (fig 7). The controller may control the linear amplifier to drive a non-zero voltage as the second load voltage to increase a common mode voltage of the first and second load terminals when the power converter is driven to a lower saturation limit to minimize non-linearity of the output voltage. Switches 64, 66, 68 and 70 may be integral to the output stage of linear amplifier (fig 9).

Description

HYBRID SWITCHED MODE AMPLIFIER
RELATED APPLICATIONS
The present disclosure is a continuation-in-part of United States Patent Application Serial No. 15/168,680, filed May 31, 2016, which claims priority to United States Provisional Patent Application Serial No. 62/279,956, filed January 18, 2016, and both of which are incorporated by reference herein in their entirety.
FIELD OF DISCLOSURE
The present disclosure relates in general to circuits for audio devices, including without limitation personal audio devices such as wireless telephones and media players, and more specifically, to a switched mode amplifier including a switched mode converter for driving an audio transducer of an audio device.
BACKGROUND
Personal audio devices, including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices, are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones or one or more speakers. Such circuitry often includes a speaker driver including a power amplifier for driving an audio output signal to headphones or speakers.
SUMMARY
In accordance with the teachings of the present disclosure, one or more disadvantages and problems associated with existing approaches to driving an audio output signal to an audio transducer may be reduced or eliminated.
In accordance with embodiments of the present disclosure, a switching power stage for producing a load voltage at a load output of the switching power stage, wherein the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, may include a power converter comprising a power inductor and a first plurality of switches, wherein the power converter is configured to drive a power converter output terminal coupled to the first load terminal in order to drive the first load terminal, a linear amplifier configured to drive a linear amplifier output terminal coupled to the second load terminal in order to drive the second load terminal, a second plurality of switches comprising at least a first switch coupled between the power converter output terminal and the first load terminal and a second switch coupled between the power converter output terminal and the second load terminal such that the power converter output terminal and the first load terminal are coupled via the first switch and the power converter output terminal and the second load terminal are coupled via the second switch, and a third plurality of switches comprising at least a third switch coupled between the linear amplifier output terminal and the first load terminal and a fourth switch coupled between the linear amplifier output terminal and the second load terminal such that the linear amplifier output terminal and the first load terminal are coupled via the third switch and the linear amplifier output terminal and the second load terminal are coupled via the fourth switch. The switching power stage may also comprise a controller configured to control the first plurality of switches, the second plurality of switches, the third plurality of switches, and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter, and such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
In accordance with these and other embodiments of the present disclosure, a method may be provided for producing a load voltage at a load output of the switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, wherein the switching power stage comprises a power converter comprising a power inductor and a first plurality of switches, wherein the power converter is configured to drive a power converter output terminal coupled to the first load terminal in order to drive the first load terminal, a linear amplifier configured to drive a linear amplifier output terminal coupled to the second load terminal in order to drive the second load terminal, a second plurality of switches comprising at least a first switch coupled between the power converter output terminal and the first load terminal and a second switch coupled between the power converter output terminal and the second load terminal such that the power converter output terminal and the first load terminal are coupled via the first switch and the power converter output terminal and the second load terminal are coupled via the second switch, and a third plurality of switches comprising at least a third switch coupled between the linear amplifier output terminal and the first load terminal and a fourth switch coupled between the linear amplifier output terminal and the second load terminal such that the linear amplifier output terminal and the first load terminal are coupled via the third switch and the linear amplifier output terminal and the second load terminal are coupled via the fourth switch. The method may include controlling the first plurality of switches, the second plurality of switches, the third plurality of switches, and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter, and such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
In accordance with these and other embodiments of the present disclosure, a switching power stage for producing a load voltage at a load output of the switching power stage, wherein the load output comprises a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, may include a first processing path configured to process a first signal derived from an input signal to generate a first path voltage at a first processing path output, a second processing path configured to process a second signal derived from the input signal to generate a second path voltage at a second processing path output, a first plurality of switches comprising at least a first switch coupled between the first processing path output and the first load terminal and a second switch coupled between the first processing path output and the second load terminal, a second plurality of switches comprising at least a third switch coupled between the second processing path output and the first load terminal and a fourth switch coupled between the second processing path output and the second load terminal, and a controller configured to control the first plurality of switches and the second plurality of switches in order to generate the load voltage as a function of the input signal such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
In accordance with these and other embodiments of the present disclosure, a method may be provided for producing a load voltage at a load output of a switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, wherein the switching power stage comprises a first processing path configured to process a first signal derived from an input signal to generate a first path voltage at a first processing path output, a second processing path configured to process a second signal derived from the input signal to generate a second path voltage at a second processing path output, a first plurality of switches comprising at least a first switch coupled between the first processing path output and the first load terminal and a second switch coupled between the first processing path output and the second load terminal, and a second plurality of switches comprising at least a third switch coupled between the second processing path output and the first load terminal and a fourth switch coupled between the second processing path output and the second load terminal. The method may include controlling the first plurality of switches and the second plurality of switches in order to generate the load voltage as a function of the input signal such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein: FIGURE 1 illustrates an example personal audio device, in accordance with embodiments of the present disclosure; FIGURE 2 illustrates a block diagram of selected components of an example audio integrated circuit of a personal audio device, in accordance with embodiments of the present disclosure; FIGURE 3 illustrates a block and circuit diagram of selected components of an example switched mode amplifier, in accordance with embodiments of the present disclosure; FIGURE 4 illustrates a circuit diagram of selected components of an example boost converter that may be used to implement the power converter depicted in FIGURE 3, in accordance with embodiments of the present disclosure; FIGURE 5 illustrates a circuit diagram of selected components of an example output stage that may be used to implement the output stage depicted in FIGURE 3, in accordance with embodiments of the present disclosure; FIGURE 6 illustrates a graph depicting the relationship of a voltage driven by the power converter depicted in FIGURE 3 and a voltage driven by a linear amplifier of the output stage depicted in FIGURE 3 as a function of a desired output voltage, in accordance with embodiments of the present disclosure; FIGURE 7 illustrates a circuit diagram of selected components of an example linear amplifier that may be used to implement the linear amplifier depicted in FIGURE 5, in accordance with embodiments of the present disclosure; FIGURE 8 illustrates a circuit diagram of selected components of another example output stage that may be used to implement the second control loop depicted in FIGURE 3, in accordance with embodiments of the present disclosure; and FIGURE 9 illustrates a circuit diagram of selected components of an example linear amplifier that may be used to implement the linear amplifier depicted in FIGURE 8, in accordance with embodiments of the present disclosure.
DETAILED DESCRIPTION FIGURE 1 illustrates an example personal audio device 1, in accordance with embodiments of the present disclosure. FIGURE 1 depicts personal audio device 1 coupled to a headset 3 in the form of a pair of earbud speakers 8A and 8B. Headset 3 depicted in FIGURE 1 is merely an example, and it is understood that personal audio device 1 may be used in connection with a variety of audio transducers, including without limitation, headphones, earbuds, in-ear earphones, and external speakers. A plug 4 may provide for connection of headset 3 to an electrical terminal of personal audio device 1. Personal audio device 1 may provide a display to a user and receive user input using a touch screen 2, or alternatively, a standard liquid crystal display (LCD) may be combined with various buttons, sliders, and/or dials disposed on the face and/or sides of personal audio device 1. As also shown in FIGURE 1, personal audio device 1 may include an audio integrated circuit (IC) 9 for generating an analog audio signal for transmission to headset 3 and/or another audio transducer. FIGURE 2 illustrates a block diagram of selected components of an example audio IC 9 of a personal audio device, in accordance with embodiments of the present disclosure. As shown in FIGURE 2, a microcontroller core 18 may supply a digital audio input signal DIG IN to a digital-to-analog converter (DAC) 14, which may convert the digital audio input signal to an analog signal Vin. DAC 14 may supply analog signal Vin to an amplifier 16 which may amplify or attenuate audio input signal Vin to provide a differential audio output signal Vout, which may operate a speaker, a headphone transducer, a line level signal output, and/or other suitable output. In some embodiments, DAC 14 may be an integral component of amplifier 16. A power supply 10 may provide the power supply rail inputs of amplifier 16. In some embodiments, power supply 10 may comprise a battery. Although FIGURES 1 and 2 contemplate that audio IC 9 resides in a personal audio device, systems and methods described herein may also be applied to electrical and electronic systems and devices other than a personal audio device, including audio systems for use in a computing device larger than a personal audio device, an automobile, a building, or other structure. FIGURE 3 illustrates a block and circuit diagram of selected components of an example switched mode amplifier 20, in accordance with embodiments of the present disclosure. In some embodiments, switched mode amplifier 20 may implement all or a portion of amplifier 16 described with respect to FIGURE 2. As shown in FIGURE 3, switched mode amplifier 20 may comprise a loop filter 22, a controller 24, a power converter 26, and an second control loop 28.
Loop filter 22 may comprise any system, device, or apparatus configured to receive an input signal (e.g., audio input signal Vin or a derivative thereof) and a feedback signal (e.g., audio output signal Vout, a derivative thereof, or other signal indicative of audio output signal Vout) and based on such input signal and feedback signal, generate a controller input signal to be communicated to controller 24. In some embodiments, such controller input signal may comprise a signal indicative of an integrated error between the input signal and the feedback signal. In other embodiments, such controller input signal may comprise a signal indicative of a target current signal to be driven as an output current Ιουτ or a target voltage signal to be driven as an output voltage Vout to a load coupled to the output terminals of second control loop 28.
Controller 24 may comprise any system, device, or apparatus configured to, based on an input signal (e.g., input signal INPUT), output signal Vout, and/or other characteristics of switched mode amplifier 20, control switching of switches integral to power converter 26, switches integral to second control loop 28, and/or one or more linear amplifiers integral to second control loop 28, in order to transfer electrical energy from a power supply Vsupply to the load of switched-mode amplifier 20 in accordance with the input signal.
Power converter 26 may receive at its input a voltage Vsupply (e.g., provided by power supply 10), and may generate at its output a voltage Vpc. In some embodiments, voltage Vsupply may be received via input terminals including a positive input terminal and a negative input terminal which may be coupled to a ground voltage. As described in greater detail in this disclosure (including, without limitation, in reference to FIGURE 4, below), power converter 26 may comprise a power inductor and a plurality of switches that are controlled by control signals received from controller 24 in order to convert voltage Vsupply to voltage Vpc, such that audio output signal Vout generated from voltage Vpc is a function of the input signal to loop filter 22. Also as shown in FIGURE 3, a capacitor 27 may be coupled between a second supply terminal (which may in some embodiments be coupled to ground) and the power converter output terminal. However, in other embodiments, capacitor 27 may be coupled between a first supply terminal and the power converter output terminal.
Turning briefly to FIGURE 4, a non-limiting example of a single-ended switching mode power supply which may be used to implement power converter 26 is described. FIGURE 4 illustrates a circuit diagram of selected components of an example buck converter 40 that may be used to implement power converter 26 depicted in FIGURE 3, in accordance with embodiments of the present disclosure. As shown in FIGURE 4, buck converter 40 may include a power inductor 42, switches 44, 46, 47, and 49 and capacitor 27 arranged as shown. In operation, controller 24 may be configured to, when noninverting buck-boost converter 40 is used to implement power converter 26, control switches 44, 46, 47, and 49 such that power converter output voltage Vpc is a function of the controller input signal provided to controller 24.
Turning again to FIGURE 3, second control loop 28may receive at its input the power converter output voltage Vpc, and may generate at its output audio output signal Vout. As described in greater detail in this disclosure (including, without limitation, in reference to FIGURES 5A and 5B, below), second control loop 28may comprise at least one linear amplifier and, in some embodiments, a plurality of switches, wherein the at least one linear amplifier and the plurality of switches, if present, are controlled by control signals received from controller 24 in order to convert power converter output voltage Vpc to audio output signal Vout, such that audio output signal Vout is a function of the input signal to loop filter 22 FIGURE 5 illustrates a circuit diagram of selected components of an example output stage 28A that may be used to implement second control loop 28depicted in FIGURE 3, in accordance with embodiments of the present disclosure. As shown in FIGURE 5, power converter 26 may drive power converter output voltage Vpc. Output stage 28A may comprise a plurality of switches including switch 64 coupled between the power converter output and a first output terminal of output stage 28A and switch 66 coupled between the power converter output and a second output terminal of output stage 28A. In addition, second control loop 28may include a linear amplifier 60 (an example of which is depicted in FIGURE 7) configured to drive a linear amplifier output voltage Vamp. Output stage 28A may also include a plurality of switches including switch 68 coupled between the output of linear amplifier 60 and a first output terminal of output stage 28A and switch 70 coupled between the output of linear amplifier 60 and a second output terminal of output stage 28A.
In operation of output stage 28A, controller 24 may activate switches 64 and 70 and deactivate switches 66 and 68 for positive values of audio output signal Vout and activate switches 66 and 68 and deactivate switches 64 and 70 for negative values of audio output signal Vout. Controller 24 may, as power converter output voltage Vpc approaches the lower saturation limit, cause linear amplifier 60 to drive a non-zero linear amplifier output voltage Vamp in order to increase a common mode voltage between the first output terminal and the second output terminal, allowing audio output signal Vout to approach and cross zero. Above the lower saturation limit of power converter output voltage Vpc, controller 24 may cause linear amplifier 60 to drive an approximately zero linear amplifier output voltage Vamp such that a magnitude of audio output signal Vout is equal to power converter output voltage Vpc.
In other words, controller 24 may control power converter 26 and linear amplifier 60 to generate voltages in accordance with the following functions, which are graphically depicted in FIGURE 6, and wherein voltage Vtgt represents a target or desired voltage to be output as audio output signal Vout as indicated by the input signal to controller 24:
VPC = VTGT i for I VTGT |> VSAT Vpc = VSAT,for | VTGT \< VSAT
Vamp ~ for I VTGT \> VSAT
Vamp ~ Vsat ~ Vtot > for I VTGT |< VSAT
In some embodiments, an offset voltage may be added to each of the output of power converter 26 and the output of linear amplifier 60, to ensure that the voltage Vamp > 0 at all times.
Accordingly, presence of linear amplifier 60 and its ability to increase the common mode voltage of the output terminals in response to low magnitudes of the output signal Vout may minimize non-linearities of output signal Vout as a function of the input signal received by controller 24, and permit crossing a magnitude of zero by audio output signal Vout. FIGURE 7 illustrates a circuit diagram of selected components of an example linear amplifier 71A that may be used to implement linear amplifier 60 depicted in FIGURE 5, in accordance with embodiments of the present disclosure. As shown in FIGURE 7, linear amplifier 71A may include a first stage 74 and a second stage 76. First stage 74 may comprise a gain stage 78 having a transconductance gain Gm to convert a voltage signal INPUT received from controller 24 to a current Ie.
Second stage 76 may comprise a totem-pole topology with an input at a gate terminal of n-type field effect transistor (NFET) 80 and an output node shared by the drain terminal of NFET 82 of source terminal of NFET 80 at which linear amplifier 71A drives linear amplifier output voltage Vamp. In such topology, NFET 80 may source current into a load coupled to the output node and NFET 82 may sink current from such load. A local current feedback loop may be arranged with respect to NFET 82 in order to regulate a minimum level of quiescent current through NFET 80. Thus, second stage 76 may be viewed as a source follower having a unity gain from its input node (e.g. gate terminal of NFET 80) to its output node.
Within the current feedback loop of second stage 76, a current-sensing amplifier 84 may sense a current associated with NFET 80 generating a scaled current to be compared with a reference current Iref, resulting in an error current equal to the difference between the scaled current and reference current Iref. A gain booster stage 86 may receive the error current and operate as a current mirror to compensate for loss of loop gain due to the current sensing scheme of current-sensing amplifier 84. At the output of gain booster stage 86, a conventional Miller-compensated common-source output scheme may be applied for stability as long as NFET 82 remains in its saturation region, which may be maintained by keeping its drain-to-source voltage Vds being greater than a saturation voltage Vd_sat. For example, when drain-to-source voltage Vds becomes less than Vd_sat for a given drain-to-source voltage Ids of NFET 82, an output drain impendance of NFET 82 may decrease, and a voltage gain of NFET 82 will decrease accordingly. Consequently, the current loop gain and unity-gain bandwidth of the local current feedback loop may decrease. When such an amplifier is integral to a high-order feedback loop, reduction of unity-gain bandwidth may lead to system instability and must be avoided. Therefore, gain-compensator 88 may be present and may include a variable current gain as a function of drain-to-source voltage of NFET 82, which in the first order can be translated to an output impedance of NFET 82.
FIGURE 8 illustrates a circuit diagram of selected components of another example output stage 28B that may be used to implement second control loop 28 depicted in FIGURE 3, in accordance with embodiments of the present disclosure. Output stage 28B of FIGURE 8 may be similar in many respects to output stage 28A of FIGURE 5, and thus, only the main differences between output stage 28B and output stage 28A are discussed in detail. One main difference between output stage 28B and output stage 28A is that in output stage 28B, linear amplifier 60, switch 64, switch 66, switch 68, and/or switch 70 may be integral to a final output stage of a differential amplifier 72.
To further illustrate, FIGURE 9 illustrates a circuit diagram of an example linear amplifier 7 IB which may be used to implement portions of the example output stage 28B depicted in FIGURE 8, in accordance with embodiments of the present disclosure. As one of skill in the relevant art may recognize, linear amplifier 71B may comprise the differential-output analog to the single-ended topology of linear amplifier 71A depicted in FIGURE 7, and analogous components of linear amplifier 7IB have the same reference numerals as that of linear amplifier 71A with an additional letter “A” or “B” added to the reference numerals. In some embodiments, one or more of NFETs 80A, 80B, 82A, and 82B may be equivalent to switches 64, 66, 68, and 70, respectively, of output stage 28B of FIGURE 8.
In these and other embodiments, additional circuitry may be present to cause the gate-to-source voltage of switch 66 and/or 64 to be at or greater than supply voltage(s) in order to operate as a switch (e g., activate and deactivate). In these and other embodiments, switch 70 and/or 68 may operate in the linear region of such devices, wherein the gate-to-source voltage of such devices is less than the supply voltage.
In light of the foregoing, in operation, switches 68 and 70 of example output stage 28B may be viewed as ground-referenced devices in a first differential amplifier and switches 64 and 66 may be viewed as supply voltage-referenced devices of a second differential amplifier example output stage 28B. When viewed in such manner, the behavior of the amplifier described herein operates to control polarity and magnitude of output voltage Vout by operating such first and second differential amplifiers such that, when implemented as transistors (e.g., n-type metal-oxide-semiconductor field-effect transistors), one switch in each of the differential amplifiers may operate in its saturation region while the remaining switch in each of the differential amplifiers may operate in its linear region. For example, when switch 64 operates in its saturated region, switch 66 may operate in its linear region, and vice versa. When switch 68 operates in its saturated region, switch 70 may operate in its linear region, and vice versa. Because of this behavior, non-idealities (such as high-frequency switching ripple) may be divided between such differential amplifiers such that the predominance of ripple is seen by one switch in each such differential amplifier.
In the foregoing discussion, embodiments are disclosed in which a capacitor 27 is coupled between the power converter output terminal and one of a first supply terminal having a first voltage and a second supply terminal having a second voltage, and embodiments are disclosed in which a capacitor 62 is coupled between the first load terminal and the second load terminal of switched mode amplifier 20. However, in these and other embodiments, a capacitor may be coupled between the first load terminal of switched mode amplifier 20 and one of the first supply terminal and the second supply terminal. In addition, in these and other embodiments, a capacitor may be coupled between the second load terminal of switched mode amplifier 20 and one of the first supply terminal and the second supply terminal.
As used herein, a “switch” may comprise any suitable device, system, or apparatus for making a connection in an electric circuit when the switch is enabled (e.g., activated, closed, or on) and breaking the connection when the switch is disabled (e.g., deactivated, open, or off) in response to a control signal received by the switch. For purposes of clarity and exposition, control signals for switches described herein are not depicted although such control signals would be present to selectively enable and disable such switches. In some embodiments, a switch may comprise a metal-oxide-semiconductor field-effect transistor (e.g., an n-type metal-oxide-semiconductor field-effect transistor).
As used herein, when two or more elements are referred to as “coupled” to one another, such term indicates that such two or more elements are in electronic communication or mechanical communication, as applicable, whether connected indirectly or directly, with or without intervening elements.
This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative.
All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present inventions have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.

Claims (28)

WHAT IS CLAIMED IS:
1. A switching power stage for producing a load voltage at a load output of the switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, the switching power stage comprising: a power converter comprising a power inductor and a first plurality of switches, wherein the power converter is configured to drive a power converter output terminal coupled to the first load terminal in order to drive the first load terminal; a linear amplifier configured to drive a linear amplifier output terminal coupled to the second load terminal in order to drive the second load terminal; a second plurality of switches, comprising at least a first switch coupled between the power converter output terminal and the first load terminal and a second switch coupled between the power converter output terminal and the second load terminal such that the power converter output terminal and the first load terminal are coupled via the first switch and the power converter output terminal and the second load terminal are coupled via the second switch; a third plurality of switches, comprising at least a third switch coupled between the linear amplifier output terminal and the first load terminal and a fourth switch coupled between the linear amplifier output terminal and the second load terminal such that the linear amplifier output terminal and the first load terminal are coupled via the third switch and the linear amplifier output terminal and the second load terminal are coupled via the fourth switch; and a controller configured to control the first plurality of switches, the second plurality of switches, the third plurality of switches, and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter, and such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
2. The switching power stage of Claim 1, further comprising a capacitor coupled between the first load terminal and the second load terminal.
3. The switching power stage of Claim 1, further comprising a capacitor coupled between the first load terminal and one of a first supply terminal having a first voltage and a second supply terminal having a second voltage.
4. The switching power stage of Claim 3, wherein a second terminal of the power inductor is coupled to the power converter output terminal.
5. The switching power stage of Claim 3, wherein the first plurality of switches comprises: a first switch coupled between a second terminal of the power inductor and the power converter output terminal; and a second switch coupled between the second terminal of the power inductor and the second supply terminal.
6. The switching power stage of Claim 1, further comprising: a first capacitor coupled between the power converter output terminal and one of a first supply terminal having a first voltage and a second supply terminal having a second voltage; and a second capacitor coupled between the second load terminal and one of the first supply terminal and the second supply terminal.
7. The switching power stage of Claim 1, wherein the first plurality of switches comprises: a fifth switch coupled between a first terminal of the power inductor and a first supply terminal having a first voltage; and a sixth switch coupled between the first terminal of the power inductor and a second supply terminal having a second voltage.
8. The switching power stage of Claim 7, wherein the first plurality of switches further comprises: a seventh switch coupled between a second terminal of the power inductor and the power converter output terminal; and an eighth switch coupled between the second terminal of the power inductor and the second supply terminal.
9. The switching power stage of Claim 1, wherein the controller further controls the first plurality of switches to drive the first load voltage as a function of a target output voltage which is a function of the input signal.
10 The switching power stage of Claim 9, wherein the function of the target output voltage includes a magnitude of the target output voltage.
11. The switching power stage of Claim 9, wherein the function of the target output voltage includes a lower saturation limit of the power converter output terminal.
12. The switching power stage of Claim 11, wherein the controller further controls the linear amplifier to drive a non-zero voltage as the second load voltage in order to increase a common mode voltage of the first load terminal and the second load terminal when the power converter output terminal is driven to the lower saturation limit in order to produce the output voltage as a function of an input signal to the controller while minimizing non-linearities of the output voltage as a function of the input signal.
13. The switching power stage of Claim 1, wherein the controller further controls the linear amplifier to drive the second load voltage as a function of a target output voltage which is a function of the input signal.
14. A method for producing a load voltage at a load output of the switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, wherein the switching power stage comprises: a power converter comprising a power inductor and a first plurality of switches, wherein the power converter is configured to drive a power converter output terminal coupled to the first load terminal in order to drive the first load terminal; a linear amplifier configured to drive a linear amplifier output terminal coupled to the second load terminal in order to drive the second load terminal; a second plurality of switches, comprising at least a first switch coupled between the power converter output terminal and the first load terminal and a second switch coupled between the power converter output terminal and the second load terminal such that the power converter output terminal and the first load terminal are coupled via the first switch and the power converter output terminal and the second load terminal are coupled via the second switch; and a third plurality of switches, comprising at least a third switch coupled between the linear amplifier output terminal and the first load terminal and a fourth switch coupled between the linear amplifier output terminal and the second load terminal such that the linear amplifier output terminal and the first load terminal are coupled via the third switch and the linear amplifier output terminal and the second load terminal are coupled via the fourth switch; wherein the method comprises controlling the first plurality of switches, the second plurality of switches, the third plurality of switches, and the linear amplifier in order to generate the load voltage as a function of an input signal to the controller such that energy delivered to the load output is supplied predominantly by the power converter, and such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
15. The method of Claim 14, further comprising a capacitor coupled between the first load terminal and the second load terminal.
16. The method of Claim 14, further comprising a capacitor coupled between the first load terminal and one of a first supply terminal having a first voltage and a second supply terminal having a second voltage.
17. The method of Claim 16, wherein a second terminal of the power inductor is coupled to the power converter output terminal.
18. The method of Claim 16, wherein the first plurality of switches comprises: a first switch coupled between a second terminal of the power inductor and the power converter output terminal; and a second switch coupled between the second terminal of the power inductor and the second supply terminal.
19. The method of Claim 14, further comprising: a first capacitor coupled between the power converter output terminal and one of a first supply terminal having a first voltage and a second supply terminal having a second voltage; and a second capacitor coupled between the second load terminal and one of the first supply terminal and the second supply terminal.
20. The method of Claim 14, wherein the first plurality of switches comprises: a fifth switch coupled between a first terminal of the power inductor and a first supply terminal having a first voltage; and a sixth switch coupled between the first terminal of the power inductor and a second supply terminal having a second voltage.
21. The method of Claim 20, wherein the first plurality of switches further comprises: a seventh switch coupled between a second terminal of the power inductor and the power converter output terminal; and an eighth switch coupled between the second terminal of the power inductor and the second supply terminal.
22. The method of Claim 14, wherein the controller further controls the first plurality of switches to drive the first load voltage as a function of a target output voltage which is a function of the input signal.
23. The method of Claim 22, wherein the function of the target output voltage includes a magnitude of the target output voltage.
24. The method of Claim 23, wherein the function of the target output voltage includes a lower saturation limit of the power converter output terminal.
25. The method of Claim 24, wherein the controller further controls the linear amplifier to drive a non-zero voltage as the second load voltage in order to increase a common mode voltage of the first load terminal and the second load terminal when the power converter output terminal is driven to the lower saturation limit in order to produce the output voltage as a function of an input signal to the controller while minimizing non-linearities of the output voltage as a function of the input signal.
26. The method of Claim 14, wherein the controller further controls the linear amplifier to drive the second load voltage as a function of a target output voltage which is a function of the input signal.
27. A switching power stage for producing a load voltage at a load output of the switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, the switching power stage comprising: a first processing path configured to process a first signal derived from an input signal to generate a first path voltage at a first processing path output; a second processing path configured to process a second signal derived from the input signal to generate a second path voltage at a second processing path output; a first plurality of switches, comprising at least a first switch coupled between the first processing path output and the first load terminal and a second switch coupled between the first processing path output and the second load terminal; a second plurality of switches, comprising at least a third switch coupled between the second processing path output and the first load terminal and a fourth switch coupled between the second processing path output and the second load terminal; and a controller configured to control the first plurality of switches and the second plurality of switches in order to generate the load voltage as a function of the input signal such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
28. A method for producing a load voltage at a load output of a switching power stage, the load output comprising a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, wherein the switching power stage comprises a first processing path configured to process a first signal derived from an input signal to generate a first path voltage at a first processing path output, a second processing path configured to process a second signal derived from the input signal to generate a second path voltage at a second processing path output, a first plurality of switches, comprising at least a first switch coupled between the first processing path output and the first load terminal and a second switch coupled between the first processing path output and the second load terminal, and a second plurality of switches, comprising at least a third switch coupled between the second processing path output and the first load terminal and a fourth switch coupled between the second processing path output and the second load terminal, the method comprising: controlling the first plurality of switches and the second plurality of switches in order to generate the load voltage as a function of the input signal such that one of the first switch and the second switch operates in a linear region of operation and one of the third switch and the fourth switch operates in a saturated region of operation for a predominance of a dynamic range of the load voltage.
GB1617096.1A 2016-01-18 2016-10-07 Hybrid switched mode amplifier Withdrawn GB2546576A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662279956P 2016-01-18 2016-01-18
US201662309068P 2016-03-16 2016-03-16
US15/168,680 US9985587B2 (en) 2016-01-18 2016-05-31 Switched mode converter with variable common mode voltage buffer
US15/270,631 US9906196B2 (en) 2016-01-18 2016-09-20 Hybrid switched mode amplifier

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GB2550026A (en) * 2016-03-16 2017-11-08 Cirrus Logic Int Semiconductor Ltd Generation of voltage reference signals in a hybrid switched mode amplifier
GB2550019A (en) * 2016-03-16 2017-11-08 Cirrus Logic Int Semiconductor Ltd Prevention of switching discontinuity in a hybrid switched mode amplifier
US9906196B2 (en) 2016-01-18 2018-02-27 Cirrus Logic, Inc. Hybrid switched mode amplifier
US9929664B2 (en) 2016-03-16 2018-03-27 Cirrus Logic, Inc. Prevention of switching discontinuity in a hybrid switched mode amplifier
US9985587B2 (en) 2016-01-18 2018-05-29 Cirrus Logic, Inc. Switched mode converter with variable common mode voltage buffer
US10090814B2 (en) 2016-03-16 2018-10-02 Cirrus Logic, Inc. Removal of switching discontinuity in a hybrid switched mode amplifier
US10461709B2 (en) 2016-12-29 2019-10-29 Cirrus Logic, Inc. Amplifier with auxiliary path for maximizing power supply rejection ratio
GB2562969B (en) * 2016-03-16 2022-06-22 Cirrus Logic Int Semiconductor Ltd Prevention of switching discontinuity in a hybrid switched mode amplifier

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9906196B2 (en) 2016-01-18 2018-02-27 Cirrus Logic, Inc. Hybrid switched mode amplifier
US9985587B2 (en) 2016-01-18 2018-05-29 Cirrus Logic, Inc. Switched mode converter with variable common mode voltage buffer
GB2550026A (en) * 2016-03-16 2017-11-08 Cirrus Logic Int Semiconductor Ltd Generation of voltage reference signals in a hybrid switched mode amplifier
GB2550019A (en) * 2016-03-16 2017-11-08 Cirrus Logic Int Semiconductor Ltd Prevention of switching discontinuity in a hybrid switched mode amplifier
US9929664B2 (en) 2016-03-16 2018-03-27 Cirrus Logic, Inc. Prevention of switching discontinuity in a hybrid switched mode amplifier
US9973156B2 (en) 2016-03-16 2018-05-15 Cirrus Logic, Inc. Generation of voltage reference signals in a hybrid switched mode amplifier
US10090814B2 (en) 2016-03-16 2018-10-02 Cirrus Logic, Inc. Removal of switching discontinuity in a hybrid switched mode amplifier
GB2562969B (en) * 2016-03-16 2022-06-22 Cirrus Logic Int Semiconductor Ltd Prevention of switching discontinuity in a hybrid switched mode amplifier
US10461709B2 (en) 2016-12-29 2019-10-29 Cirrus Logic, Inc. Amplifier with auxiliary path for maximizing power supply rejection ratio

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