GB2545028A

GB2545028A - Receiver with automatic gain control by an alternating current closed loop

Info

Publication number: GB2545028A
Application number: GB1521476.0A
Authority: GB
Inventors: Le Bars Philippe; Sahyoun Walaa; Blin Stéphane; Nouvel Philippe; Plagellat-Penarier Annick
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2015-12-04
Filing date: 2015-12-04
Publication date: 2017-06-07
Also published as: GB2545041A; GB201613254D0; GB201521476D0

Abstract

The disclosed receiver comprises an antenna 310 configured to receive a wideband signal in the terahertz frequency range and to couple this signal to a quadratic detector 320. The received signal is modulated with data that has been sampled at a sampling frequency. The quadratic detector may be a plasmonic FET (420, fig.4) or a mixer comprising Schottky barrier diodes (620, fig.6). The signal from the quadratic detector 320 passes to a low pass filter 340 for data recovery, and to a bandpass filter 330 centred on the symbol rate. The strength of the symbol rate signal is measured 370 and used to control 380 the power of a regenerated carrier signal from a carrier regeneration circuit 360. The level-controlled, regenerated carrier signal is supplied to the quadratic detector 320 together with the signal from the antenna 310.

Description

RECEIVER WITH AUTOMATIC GAIN CONTROL BY AN ALTERNATING CURRENT CLOSED LOOP

FIELD OF THE INVENTION

The invention relates to the field of wireless communication systems, in particular to a receiver comprising a quadratic detector and automatic gain control for terahertz communications.

BACKGROUND OF THE INVENTION

Wireless communications, the transfer of data between a transmitter and a receiver not connected by wires, may be performed at different frequencies of the electromagnetic spectrum.

Figure 1 represents a conventional receiver circuit 100 comprising an antenna 110, a low pass filter 120, a Low Noise Amplifier 130, a frequency transposition module 140, and a signal of interest filter 150. A received signal denoted RS, sent by a transmitter (not shown), is received by the antenna 110, and is subjected to the bandpass filter 120 before being supplied on input to the amplifier 130. The amplifier supplies on output an amplified signal denoted AS to the frequency transposition module 140, and finally, the filter 150 extracts a signal of interest comprising recovered data RDT for the receiver and which is also fed back to the amplifier 130 to control the amount of amplification (gain) thereof. The distance between the transmitter and the receiver 100 can vary greatly, affecting the power of the received signal RS by several orders of magnitude. The amplifier 130 maintains the signal in an acceptable range and greatly improves the performances of the receiver 100.

Current transmitter/receiver communication systems use integrated circuits with transistors to perform amplification, which is a linear operation. Consequently, amplifiers must work within their linear domains of operation, yet a transistor can amplify only in the frequency domain below its defined transition frequency denoted Ft. Stable amplifiers 130 require negative feedback, thus the frequency of operation must be in a decade lower than the transition frequency Ft. At terahertz frequencies, i.e. 300 GHz to 3 THz, a Low Noise Amplifier cannot be used to amplify the detected signal, thus the detected signal may be too weak for use.

Thus, conventional receiver architectures are unable to meet the requirements for a terahertz communication system.

SUMMARY OF THE INVENTION

The present invention has been devised to address at least one of the foregoing concerns, in particular to provide a function equivalent to automatic gain control (AGC), in particular for terahertz communications.

Embodiments of the invention relate to a receiver configured to receive a wide band signal comprising a modulated signal transposed with a terahertz wave carrier signal comprising data sampled at a sampling frequency, the receiver comprising: a quadratic detector for detecting the wide band signal, controlled by a control signal, and supplying a recovered symbol rate signal at the sampling frequency, and adjusting means for adjusting the power of the detected wide band signal by modifying the power of the control signal, the control signal being a function of the recovered symbol rate signal and having approximately the same frequency as the wave carrier signal.

The receiver implements a quadratic detector capable of supplying a recovered symbol rate signal, that is to say a signal comprising a fequency that is the image of the symbol rate frequency of the received wide band signal. Advantageously, the receiver uses the recovered symbol rate signal to pilot an automatic gain control AGC circuit, generally defined as a closed-loop regulating circuit that aims to provide a controlled signal amplitude at its output, despite variation of the amplitude in the input signal.The recovered symbol rate signal may be considered to have approximately the same frequency as the wave carrier signal, with slight differences due to noise for example.

According to one embodiment, the receiver further comprises a synchronization module receiving on input the recovered symbol rate signal and supplying on output a synchronized recovered symbol rate signal.

The synchronized recovered symbol rate signal may then be used for the regeneration of a carrier signal, and for the recovery of data.

According to one embodiment, the receiver further comprises a lowpass filter coupled to the quadratic detector and configured to supply a baseband signal on input to the synchronization module, such that the synchronized recovered symbol rate signal is synchronized with the baseband signal.

According to one embodiment, the receiver further comprises power measurement module configured to receive on input the recovered symbol rate signal and to supply on output a measured power of the recovered symbol rate signal, wherein the measured power and the synchronized recovered symbol rate signal are used to adjust the control signal.

According to one embodiment, the receiver further comprises: a carrier signal regenerator module receving on input the synchronized recovered symbol rate signal and supplying on output a regenerated carrier signal; and a power control module configured to receive on input the measured power and the regenerated carrier signal, and to supply on output the control signal to the quadratic detector.

According to one embodiment, the receiver further comprises a carrier signal regenerator module receiving on input the synchronized recovered symbol rate signal and a signal representative of the measured power, and supplying on output the control signal to the quadratic detector.

According to one embodiment, the receiver further comprises a power control module receiving on input the measured power from the power measurement module, and supplies on output a power control signal to the carrier signal regenerator, which comprises at least one multiplier or divider receiving the power control signal.

According to one embodiment, the power control module comprises: an operational transconductance amplifier configured to receive on input the measured power and a first reference voltage, to compare the two values, and to supply on output an error signal, and an operational amplifier configured to receive on input the error signal and a second reference voltage, to shift and to amplify the error signal, and to supply on output the power control signal.

According to one embodiment, the output of the operational transconductance amplifier is connected to ground through a capacitor that integrates the error signal, and wherein the error signal is fedback to the operation transconductance amplifier so as to control the transconductance thereof.

According to one embodiment, the power measurement module comprises: a peak detector configured to rectify and to integrate the level of the recovered symbol rate signal, and a logarithmic amplifier configured to transform the level of the rectified recovered symbol rate signal.

According to one embodiment, the quadratic detector is a plasmonic transistor comprising a gate coupled to an antenna configured to receive the wide band signal. A plasmonic transistor A plasmonic transistor supplies a voltage proportional to the power of the incoming radiation, such that the envelope of the terahertz signal supplied to the gate appears at the open end of the transistor.

According to one embodiment, the drain of the plasmonic transistor is coupled to a bandpass filter supplying the recovered symbol rate signal.

According to one embodiment, the quadratic detector is a mixer comprising Schottky Barrier diodes.

According to one embodiment, the receiver further comprises a radio frequency filter at the output of the detector, configured to filter out the frequency of the transmitted signal.

Embodiments of the invention also relate to a receiver substantially as hereinbefore described with reference to, and as shown in Figures 3 to 6.

BRIEF DESCRIPTION OF THE DRAWINGS

Other particularities and advantages of the invention will also emerge from the following description, illustrated by the accompanying drawings, in which: - Figure 1, previously described, presents a conventional receiver structure, - Figure 2 presents a transmitter configured to operate with receivers according to embodiments of the invention, - Figure 3 presents a receiver according to one embodiment of the invention, - Figure 4 presents a receiver according to another embodiment of the invention, - Figure 5 presents a receiver according to another embodiment of the invention, - Figure 6 presents a receiver according to yet another embodiment of the invention, and - Figures 7A, 7B respectively show a conventional frame of data and a frame of data according to an embodiment of the invention.

Embodiments of the invention relate to a receiver circuit that is simple and based on a quadratic detector coupled to an antenna capable of receiving a terahertz wave. A recovered symbol rate signal, that is to say a signal comprising a fequency that is the image of the symbol rate frequency of the transmitted signal, is supplied on output of the quadratic detector even if the symbol rate signal was not itself transmitted, since the receiver can “recreate” “regenerate” or “recover” the symbol rate signal via reception of the symbols associated with the data.

Advantageously, the receiver uses the recovered symbol rate signal to pilot an automatic gain control AGC circuit, generally defined as a closed-loop regulating circuit that aims to provide a controlled signal amplitude at its output, despite variation of the amplitude in an input signal. Thus, received signals with varying amplitudes may be compensated for, according to the invention, by varying the amplitude of the locally-injected carrier. Such a use of the symbol rate frequency can provide a quicker set-up time, which can be independent of the signal amplitude.

Figure 2 presents a transmitter 200 configured to operate with receivers according to embodiments of the invention. The transmitter 200 comprises a sample and hold module 210, a lowpass filter 220, a delay module 230, a frequency transposition module 240, a carrier signal generator 250, and an antenna 260.

The sample and hold module 210 receives on input a stream of data DT and is synchronized or clocked by a symbol rate signal SS with a frequency FS. The lowpass filter 220 has a cut-off frequency at FS/2 (the Nyquist frequency), removes all frequencies above the Nyquist frequency (including the symbol rate frequency), and prevents the problem of spectral fold-in that would introduce an unwanted image of the analog form of the stream of data DT. Consequently, the symbol rate frequency FS is removed by the lowpass filter 220 and is not transmitted by the transmitter 200.

The delay module 230 compensates for differences between the stream of data DT and a carrier signal CS, and is calculated such that the zero-crossing of both signals are synchronized according to a given ratio between the symbol rate frequency FS and the carrier signal CS. The frequency transposition module 240 transposes the signal supplied by the lowpass filter 220 around the frequency of the carrier signal CS.

The carrier signal generator 250 may comprise several components (here a divider by q 251, a first multiplier by m 252, and a second multiplier by n 253). The first components 251, 252 receive the symbol rate signal SS on input and transform the frequency thereof to an intermediate or reference frequency (a multiple of the input frequency), and the last component 253 allows the carrier signal CS to be generated in a non-linear mode.

As an illustrative example, for a 65 nm CMOS technology, it is possible to create a reference frequency of 90 GHz from a 20 GHz symbol rate frequency FS by first dividing by two (q = 2), then multiply by nine (m = 9) and then by multiplying by three (n = 3) to obtain a carrier frequency of 270 GHz, a harmonic multiple in the range of 300 GHz, rather than directly multiplying the symbol rate frequency FS by 20 GHz by 13.5, which may be beyond the capacities of a multiplier.

Thus, it may be easier to implement a divider (/d) and multipliers (*m, *n) to generate a carrier signal CS with a frequency that is a whole multiple of the symbol rate frequency FS. The values q, m, n may be predefined or selectable from a set of predetermined coefficients, allowing a plurality of carrier frequencies to be obtained. The first components 251, 252 may define a channel center frequency, with the last component 253 being variable, such that the system is capable of transmitting in different channels.

Other implementations of transmitter architectures may be used, wherein for example a carrier oscillation is created as a fundamental oscillation, but with a technology that has a sufficient transition frequency. In this case, the symbol rate frequency is a division of the carrier frequency.

Figure 3 presents a receiver 300 illustrating the principle of embodiments of the invention. The receiver 300 comprises an antenna 310, a quadratic detector 320, a bandpass filter 330, a lowpass filter 340, a synchronization recovery module 350, a carrier signal regenerator 360, a power measurement module 370, a power control module 380, and finally a data recovery module 390.

The antenna 310 receives a signal RS (“received signal”) from the transmitter, such as the transmitter 200 shown in Figure 2, and supplies the received signal RS to the quadratic detector 320, not shown in detail here.

The output of the quadratic detector 320 is coupled to the filters 330, 340, the bandpass filter 330 being centered on the symbol rate frequency FS, and the lowpass filter 340 cutting off at the Nyquist frequency (equal to FS/2). A recovered symbol rate signal RSS (referred to as “recovered signal” for simplicity in the following) appears at the output of the filter 330 and is applied on input to the synchronization recovery module 350 and to the power measurement module 370.

The synchronization recovery module 350 modifies the phase of the recovered signal RSS and supplies on output a synchronized recovered symbol rate signal SSS (referred to as “synchronized signal” for simplicity in the following), which is supplied to both the carrier frequency regeneration module 360 and to the data recovery module 390. The carrier signal regenerator 360 transforms the synchronized signal SSS by variables *m, *n, /q, and supplies on output a regenerated carrier signal RCS.

The power measurement module 370 receives on input the recovered signal RSS (a sine wave, the amplitude of which is easier to measure than that of a large bandwidth signal), and supplies on output a measured power to the power control module 380. In other words, the power control module 380 aims to adjust the power of the regenerated carrier signal RCS based on the power of the recovered symbol rate signal RSS as measured by the power measurement module 370. Thus, in this embodiment, the power control module 380 receives on input the regenerated carrier signal RCS and supplies a control signal CNS to the quadratic detector 320.

The lowpass filter 340 provides an analog baseband signal BS to the data recovery module 390, which also receives the synchronized signal SSS, and supplies a digital stream of recovered data RDT transmitted with the signal RS. The control signal CNS is able to tune the quadratic detector 320 such that the power of the baseband signal BS may be adjusted as necessary.

Figure 4 presents a receiver 400 according to one embodiment of the invention. With respect to the receiver 300 shown in Figure 3, like elements are shown with like references, for example 3XX, 4XX.

The main elements of the receiver 400 are an antenna 410, a quadratic detector 420, a bandpass filter 430, a lowpass filter 440, a synchronization recovery module 450, a carrier signal regenerator 460, a power measurement module 470, a power control module 480, and a data recovery module 490.

The antenna 410 receives the signal RS, and supplies it to a bandpass filter 411, which limits the bandwidth of the signal RS. Alternatively, the filtering may be done by the antenna 410 itself.

The filtered signal is supplied to the quadratic detector 420, which is here a plasmonic transistor. The operation of a plasmonic transistor is based on the theory that the steady current flow of a field effect transistor (FET) channel can become unstable due to generated plasma waves, which lead to the emission of an electromagnetic radiation at the same frequency as the plasma wave. As is often the case for electromagnetic radiation, the capability of a transistor to generate waves may also be exploited to detect waves, and vice versa.

For a plasmonic transistor, a “plasma” of charge carriers exists at the interface between the different layers of materials (such as between the semiconductor crystal layer and the metallic layers, or between two layers of differently doped crystals), at which the strength of the bonds between the atoms and the electrons is smaller, resulting in higher carrier mobilities. Electromagnetic oscillations result when the carriers are excited by an incoming radiation, and the mobility of the charge carriers in the semiconductor crystal allows currents to flow in the channel of the FET, defining the transition frequency Ft. The charge carriers in the plasma will not flow through the whole channel, but electromagnetic waves will be found in some parts of the channel.

The electromagnetic wave creates a rectified form of an alternating current AC in the channel, which in turn creates a voltage between the source S and the drain D, the voltage being proportional to the power of the incoming radiation, when some asymmetry (obtained by pinching the transistor channel by means of polarization of the gate G) is present between the drain D and the source S. Without asymmetry, the rectified current would be equal at the drain D and the source S, and no voltage would appear across them.

In summary, if the gate G is correctly polarized, that is to say, if one end of the transistor channel is grounded and the other end is open (here the source S is grounded and the drain D is open, the envelope of the terahertz signal supplied to the gate G will appear at the open end.

The plasmonic transistor thus has its gate G coupled to the antenna 410, its source S coupled to ground, and its drain D coupled to the bandpass filter 430 and to the lowpass filter 440.

The bandpass filter 430 is centred on the symbol rate frequency FS, and the lowpass filter 440 is a Nyquist rate lowpass filter. The output of the bandpass filter 430 is supplied on input to a symbol rate amplifier FSA 431 configured to transform a sine wave to a square wave, and to supply on output the recovered signal RSS. The recovered signal RSS is supplied to the synchronization recovery module 450 and to the power measurement module 470. The output of the lowpass filter 440 is supplied to a sampling amplifier SMA 441 that amplifies the data signal to the level needed for the data recovery module 490.

The synchronization recovery module 450 comprises delays 451, a multiplexer 452, a phase selector 453, a phase detector 454, and a digital filter 455. The delays 451 receive the recovered signal RSS on input, are odd in number, and cover a 2*π (pi) radians phase shift at the symbol rate frequency FS. The odd number should be selected as a number not present in the decomposition of the multiplication factor. For example, if the multiplication factor is 20, the decomposition is 2*2*5. The number of delay lines may be 7, 11, 13 etc, but not 5 nor 10. The phase adjustment operates as a vernier or caliper (providing a higher adjustment accuracy), with a minimum number of delay lines.

The multiplexer 452 receives the delayed signals on input and a phase signal from the phase selector 453, which decreases or increases the number of delay lines added one to the other, depending on the polarity of the signal at the output of the digital filter 455. The sum of the delay lines must cover 2*pi radians of phase shift minus one elementary delay (so as to completely shift a cycle). The multiplexer 452 supplies on output the synchronized signal SSS, which is supplied to the data recovery module 490, the phase detector 454, and to the carrier signal regenerator 460.

The data recovery module 490 receives on input the data signal from the amplifier 441, and is clocked or synchronized by the signal SSS, supplying recovered data RDT on output. The phase detector 454 also receives on input the data signal from the amplifier 441, is clocked or synchronized by the signal SSS, and supplies a negative output when the symbol rate (represented by the synchronized signal SSS) lags the data, a positive output when the symbol rate leads the data, and a zero output when the two are synchronized. The next delay after the maximum delay shift is back to zero (phase wrap). The output of the phase detector 454 is supplied on input to the filter 455, the output of which is supplied on input to the phase selector 453.

The filter 455 is a lowpass filter, preventing a fast transition from one delay line to another. In one embodiment, the digital filter 455 comprises two counters, one counting positive outputs of the phase detector 454, the other counting negative outputs of the phase detector 454. At a certain count determined by the desired reaction speed of the loop, the two counters are reset and an indication to select the previous delay line or the next delay line is sent to the phase selector 453 depending on the first counter that reached the preset count.

In one embodiment, the filter 455 comprises an analog filter and two comparators to generate a signal to increment or decrement the index of the phase selector 453. In another embodiment, the filter 455 comprises an analog to digital converter with a signal processor implementing a second order or higher digital filter.

The carrier signal regenerator 460 comprises several components: a divider (by q) 461, a first multiplier (by m) 462, and a second multiplier (by n) 463. The divider 461 receives on input the synchronized signal SSS, and may have variable q values supplied on input, as needed. The output of the divider 461 is supplied on input to the first multiplier 462, which may also have variable m values supplied on input, as needed. The output of the first multiplier 462 is supplied on input to the second multiplier 463, which also receives on input a power control signal supplied by the power control module 480. The regenerated carrier signal on output of the regenerator 460 is thus synchronized to the recovered signal, and depends on the measured power thereof, and acts as a control signal CNS for the quadratic detector 420, the system forming a Phase Locked Loop. The values of m and q can be predefined, or may belong to a set of predetermined coefficients, and define a channel center frequency. The receiver is capable of receiving in different channels.

The power measurement module 470 receives on input the recovered signal RSS, as described before in relation with Figure 3, and supplies on output a signal to the power control module 480, which, as previously mentioned, supplies on output the power control signal to the second multiplier 463 of the carrier signal regenerator 460. A bandpass filter 495 is interposed between the output of the multiplier 463 and the gate G of the plasmonic transistor 420 to isolate the DC domains of the multiplier 463 and the transistor 420 and to improve the spectral purity of the control signal CNS.

Even if the received signal RS does not contain any energy at the carrier frequency, the recovered signal RSS appears at the output of a quadratic detector because of the regenerated carrier signal, that is to say the control signal CNS in this embodiment.

The received signal RS (denoted Sr(t) in the equations below, by convention) at the input of the quadratic detector is given as follows:

Sr(t)= (Sc + Sb(t)) * cos(ujct) + Sg cos(u)ct+ φ) [equation 1] wherein Sb(t) is the baseband signal (BS), fc is the carrier frequency, ω0 (omega sub-c) is the pulsation, Sc*cos(u)G t) is the carrier signal (CS), Sc is the amplitude of the carrier signal, Sb(t) * cos(u)ct) is the transposed baseband signal, Sg is the amplitude of the regenerated carrier signal (RCS) at the receiver, and φ (phi) is the phase between the carrier and the regenerated carrier. The phase between the carrier signal CS and the baseband signal BS is zero since they have been both generated by the recovered signal RSS.

Equation 1 can be written as follows:

[equation 1b]

The recovered signal RFS (denoted Sd(t) in the equations below, by convention) is proportional to the square of the received signal, so the recovered signal may be written as follows:

[equation 2]

The resulting signal at baseband frequency is:

[equation 2b]

Further development gives :

[equation 2c]

Taking into account only the time-varying terms, gives a result of:

[equation 2d]

For a hypothesis that the amplitude Sc of the carrier signal CS is small compared to the amplitude Sg of the regenerated carrier signal RCS, no destructive additions occur. However, it is important that the sign of Sb(t) not be changed, which means that the phase stays in the first quadrant. The system has an inherent phase ambiguity of π (pi). The flow of data must contain some known sequences to allow this ambiguity to be discarded. The recovered signal RSS is reconstructed from the signal RS and is necessarily in phase with the recovered data RDT.

The synchronization recovery module 450 adjusts the phase of the recovered signal RFS so that the energy in the sampled data is at a maximum. Since the synchronized signal SFS is also used for the carrier frequency regeneration, it is shifted so as to reduce the angle φ to zero. Thus, any delay due to the connections where the high frequency carrier signal passes will be corrected. The synchronization does not need to be finely adjusted since the οοε(φ) function does not vary much around the abscissa 0. (Its limited development being 1+ x2/2). In other words, since any delays due to the routing of the carrier signal are inside the loop, no uncontrolled phases are created.

The signal detection creates a large quantity of DC power (signals Sg, Sc). A DC-free modulation is needed to avoid any problems created by this DC power. Decoupling capacitors may be used prior to the amplification of the baseband signal (just before the amplifier 441) or prior to the amplification of the recovered signal Gust before the amplifier 431).

Figure 5 presents a receiver 500 according to another embodiment. The receiver 500 comprises an antenna 510, a plasmonic transistor 520, a bandpass filter 530, a carrier signal regenerator 560, an amplitude measurement module 570, a power control module 580, and a bandpass filter 595.

Other elements, such as the lowpass filter (eq. 440), synchronization recovery circuit (eq. 450), and data recovery circuit (eq. 490), are not shown here for the sake of simplicity.

As previously, a signal RS is received by the antenna 510, supplied to the gate G of the plasmonic transistor 520, the drain of which is coupled to the bandpass filter 530, the output of which supplies the recovered signal RFS to the power measurement module 570.

The power measurement module 570 comprises a peak detector 571 and a logarithmic amplifier LOG 572. The peak detector 571 rectifies and integrates the level of the recovered signal, which is then transformed by the logarithmic amplifier 572 to its logarithm, and a measured power is supplied on output. This operation is equivalent to providing an exponential variable gain to the automatic gain control.

The power control module 580 comprises an operational transconductance amplifier OTA 581, and an operational amplifier OPA 582. The amplifier 581 receives on one input the measured power from module 570, and on another input a first reference voltage Vrefl to which the output of module 570 is compared. The amplifier 581 supplies an error signal ERR on output, which is further connected to ground through a capacitor C, which integrates the error signal ERR, and is also fed back to the amplifier 581 so as to control the transconductance thereof by providing a signal-level independent behavior, such as described by J. Khoury, “On the design of constant settling time AGO circuits”.

The amplifier 582 receives on one input the error signal ERR, and on another input a second reference voltage Vref2. The amplifier 582 shifts and amplifies the error signal ERR, supplying a power control signal on output, the power control signal presenting the correct transfer function to power the multiplier 563 of the carrier signal regenerator 560. The multiplier 563 controls the power of the signal supplied to the gate of the plasmonic transistor 520 as a control signal CNS, which is a function of the output of the power control module 580.

The bandpass filter 595, interposed between the output of the multiplier 563 and the gate G of the plasmonic transistor 520, isolates the DC domains of the multiplier 563 and the transistor 520, and improves the spectral purity of the signal supplied by the multiplier 563.

Figure 6 presents a receiver 600 according to another embodiment. With respect to the receiver 400 shown in Figure 4, the same elements are shown with the same references, 4XX, 6XX, and will not be described again for the sake of simplicity.

The main difference with respect to Figure 4 is that the quadratic detector is a mixer comprising Schottky Barrier Diodes, instead of a plasmonic transistor.

The terahertz signal received by the antenna 610 is filtered by the bandpass filter 611 and is supplied to the quadratic detector 620, which comprises a pair of diodes mounted head-to-tail to form a mixer of a signal supplied by a radio-frequency or RF filter 621 that filters out the remaining terahertz frequency from a bandpass filter 695, arranged at the output of the carrier signal regenerator 650, and the filtered terahertz signal.

In contrast to conventional wireless communication systems, the present system does not require a specific synchronization signal. However, the transmitted data may comprise a recognizable pattern to indicate the start of payload data, or else the start of a frame that may contain service information as well as payload data, disclosed in more detail below in relation with Figure 7.

This feature allows a receiver to join a broadcast flow of data. Upon start-up, the receiver will synchronize to a flow of data being sent to other receivers, without requiring the sending of redundant signals for synchronization as is done in other communication systems.

The settling time of the receiver defines the reaction time of reaction of the automatic gain control AGC to a change in level of the received signal.

For the receiver shown in Figure 5, the settling time Ts is as follows: T s=C/(G 1 *Gm 1 *G2*SI) wherein G1 is the gain of the log-amplifier 572, Gm1 is the transconductance of the operational transconductance amplifier 581, C is the value of the capacitance, G2 is the gain of the operational amplifier 582, and SI is the slope of the response of the detecting plasmonic transistor 520.

The set-up can be very fast, if the measure is made on the symbol rate frequency FS. For example, if this frequency is 10 GHz, the capacitor C can be selected in the range of tens of nano-farads nF, providing an integration factor of about a hundred, and a set-up time of less than a few nanoseconds ns.

If the measure is made on the data, it is difficult to determine the power of the signal as the signal is random. For a 10 GHz symbol rate frequency FS, the signal contains maximum frequencies of less than 5 GHz, but according to the signal spectrum, there is a greater chance of having low frequencies appearing than high frequencies. With this condition it is necessary to have quite a long integration time, on the order of a microsecond mS or more, to collect the energy of the wideband signal.

The proposed scheme, with a unique frequency to measure is extremely advantageous in comparison.

Figures 7A, 7B respectively show a conventional frame of data and a frame of data according to an embodiment of the invention.

For correct transmissions in digital wireless systems, a transmitter and a receiver must have a common reference of time, in order to avoid sampling the data at its transition, when it crosses zero and is thus undeterminable. A specific sequence of symbols in the flow of data (commonly called “a frame”) from the transmitter to the receiver may be used to obtain the common reference. A frame typically comprises specific sequences of symbols that indicate to the receiver the beginning and the end of “payload” data (the data of interest) within a received stream of symbols.

With wireless systems, the specific sequence must also contain a sequence of symbols that allow the receiver to adjust its automatic gain control (AGC) and its synchronization. The sequence of symbols for this purpose must have a stable amplitude so that the AGC can adapt, as well as easy clock recovery.

Figure 7A illustrates a frame F1 comprising four portions P1 to P4 (not necessarily to scale). The first portion P1 (AGC) provides automatic gain control and has a period Ts. In general, the portion P1 is a random sequence of symbols that belongs to a subset of symbols generating the same signal amplitude. The period Ts must be longer than the maximum set up time for the gain control (approximately several hundreds of symbols), and generally this set up time depends on the amplitude difference between a previously-received signal and a presently-received signal, and on an integration constant used in the gain control circuit, the integration constant depending on the bandwidth of the signal to be measured. Wth a set of randomly-chosen symbols, the period Ts must be long enough to ensure that the energy of the whole bandwidth has been measured.

The second portion P2 (SYNC) of the frame allows for synchronization and comprises a defined sequence that is poor in spectral content, generally with a peak-to-average ratio that is higher than that of a normal data sequence. Synchronization is obtained by correlation of this defined sequence with a local copy stored on the side of the receiver, resulting in a correlation signal. To clearly discriminate this synchronization signal with respect to noise, the portion P2 has a duration Tsync that is quite long (approximately several tens of symbols).

The third portion P3 (SIG) comprises a pre-determined sequence of symbols used to signal the beginning of the payload data, and also to remove any phase ambiguity occurring when the receiver uses a local oscillator.

The fourth portion P4 (DATA) comprises the payload data itself, that is to say, the data of interest for the communication.

Figure 7B shows a frame sequence F2 according to an embodiment of the invention. The frame F2 comprises merely a first portion F13 (SIG) signaling payload data and a second portion F14 (DATA) comprising the payload data itself.

The receiver according to embodiments of the invention disclosed above allows a fast set up time (the automatic gain control and synchronization portions no longer being necessary), since due to the measurement on the symbol rate frequency, the bandwidth for the measurement of the signal is small, thus the integration time is also short. Furthermore, if the control loop comprises a log amplifier (as shown in relation with Figure 5), the integration time is constant and independent of the amplitude difference between the previously-received signal and the presently-received signal. The synchronization signal varies in amplitude according to the distance between transmitter and receiver, and not according to the amplitude of the data symbols. It can be shown that the time to set up the synchronization is a function of the number of delay lines multiplied by the time constant of the lowpass filter governing the choice of multiplexer channel.

Thus, in contrast with many current wireless communication systems, there is no need for the automatic gain control portion P1, nor for the synchronization portion P2, as for frame F1. However, the frame F2 comprises a recognizable pattern- the signalization portion P13 that signals the start of payload data, or the start of a frame that may contain service information as well as payload data.

Consequently, as there is no need for a specific sequence of data for the setup, the receiver can join a broadcast flow of data by synchronizing upon start up to a flow of data that is being sent to other devices. Advantageously, it is no longer necessary to send redundant signals for synchronization (which create a high peak-to-average ratio, burdening transmitter linearity) as in other wireless communication systems.

Although the present invention has been described hereinabove with reference to specific embodiments, the present invention is not limited to the specific embodiments, and modifications which lie within the scope of the present invention will be apparent to a person skilled in the art. Many further modifications and variations will suggest themselves to those versed in the art upon making reference to the foregoing illustrative embodiments, which are given by way of example only and which are not intended to limit the scope of the invention as determined by the appended claims. In particular different features from different embodiments may be interchanged, where appropriate.

Claims

1. A receiver configured to receive a wide band signal comprising a modulated signal transposed with a terahertz wave carrier signal comprising data sampled at a sampling frequency, the receiver comprising: a quadratic detector for detecting the wide band signal, controlled by a control signal, and supplying a recovered symbol rate signal at the sampling frequency, adjusting means for adjusting the power of the detected wide band signal by modifying the power of the control signal, the control signal being a function of the recovered symbol rate signal and having approximately the same frequency as the wave carrier signal.

2. The receiver according to claim 1, further comprising a synchronization module receiving on input the recovered symbol rate signal and supplying on output a synchronized recovered symbol rate signal.

3. The receiver according to claim 2, further comprising a lowpass filter coupled to the quadratic detector and configured to supply a baseband signal on input to the synchronization module, such that the synchronized recovered symbol rate signal is synchronized with the baseband signal.

4. The receiver according to one of claims 2 or 3, further comprising a power measurement module configured to receive on input the recovered symbol rate signal and to supply on output a measured power of the recovered symbol rate signal, wherein the measured power and the synchronized recovered symbol rate signal are used to adjust the control signal.

5. The receiver according to claim 4, further comprising: a carrier signal regenerator module receving on input the synchronized recovered symbol rate signal and supplying on output a regenerated carrier signal; and a power control module configured to receive on input the measured power and the regenerated carrier signal, and to supply on output the control signal to the quadratic detector.

6. The receiver according to claim 4, further comprising a carrier signal regenerator module receiving on input the synchronized recovered symbol rate signal and a signal representative of the measured power, and supplying on output the control signal to the quadratic detector.

7. The receiver according to claim 6, further comprising a power control module receiving on input the measured power from the power measurement module, and supplies on output a power control signal to the carrier signal regenerator, which comprises at least one multiplier or divider receiving the power control signal.

8. The receiver according to claim 7, wherein the power control module comprises: an operational transconductance amplifier configured to receive on input the measured power and a first reference voltage, to compare the two values, and to supply on output an error signal, and an operational amplifier configured to receive on input the error signal and a second reference voltage, to shift and to amplify the error signal, and to supply on output the power control signal.

9. The receiver according to claim 8, wherein the output of the operational transconductance amplifier is connected to ground through a capacitor that integrates the error signal, and wherein the error signal is fedback to the operation transconductance amplifier so as to control the transconductance thereof.

10. The receiver according to one of claims 4 to 9, wherein the power measurement module comprises: a peak detector configured to rectify and to integrate the level of the recovered symbol rate signal, and a logarithmic amplifier configured to transform the level of the rectified recovered symbol rate signal.

11. The receiver according to one of claims 1 to 10, wherein the quadratic detector is a plasmonic transistor comprising a gate coupled to an antenna configured to receive the wide band signal.

12. The receiver according to claim 11, wherein the drain of the plasmonic transistor is coupled to a bandpass filter supplying the recovered symbol rate signal.

13. The receiver according to claim 1, wherein the quadratic detector is a mixer comprising Schottky Barrier diodes.

14. The receiver according to claim 13, further comprising a radio frequency filter at the output of the detector, configured to filter out the frequency of the transmitted signal.

15. A receiver substantially as hereinbefore described with reference to, and as shown in Figures 3 to 6.