GB2545027A

GB2545027A - Receiver with automatic gain control by a direct current closed loop

Info

Publication number: GB2545027A
Application number: GB1521466.1A
Authority: GB
Inventors: Le Bars Philippe; Achir Mounir; Thoumy François
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2015-12-04
Filing date: 2015-12-04
Publication date: 2017-06-07
Also published as: GB201521466D0

Abstract

The disclosed receiver comprises an antenna configured to receive a signal in the terahertz frequency range and to couple this signal to the gate of a plasmonic FET 312. The received signal is modulated with data that has been sampled at a symbol rate frequency. Also coupled to the gate of the plasmonic FET 312 is a dc bias control signal representative of the power of the transmitted signal at the symbol rate frequency. The received terahertz signal excites carriers in the plasmonic FET 312 and causes a dc voltage to arise between the source S and the drain D proportional to the power of the incoming radiation. The voltage developed across the FET 312 passes to a low pass filter 314 for data recovery, and to a bandpass filter 313 centred on the symbol rate. The strength of the symbol rate signal is measured 321, compared with a reference 322 and used to control a dc bias source 324 of the plasmonic FET.

Description

RECEIVER WITH AUTOMATIC GAIN CONTROL BY A DIRECT CURRENT CLOSED LOOP

FIELD OF THE INVENTION

The invention relates to the field of wireless communication systems, in particular to a receiver comprising a plasmonic transistor and automatic gain control for terahertz communications.

BACKGROUND OF THE INVENTION

Wireless communications, the transfer of data between a transmitter and a receiver not connected by wires, may be performed at different frequencies of the electromagnetic spectrum.

Figure 1 represents a conventional receiver circuit 100 comprising an antenna 110, a bandpass filter 120, a low noise amplifier LNA 130, a frequency transposition module 140, and a signal of interest filter 150. A received signal denoted RS, sent by a transmitter (not shown), is received by the antenna 110, and is filtered by the filter 120 before being supplied on input to the amplifier 130. The amplifier supplies on output an amplified signal denoted AS to the frequency transposition module 140, and finally, the filter 150 extracts a signal of interest comprising recovered data RDT and which is also fed back to the amplifier 130 to control the amount of amplification (gain) thereof. In parallel, the recovered data RDT is transmitted to a processing module (not shown) for processing.

Since the distance between the transmitter and the receiver 100 can vary greatly, affecting the power of the signal RS by several orders of magnitude, the amplifier 130 aims to maintain the signal in an acceptable range in order to improve the performances of the receiver 100.

Current transmitter/receiver communication systems use integrated circuits with transistors to perform amplification, which is a linear operation. Consequently, amplifiers must work within their linear domains of operation, yet a transistor can amplify only in the frequency domain below its defined transition frequency (denoted Ft). Stable amplifiers 130 require negative feedback, thus the frequency of operation must be in a decade lower than the transition frequency Ft.

Though experimental transistors can reach transition frequencies of 1 terahertz (THz), current mass-produced devices using CMOS (Complementary Metal Oxide Semiconductor) transistors are only able to reach transition frequencies Ft of several hundred gigahertz GHz. Thus, current CMOS transistors cannot be used to produce a receiver with a Low Noise Amplifier 130 operating at THz frequencies, i.e. from 300 GHz to 3 THz.

Likewise, in order for the transposition module 140 to operate at terahertz frequencies, its diodes should have a limited capacitance, generally requiring the fabrication of the capacitance on an air gap. As it is difficult to obtain a very thin semiconductor crystal over an air bridge, the manufacturing yield is generally poor, and thus the device is expensive.

Thus, conventional receiver architectures are unable to meet the requirements for a terahertz communication system.

SUMMARY OF THE INVENTION

The present invention has been devised to address at least one of the foregoing concerns, in particular to provide automatic gain control (AGC), in particular for terahertz communications.

According to one aspect of the invention, there is provided a receiver configured to perform wireless communication with a transmitter and comprising: an antenna configured to receive a transmitted signal comprising a modulated signal transposed with a carrier signal comprising data sampled at a symbol rate frequency; and a plasmonic field effect transistor comprising a gate coupled to the antenna and configured to receive a measure of the power of the transmitted signal at the symbol rate frequency to control the biasing of the plasmonic field effect transistor.

The receiver implements a plasmonic field effect transistor, capable of producing a signal between its drain and source that is the image of the symbol rate frequency of the transmitted signal, which may then be used to pilot an automatic gain control circuit, providing a controlled signal amplitude to the gate of the plasmonic field effect transistor, biasing the gate.

According to an embodiment, the transistor further comprises a drain coupled to: a lowpass filter configured to supply a data signal comprising the transmitted data, and a bandpass filter configured to supply a recovered symbol rate signal that is a function of the symbol rate frequency.

The filters are implemented to supply the data for the purposes of the receiver, and the recovered symbol rate signal for the purposes of the automatic gain control.

According to an embodiment, the gate of the plasmonic field effect transistor is biased as a function of the magnitude of the recovered symbol rate signal.

According to an embodiment, the gate of the plasmonic field effect transistor is biased as a function of the magnitude of the modulated signal.

According to an embodiment, the transmitted signal is a signal of at least 300 GHz.

The receiver may operate in the range of terahertz communications.

According to an embodiment, the receiver further comprises means for controlling the biasing of the plasmonic field effect transistor comprising: a power measurement module configured to receive on input the recovered symbol rate signal, a comparator unit configured to receive on input a power measurement representative of the recovered symbol rate signal and a first reference voltage, and to supply on output an error signal, a transposition unit configured to receive on input the error signal and to supply on output a modified error signal, modified by an application dependent nonlinear function, and a direct current voltage source configured to adjust the gate voltage supplied to the gate of the plasmonic transistor as a function of the modified error signal.

According to an embodiment, the power measurement module comprises: a peak detector configured to rectify and to integrate the level of the recovered symbol rate signal, and a logarithmic amplifier configured to transform the level of the rectified recovered symbol rate signal.

According to an embodiment, the comparator unit comprises an operation transconductance amplifier receiving the output of the power measurement module on one input and the first reference voltage on another input, and supplying on output the error signal.

According to an embodiment, the output of the operation transconductance amplifier is connected to ground through a capacitor that integrates the error signal, and wherein the error signal is fedback to the operation transconductance amplifier so as to control the transconductance of the operation transconductance amplifier.

According to an embodiment, the transposition unit comprises an operational amplifier receiving the error signal on one input and a second reference voltage on another input, and supplying a shifted and amplified error signal on output.

According to an embodiment, the receiver further comprises an open between the output of the operational amplifier and the gate of the plasmonic transistor.

According to an embodiment, the receiver further comprises a lowpass filter with a cutoff frequency equal to half of the symbol rate frequency.

Embodiments of the invention also relate to a receiver substantially as described herein, with reference to, and as shown in, Figures 3 and 5.

According to another aspect of the invention, there is provided a system comprising a transmitter and a receiver according to an embodiment of the invention, the transmitter and the receiver being configured to perform wireless communication with each other.

BRIEF DESCRIPTION OF THE DRAWINGS

Other particularities and advantages of the invention will also emerge from the following description, illustrated by the accompanying drawings, in which: - Figure 1, previously described, presents a conventional receiver structure, - Figure 2 presents a transmitter configured to operate with receivers according to embodiments of the invention, - Figure 3 presents a receiver according to one embodiment of the invention, - Figure 4 is a graph of the response of a plasmonic transistor as function of its gate voltage, and - Figure 5 presents a receiver according to another embodiment of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

Embodiments of the invention relate to a receiver circuit that is simple and based on a plasmonic field effect transistor coupled to an antenna capable of receiving a terahertz wave. A signal is then observed between the drain and the source of the transistor, the signal comprising a frequency that is the image of the symbol rate frequency of the transmitted signal, even if a symbol rate signal was not itself transmitted, since the receiver can “recreate” “regenerate” or “recover” the symbol rate signal via reception of the symbols associated with the data.

Advantageously, the receiver uses the recovered symbol rate signal to pilot an automatic gain control AGC circuit, generally defined as a closed-loop regulating circuit that aims to provide a controlled signal amplitude at its output, despite variation of the amplitude in an input signal. Thus, it is desired that the plasmonic transistor vary the amplitude of the received signals as a function of a bias on its gate. Such a use of the recovered symbol rate signal can provide a quicker set-up time, which can be independent of the signal amplitude.

Figure 2 presents a transmitter 200 configured to operate with receivers according to embodiments of the invention. The transmitter 200 comprises a sample and hold module 210, a lowpass filter 220, a delay module 230, a frequency transposition module 240, a carrier signal generator 250, and an antenna 260.

The sample and hold module 210 receives on input a stream of data denoted DT and is synchronized or clocked by a symbol rate signal RSS with a frequency FS. The lowpass filter 220 has a cut-off frequency at FS/2 (the Nyquist frequency), removes all frequencies above the Nyquist frequency (including the symbol rate frequency), and prevents the problem of spectral fold-in that would introduce an unwanted image of the analog form of the stream of data DT. Consequently, the symbol rate frequency FS is removed by the lowpass filter 220 and is not transmitted by the transmitter 200.

The delay module 230 compensates for differences between the stream of data DT and a carrier signal denoted CS, and is calculated such that the zero-crossing of both signals are synchronized according to a given ratio between the symbol rate signal SS and the carrier signal. The frequency transposition module 240 transposes the signal supplied by the lowpass filter 220 around the frequency of the carrier signal CS.

The carrier signal generator 250 may comprise several components (here a divider by q 251, a first multiplier by m 252, and a second multiplier by n 253). The first components 251, 252 receive the symbol rate signal SS on input and transform the frequency FS thereof to an intermediate or reference frequency (a multiple of the input frequency), and the last component 253 allows the carrier signal CS to be generated in a non-linear mode.

As an illustrative example, for a 65 nm CMOS technology, it is possible to create a reference frequency of 90 GHz from a 20 GHz symbol rate frequency FS by first dividing by two (q = 2), then multiplying by nine (m = 9), and then multiplying by three (n = 3) to obtain a carrier signal with a frequency of 270 GHZ, a harmonic multiple in the range of 300 GHz, rather than directly multiplying the symbol rate frequency FS of 20 GHz by 13.5, which may be beyond the capacities of a multiplier.

Thus, it may be easier to implement a divider (/d) and multipliers (*m, *n) to generate a carrier signal CS with a frequency that is a whole multiple of the symbol rate frequency FS. The values q, m, n may be predefined or selectable from a set of predetermined coefficients, allowing a plurality of frequencies to be obtained. The first components 251, 252 may define the intermediate or channel center frequency, with the last component 253 being variable (contrary to the component 251 which is not variable), such that the system is capable of transmitting in different channels.

Other implementations of transmitter architectures may be used, wherein for example a carrier oscillation is created as a fundamental oscillation, but with a technology that has a sufficient transition frequency. In this case, the symbol rate frequency is a division of the frequency of the carrier signal.

Figure 3 presents a receiver 300 according to one embodiment of the invention. The receiver 300 comprises a signal reception and filtering sub-circuit 310, a gain control sub-circuit 320, and a data recovery sub-circuit 330.

The signal reception and filtering sub-circuit 310 comprises an antenna 311, a plasmonic transistor 312, a bandpass filter 313, a lowpass filter 314, a symbol rate signal amplifier SSA 315, and a sampling amplifier SMA 316. The antenna 311 is coupled to the gate G of the plasmonic transistor 312, the source S of which is coupled to ground, and the drain D of which is coupled to each of the filters 313, 314.

In this embodiment, the drain D is biased by a current source. In another embodiment, the drain D can be not biased, in other words left open in DC.

The operation of the plasmonic transistor 312 is based on the theory that the steady current flow of a field effect transistor (FET) channel can become unstable due to generated plasma waves, which lead to the emission of an electromagnetic radiation at the same frequency as the plasma wave. As is often the case for electromagnetic radiation, the capability of a transistor to generate waves may also be exploited to detect waves, and vice versa.

For a plasmonic transistor, a “plasma” of charge carriers exists at the interface between the different layers of materials (such as between the semiconductor crystal layer and the metallic layers, or between two layers of differently doped crystals), at which the strength of the bonds between the atoms and the electrons is smaller, resulting in higher carrier mobilities. Electromagnetic oscillations result when the carriers are excited by an incoming radiation, and the mobility of the charge carriers in the semiconductor crystal allows currents to flow in the channel of the FET, defining the transition frequency Ft. The charge carriers in the plasma will not flow through the whole channel, but electromagnetic waves will be found in some parts of the channel.

The electromagnetic wave creates a rectified form of an alternating current AC in the channel, which in turn creates a voltage between the source S and the drain D, the voltage being proportional to the power of the incoming radiation, when some asymmetry (obtained by pinching the transistor channel by means of polarization of the gate G) is present between the drain D and the source S. Without asymmetry, the rectified current would be equal at the drain D and the source S, and no voltage would appear across them.

In summary, if the gate G is correctly polarized, that is to say, if one end of the transistor channel is grounded and the other end is open (here the source S is grounded and the drain D is open), the envelope of the terahertz signal supplied to the gate G will appear at the open end.

The bandpass filter 313 is centered on the symbol rate frequency FS, and the lowpass filter 314 cuts off at the Nyquist frequency. The amplifier 315 receives a recovered symbol rate signal RSS (referred to as “recovered signal” for simplicity in the following) on input and amplifies it to a level required by the data recovery sub-circuit 330, suppliying an amplified recovered symbol rate signal thereto. Likewise, the amplifier 316 also amplifies the data signal to the level needed for the sub-circuit 330.

The gain control sub-circuit 320 comprises a power measurement module 321, a comparator unit 322, a transposition unit 323, and a direct current voltage source 324. The power measurement module 321 receives the recovered signal RSS, which is a sine wave, on input and measures the amplitude thereof, supplying a measured power signal PS. The amplitude of the recovered signal RSS is directly proportional to the power of the received signal RS. The power measurement module 321 may be a diode attached to a low pass filter with a time constant greater than the period of the recovered signal RSS.

The comparator unit 322 receives on input a reference voltage Vref and the measured power signal PS, and subtracts the power signal PS from the reference voltage Vref. The reference voltage Vref is selected according to the characteristics of the transistor 312, in particular the response of the transistor as a function of its gate voltage. The reference voltage Vref is generally calculated such that a zero error is obtained for a voltage Vg corresponding to the mid-point of the linearization of the response curve, for example as shown below in relation with Figure 4. The result is an error signal ERR, which is supplied on input to the transposition module 323.

The transposition module 323 modifies the error signal ERR by a nonlinear function depending on the application, for example a fast or slow set-up of the gain, which may depend on the relative speed of displacement of the receiver 300 with respect to the transmitter. The modified error signal is supplied to the direct current voltage source, which adjusts the gate voltage Vg supplied to the gate of the transistor 312.

The data recovery sub-circuit 330 comprises delays 331, a multiplexer 332, a phase selector 333, a data sampler 334, a phase detector 335, and a digital filter 336. The delays 331 receive the amplified recovered signal RSS on input and supply a delayed signal on output to the multiplexer 332. The delays are odd in number, and cover a 2*π (pi) radians phase shift at the symbol rate frequency FS. The odd number should be selected as a number not present in the decomposition of the multiplication factor. For example, if the multiplication factor is 20, the decomposition is 2*2*5. The number of delay lines may be 7, 11, 13 etc, but not 5 nor 10. The phase adjustment operates as a vernier or caliper (providing a higher adjustment accuracy), with a minimum number of delay lines.

The multiplexer 332 receives the delayed signals on input and a phase signal from the phase selector 333, which compares the phase of the data to the phase of the delayed signal. The phase selector 333 continuously increases or decreases the number of delays, depending on the signal at the output of the low pass filter 314. The sum of the delay lines must cover 2*pi radians of phase shift minus one elementary delay.

The phase detector 335 supplies a negative output when the symbol rate lags the data, a positive output when the symbol rate leads the data, and a zero output when the two are synchronized. The next delay after the maximum delay shift is back to zero (phase wrap). Thus the recovered signal falling edge is driven to the position of the maximum of energy of the data symbol, and selects the value to be digitalized at the moment of greatest energy by clocking the data sampler 334. The delay lines may be, but not necessarily, of approximately identical length and of a number suitable for the requested sampling precision, such as eight, with the result that one-eighth of the half period as the precision for sampling.

Returning to the received signal RS, as it contains energy at the carrier frequency, the recovered signal RSS appears at the output of a quadratic detector.

The received signal RS (denoted Sr(t) in the equations below, by convention) is given by the following equation:

Sr(t)= Sc cos(coGt+ φ) + Sb(t)*cos(coct) [equation 1] wherein Sc is the amplitude of the carrier signal CS cos(coGt+ φ), and Sb(t) is the baseband signal such that the transposed baseband signal is Sb(t)*cos(oct), φ (phi) being the phase between the carrier and the baseband signal, and coc (omega) the pulsation.

Equation 1 may be written as follows:

Sr(t)= Sc [cos(oct)*cos^) + sin(oct)*sin^)] + Sb(t)*cos(oct) [equation 1b]

The recovered signal RSS (denoted Sd(t) in the equations below, by convention) is proportional to the square of the received signal Sr(t) as follows:

Sd(t)= k*[Sc [cos(co0t)*cos^) + sin(coct)*sin^)] + Sb(t)*cos(oct)]A2 [equation 2]

After reduction, the resulting signal at baseband frequency is as follows:

Sd(t)= k*((Sb(t)A2)/2+ (ScA2)/2 + Sb(t)*Sc cosfo)) [equation 2b]

With respect to the spectrum of the detected signal Sd(t), the term ScA2 provides a direct current DC offset, and the term Sb(t)A2 provides another DC offset and multiples of the sampling frequency Fs(t), even if the baseband signal Sb(t) is antipodal, having equal probability of its elements.

If SbO and Sb1 are an elementary waveform carrying 0 and 1 in the baseband Sb signal (A rectangular shape appearing every nT for a duration of T), then:

then pO is the probability that SO appears, and p1 is the probability that S1 [equation 3] i appears.

Here, there are no multiples of the bit period because of the equal probability of SbO and Sb1, and since sb0(f)=-sb1(f), however:

SbOA2(t) = (-1*rect(-t-nT))A2 = Sb1A2(t) = (1*rect(-t-nT))A2 [equation 4]

For the squared Sb signal, the last term of equation 3 is no longer zero. Even if it was not emitted, a sum of Dirac functions at the period of the binary data (nT) appears. In the time domain, this corresponds to a Dirac comb that contains a wave having the same period and in phase with the data. This wave corresponds to the recovered signal.

In general, the symbol rate frequency FS is filtered in the transmitter and not transmitted thereby. Nevertheless, the receiver is able to reconstruct or recover this symbol rate frequency. The amplitude of the symbol rate signal is a function of the amplitude of the received basedband signal; in other words, the modulated signal.

More specifically, this amplitude is a function of Sb(t)A2. The transposed signals at the carrier frequency are equally attenuated during the propagation between the transmitter and the receiver, so the amplitude of the last term of the Bennet formula is directly proportional to the power of the received signal.

Figure 4 is a graph of the response C1 of the plasmonic transistor 312 as a function of its gate voltage Vg. As may be seen in the graph, the response C1 is very linear between 0 and 0.2 Volts at the gate voltage, providing an exponential response of the variable gain. Consequently, the reaction time of the automatic gain control will depend solely on the exponent of the exponential function. As a result, the set-up time for the system will be the same, independent of the distance between the transmitter and the receiver.

Figure 5 presents a receiver 400 according to another embodiment of the invention, providing another possibility of controlling the DC voltage at the gate G of a plasmonic transistor 412. In relation with Figure 3, the same elements are shown with the same ending references for the sake of simplicity, for example 3XX and 4XX. Moreover, the other embodiments of the receiver (in particular the data recovery subcircuit eq. 330), are not shown for the sake of simplicity, but are nevertheless present.

The output of the transistor 412 is supplied on input to a bandpass filter 413, and then is applied to a power measurement module 421, which comprises a peak detector 401 and a logarithmic amplifier LOG 402 of gain G1. The peak detector 401 rectifies and integrates the level of the recovered signal RSS, which is then transformed by the logarithmic amplifier 402 to its logarithm. This operation is equivalent to providing an exponential variable gain to the automatic gain control.

The output of the power measurement module 421 is supplied to a comparator unit 422 comprising an operation transconductance amplifier OTA 403 of gain G2 receiving on one input the output from module 421, and on another input a first reference voltage Vrefl. The amplifier 403 compares the two and supplies an error signal ERR on output. The output of the amplifier 403 is connected to ground through a capacitor C, which integrates the error signal ERR, and is also fed back to the amplifier 403 so as to control the transconductance thereof by providing a signal-level independent behavior, such as described by J. Khoury, “On the design of constant settling time AGO circuits”.

The error signal ERR supplied by the comparator 422 is provided to a transposition unit 423, which comprises an operational amplifier OPA 404 of gain G3. The amplifier 404 receives on one input the error signal ERR, and on another input a second reference voltage Vref2. The operational amplifier 404 operates to shift and to amplify the error signal ERR, so that the signal on output of the transposition unit 423 presents the correct transfer function. As an example, if the reference voltage Vref2 is equal to 0.5 arbitrary units, an error signal ERR causes the amplifier 404 to supply 0.08 Volts (G3*Vref2) to a second gate G of the transistor 412 via an open stub 405, which isolates the amplifier 404 from the terahertz signal received at the gate G, and may be a shunt behaving like a capacitor to ground.

Alternatively, the output of the amplifier 404 can be coupled to a virtual ground of the antenna 411, since antennas having at least one degree of symmetry have a portion that does not comprise any alternating currents. These points are thus ideal for direct current bias inputs.

Although the present invention has been described hereinabove with reference to specific embodiments, the present invention is not limited to the specific embodiments, and modifications which lie within the scope of the present invention will be apparent to a person skilled in the art. Many further modifications and variations will suggest themselves to those versed in the art upon making reference to the foregoing illustrative embodiments, which are given by way of example only and which are not intended to limit the scope of the invention as determined by the appended claims. In particular different features from different embodiments may be interchanged, where appropriate.

Claims

1. A receiver configured to perform wireless communication with a transmitter and comprising: an antenna configured to receive a transmitted signal comprising a modulated signal transposed with a carrier signal comprising data sampled at a symbol rate frequency; and a plasmonic field effect transistor comprising a gate coupled to the antenna and configured to receive a measure of the power of the transmitted signal at the symbol rate frequency to control the biasing of the plasmonic field effect transistor.

2. The receiver according to claim 1, wherein the transistor further comprises a drain coupled to: a lowpass filter configured to supply a data signal comprising the transmitted data, and a bandpass filter configured to supply a recovered symbol rate signal that is a function of the symbol rate frequency.

3. The receiver according to claim 2, wherein the gate of the plasmonic field effect transistor is biased as a function of the magnitude of the recovered symbol rate signal.

4. The receiver according to claim 2 or 3, wherein the gate of the plasmonic field effect transistor is biased as a function of the magnitude of the modulated signal.

5. The receiver according to one of claims 1 to 4, wherein the transmitted signal is a signal of at least 300 GHz.

6. The receiver according to one of claims 2 to 5, further comprising means for controlling the biasing of the plasmonic field effect transistor comprising: a power measurement module configured to receive on input the recovered symbol rate signal, a comparator unit configured to receive on input a power measurement representative of the recovered symbol rate signal and a first reference voltage, and to supply on output an error signal, a transposition unit configured to receive on input the error signal and to supply on output a modified error signal, modified by an application-dependent nonlinear function, and a direct current voltage source configured to adjust the gate voltage supplied to the gate of the plasmonic transistor as a function of the modified error signal.

7. The receiver according to claim 6, wherein the power measurement module comprises: a peak detector configured to rectify and to integrate the level of the recovered symbol rate signal, and a logarithmic amplifier configured to transform the level of the rectified recovered symbol rate signal.

8. The receiver according to one of claims 6 or 7, wherein the comparator unit comprises an operation transconductance amplifier receiving the output of the power measurement module on one input and the first reference voltage on another input, and supplying on output the error signal.

9. The receiver according to claim 8, wherein the output of the operation transconductance amplifier is connected to ground through a capacitor that integrates the error signal, and wherein the error signal is fedback to the operation transconductance amplifier so as to control the transconductance of the operation transconductance amplifier.

10. The receiver according to one of claims 6 to 9, wherein the transposition unit comprises an operational amplifier receiving the error signal on one input and a second reference voltage on another input, and supplying a shifted and amplified error signal on output.

11. The receiver according to claim 10, further comprising an open between the output of the operational amplifier and the gate of the plasmonic transistor.

12. The receiver according to one of claims 1 to 11, further comprising a lowpass filter with a cutoff frequency equal to half of the symbol rate frequency.

13. A receiver substantially as hereinbefore described with reference to, and as shown in Figures 3 and 5.

14. A system comprising a transmitter and a receiver according to one of claims 1 to 13, the transmitter and the receiver being configured to perform wireless communication with each other.