GB2522700A - Amplifier - Google Patents

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Publication number
GB2522700A
GB2522700A GB1401850.1A GB201401850A GB2522700A GB 2522700 A GB2522700 A GB 2522700A GB 201401850 A GB201401850 A GB 201401850A GB 2522700 A GB2522700 A GB 2522700A
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United Kingdom
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signal
filter
output
radiofrequency
amplifier circuit
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GB1401850.1A
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GB201401850D0 (en
GB2522700B (en
Inventor
Julian Whiffen
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Thales Holdings UK PLC
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Thales Holdings UK PLC
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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/34Negative-feedback-circuit arrangements with or without positive feedback
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/34Negative-feedback-circuit arrangements with or without positive feedback
    • H03F1/345Negative-feedback-circuit arrangements with or without positive feedback using hybrid or directional couplers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/336A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/375Circuitry to compensate the offset being present in an amplifier
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/57Separate feedback of real and complex signals being present
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45212Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

A radiofrequency amplifier 100 comprises an input 102 to receive a radiofrequency input signal; an output 132 to provide a radiofrequency output signal; a feedback loop 140 coupled to the output to provide a feedback signal dependent upon the output signal and to subtract the feedback signal from the input signal to obtain a subtracted signal; a demodulator 110 to demodulate the subtracted signal using a first carrier signal having a carrier frequency to obtain an in-phase component I and a quadrature component Q; a first filter 114 to filter the in-phase component to obtain a filtered in-phase component I; a second filter 116 to filter the quadrature component to obtain a filtered quadrature component Q; a modulator 120 to modulate a second carrier signal having the carrier frequency with the filtered in-phase component and the filtered quadrature component to obtain a modulated signal; and an amplifier 130 configured to amplify the modulated signal to obtain the radiofrequency output signal.

Description

Amplifier
FIELD
Embodiments of the present invention relate generally to amplifiers and in particular to amplifiers for generating high power radiofrequency signals.
BACKGROUND
Communication using radiofrequency signals often requires the amplification of signals with a high degree of linearity while also maximising power efficiency.
One method of providing linearity is Cartesian feedback using a Cartesian modulator such as that described in US Patent 4933986. In such an amplifier, the signal at the output pod of the amplifier is demodulated into an in-phase component and a quadrature component in the Cartesian coordinate system. These in-phase and quadrature components are compared to the in-phase and quadrature inputs of the amplifier and the results are applied to a modulator at the input port of the amplifier to provide correction.
In such an amplifier, the demodulator needs to be highly linear and the gain and phase imbalances need to be kept to a minimum. Further, the high power amplifier cannot be developed independently of the system generating the in-phase and quadrature signals. Further, in systems, the radiofrequency signal to be amplified may exist prior to the amplification stage. In such cases a Cartesian modulator cannot be used.
SUMMARY
According to an aspect of the present invention, there is provided an amplifier circuit.
The amplifier circuit has an input configured to receive a radiofrequency input signal and an output configured to provide a radiofrequency output signal. A feedback loop is coupled to the output and configured to provide a feedback signal dependent upon the radiofrequency output signal. The feedback signal is subtracted from the radiofrequency input signal to obtain a subtracted input signal. The amplifier circuit has a complex demodulator which is configured to demodulate the subtracted input signal using a first carrier signal. The outputs from the complex demodulator are an in phase component and a quadrature component. A first filter is configured to filter the in phase component to obtain a filtered in phase component. A second filter configured to filter the quadrature component to obtain a filtered quadrature component. A modulator is configured to modulate a second carrier which has the same carrier frequency as the first carrier signal with the filtered in phase component and the filtered quadrature component to obtain a modulated signal. An amplifier is configured to amplify the modulated signal to obtain the radiofrequency output signal.
In embodiments of the present invention, the complex demodulator is placed in a virtual earth position. This minimises the linearity requirements of the complex demodulator.
This also minimises the gain and phase imbalance performance requirements.
Further, in embodiments allow testing and development to be carried out in a simplified manner since the radiofrequency generation is separated from the amplification.
Additionally, embodiments of the present invention can be used in systems where the radiofrequency signal to be amplified already exists prior to the amplification. In such systems, the amplifier circuit will clean up the wideband parts of the signal due to the characteristics of the feedback loop.
In an embodiment the first filter and/or the second filter is configured such that the gain of the circuit is less than one for signals having frequencies at which there is a phase shift of 180 degrees or more over the feedback loop.
This ensures that the amplifier circuit will be stable and free from oscillations. If the gain is greater than one for frequencies at which there is a phase shift of more than 180 degrees then oscillations could occur since a phase shift of 180 degrees in the feedback loop results in positive feedback occurring at those frequencies.
In an embodiment the first filter and/or the second filter are configured such that the gain of the circuit decreases with frequency at a first rate for a range of frequencies for which the phase shift is less than 180 degrees over the feedback loop and the gain of the circuit decreases with frequency at a second, higher rate for frequencies for which the phase shift is more than 180 degrees over the feedback loop.
The higher rate of decrease in gain with frequency results in suppression of frequencies outside the desired band.
In an embodiment a first DC voltage supply circuit configured to supply a first calibration voltage to be added to the in phase component and a second DC voltage supply circuit configured to supply a second calibration voltage to be added to the quadrature component are included in the amplifier circuit.
In an embodiment a first calibration output coupled to the output of the first filter and a second calibration output coupled to the output of the second filter are included in the amplifier circuit.
The calibration inputs and outputs allow the amplifier circuit to be calibrated. The calibration may take place as a one-off calibration or may take place periodically.
The first filter and/or the second filter may be implemented as comprises an integrators, low pass filters, or proportional integral derivative controllers.
In an embodiment an output filter is arranged to filter the output. The output filter may be configured to suppress harmonics of the carrier frequency.
In an embodiment, the amplifier circuit further comprises a phase shifter configured to obtain the second carrier signal by applying a phase shift to the first carrier signal.
The carrier signal may be generated by an oscillator within the amplifier circuit, or may be received from an oscillator outside the amplifier circuit. The oscillator may be coupled to a radiofrequency unit which generates the radiofrequency input signal using input signal to modulate a carrier signal.
According to an aspect of the present invention a transmitter system comprises a data unit configured to receive an input data signal and encode data from the input data signal on intermediate frequency signals; a radiofrequency unit configured to modulate a carrier signal with the intermediate frequency signals; and an amplifier circuit configured to receive the modulated carrier signal as the radiofrequency input signal.
According to an aspect of the present invention a method of amplifying a radiofrequency input signal to obtain a radiofrequency output signal comprises subtracting a feedback signal from the radiofrequency input signal to obtain a subtracted input signal, the feedback signal being dependent on the radiofrequency output signal; demodulating the subtracted input signal using a first carrier signal having a carrier frequency to obtain an in-phase component and a quadrature component; filtering the in-phase component; filtering the quadrature component; modulating a second carrier signal with the in-phase component and the quadrature component, the second carrier signal having the carrier frequency; and amplifying the modulated signal to obtain the output signal.
BRIEF DESCRIPTION OF THE DRAWINGS
In the following, embodiments of the present invention will be described by way of example with reference to the drawings in which: Figure 1 shows an amplifier circuit according to an embodiment of the present invention; Figure 2 shows a transmitter incorporating an amplifier circuit according to an embodiment of the present invention; Figure 3 shows an amplifier circuit having calibration inputs according to an embodiment of the present invention; and Figure 4 shows a method of calibrating an amplifier circuit.
DETAILED DESCRIPTION
Figure 1 shows an amplifier circuit 100 according to an embodiment of the present invention. The amplifier circuit comprises a demodulator 110, a modulator 120 and an amplifier 130. A feedback loop 140 is coupled to the output of the amplifier 140.
The amplifier 100 has an input terminal 102. The input terminal 102 is configured to receive a radiofrequency input signal. The circuit comprises a subtraction point 104. A feedback signal from the feedback loop 140 is subtracted from the radiofrequency input signal at the subtraction point 104. The subtracted input signal is coupled to the demodulator 110. The demodulator 110 demodulates the subtracted input signal using a carrier signal having a carrier frequency from a local oscillator 112. The demodulated signal has an in phase component I and a quadrature component Q. A first filter 114 filters the in phase component I to obtain a filtered in phase component I'. A second filter 116 filters the quadrature component to obtain a filtered quadrature component Q'.
The filtered in phase component I' and the filtered quadrature component 0' are used to modulate carrier signal by modulator 120. The modulator 120 modulates the carrier signal from the local oscillator 112 which has had a phase shift applied by a phase shifter 122 with the filtered in phase component I' and the filtered quadrature component 0'.
The modulated signal from the modulator 120 is amplified by the amplifier 130. The amplified output from the amplifier fed to an output terminal 132.
The feedback loop 140 is coupled to the output of the amplifier 130. The feedback loop includes an attenuator 142.
The first filter 114 and the second filter 116 are configured to control the gain and phase versus frequency characteristic of the feedback loop so that there is high gain at low frequencies and the gain reduces with frequency. Due to time delays and other parasitic elements in the feedback loop there is a frequency at which the loop has a phase shift of 180 degrees. With this phase shift negative feedback becomes positive feedback and the circuit will oscillate at this frequency if the gain exceeds unity. In order to avoid such oscillations, the filters are configured so that the gain of the feedback loop at frequencies above the frequency for which the phase shift is 180 degrees is less than one.
The first filter 114 and the second filter 116 may be implemented as low pass filters.
The first filter 114 and the second filter may be implemented as proportional integral derivative (PD) controllers which are designed to avoid the type of oscillation discussed above.
The first filter 114 and the second filter 116 may be configured so that the gain decreases with frequency up to the point of unity gain at a first rate and then decreases with frequency at a higher rate. Such a configuration would reduce the output of the amplifier at frequencies outside the intended bandwidth.
The amplifier circuit may be used to amplify a radiofrequency signal obtained by modulating a carrier signal.
Figure 2 shows a transmitter, for example a transmitter of an aeronautical satellite communications system. The transmitter comprises a satellite data unit 200, a radiofrequency unit 300 and a high power amplifier 100. The high power amplifier is the amplifier circuit 100 described above in relation to figure 1.
The satellite data unit 200 receives an input signal 210. The input signal carries data to be transmitted. The satellite data unit 200 has a digital signal processor 220 which processes the input signal 210 and encodes the data on intermediate frequency signals 230 and 240.
The radiofrequency unit 300 receives the intermediate frequency signals 230 and 240.
The radiofrequency unit 300 modulates a carrier signal 310 from an oscillator 320 with the intermediate frequency input signals 230 and 240 into a radiofrequency signal 330.
The high power amplifier 100 amplifies the radiofrequency signal 330. The amplified radiofrequency signal is then transmitted by an antenna 160. The high power amplifier uses the carrier signal 310 from the oscillator 320 to demodulate the radiofrequency signal and to re-modulate the filtered demodulated signals as described in relation to figure 1 above.
In the embodiment described in relation to figure 2 the amplifier 100 does not include a local oscillator. In the embodiment described in relation to figure 2, the amplifier 100 receives the carrier signal from the oscillator 320 that provides the carrier signal 310 to the radiofrequency unit 300.
In an alternative embodiment, the amplifier 100 includes an oscillator to generate the carrier signal to demodulate the radiofrequency input signal. In such embodiments, the amplifier may receive an indication of the carrier frequency, or the oscillator in the amplifier may be preset with the carrier frequency.
In the system shown in Figure 2, the radiofrequency unit and the amplifier unit can be developed, modified and tested independently. Further, amplifier circuits such as that described in relation to figure 1 above, or figure 3 below could be added to existing systems in which radiofrequency signal to be amplified already exists. In the case where an existing radiofrequency signal exists, the feedback loop will clean up the wideband parts of the signal by virtue of its loop characteristic. The loop also provides the effect of linearising the high power amplifier.
Figure 3 shows an amplifier circuit 400 according to an embodiment of the present invention. The amplifier circuit 400 has additional inputs which are used for calibration.
The amplifier circuit 400 has an input terminal 402 which is coupled to a subtractor 404.
The subtractor 404 is configured to subtract a feedback signal from an input signal received at the input terminal 402. The subtractor 404 is coupled to a complex demodulator 410. The complex demodulator 410 is coupled to an oscillator 412. The complex demodulator 410 is configured to demodulate the subtracted input signal with a carrier signal received from the oscillator 412.
The complex demodulator 410 demodulates the subtracted input signal to obtain an in phase component I and a quadrature component Q. The amplifier circuit 400 comprises a calibration digital analogue converter (DAC) 418 coupled to the in phase output of the complex demodulator 410 and a calibration DAC 419 coupled to the quadrature output of the complex demodulator 410. The calibration DACs provide a DC voltage which is combined with the in phase or quadrature component of the demodulated signal.
A proportional integral derivative (PID) controller 414 is coupled with the in phase output of the complex demodulator 410. The PID controller 414 is configured to filter the calibrated in phase component after the in phase component has been combined with the DC voltage from the calibration DAC 418 coupled to the in phase output of the complex demodulator 410.
A second proportional integral derivative (PID) controller 416 is coupled with the quadrature output of the complex demodulator 410. The second PID controller 416 is configured to filter the calibrated quadrature component after the quadrature component has been combined with the DC voltage from the calibration DAC 419 coupled to the in phase output of the complex demodulator 410.
The output from the first PID controller 414 is coupled to an amplifier 428 which supplies a first calibration output 428. The second PID controller 416 is coupled to an amplifier 429 which supplies a second calibration output.
A first successive approximation register (SAR) 450 is coupled to the first calibration output. A second SAR 452 is coupled to the second calibration output.
The calibration process is described in more detail below with reference to figure 4.
A complex modulator 420 is coupled to the output of the first PID controller 414 and the output of the second PID controller 416. The complex modulator 420 is configured to modulate a carrier signal with the filtered in phase and quadrature components. The carrier signal is received by the complex modulator 420 from a phase shifter 422. The phase shifter 422 is configured to apply a phase shift to the signal from the oscillator 412.
The modulated signal from the complex modulator 420 is coupled to an amplifier 430.
The amplifier 430 is configured to amplify the modulated signal. A filter 434 is coupled to the output of the amplifier 434. The filter 434 is a low pass filter or band pass filter configured to suppress harmonics of the carrier signal supplied by oscillator 412.
The output from the filter 434 is provided to an output terminal 432. The output terminal 432 may be connected to an antenna to transmit the radiofrequency output signal.
A feedback ioop 440 is coupled to the output from the filter 434. The feedback loop is configured to carry a feedback signal to the subtractor 404. The feedback loop 440 comprises an attenuator 442 which is configured to attenuate the feedback signal.
Figure 4 shows a method of calibrating the amplifier circuit 400 shown in figure 3. The calibration method shown in figure 4 may take place as a one-off process, or alternatively may be executed on a periodic basis.
In step Si, the input signal supplied to the input terminal 402 is set to zero volts and the attenuator 442 is set to maximum attenuation. This isolates the output of the amplifier 430 from the complex demodulator 410..
In step 52, the voltages on the first calibration DAC 418 and the second calibration DAC 419 are adjusted to reduce the outputs of the first PID 414 and the second PID 416 to as close to zero as possible.. The first calibration DAC 418 may be adjusted separately from the second calibration DAC 419.
The values stored by the first calibration DAC 418 and the second calibration DAC 419 set the DC offset of the PID controllers. The optimum values may be determined by identifying the values for which the outputs of the comparitors 428 & 429 change from low to high.
In step 33, the calibration levels of the first calibration DAC 418 and the second calibration DAC 419 are used as the DC offset levels for the PlO controllers. The calibration DACs add a DC offset to the inputs of the PID controllers.
As described above during calibration the input to the complex demodulator 410 is set to zero by having all the sources to it set to zero. However, the demodulator offsets and the input offsets of the PID controllers will cause the PlO controllers to output a result of integrating these offsets. The calibration DAC signal is intended to cancel the offsets.
The successive approximation register technique is a binary search technique and operates by first setting the DAC to mid-range. This is achieved by setting the most significant bit (MSB) of the DAC to one and all of the others bits to zero. A short amount of time is allowed to pass and then the outputs of the comparators 428 and 429 are examined. From the comparator output, a decision is made on whether to set the MSB to one or zero. Once the most significant bit has been set, the process is repeated for the next most significant bit. The process is repeated for each bit of the DAC in turn.
Other techniques of setting the values of the calibration DACs may be employed. For example, a linear search technique may be employed.
In the amplifiers shown in Figure 1 and Figure 3, the complex demodulator is placed in a virtual earth' position. This minimises the linearity requirements on the complex demodulator. The gain and phase imbalance performance requirements of the complex demodulator are also minimised.

Claims (20)

  1. CLAIMS: 1. An amplifier circuit comprising an input configured to receive a radiofrequency input signal; an output configured to provide a radiofrequency output signal; a feedback loop coupled to the output and configured to provide a feedback signal dependent upon the radiofrequency output signal and to subtract the feedback signal from the radiofrequency input signal to obtain a subtracted input signal; a demodulator configured to demodulate the subtracted input signal using a first carrier signal having a carrier frequency to obtain an in phase component and a quadrature component; a first filter configured to filter the in phase component to obtain a filtered in phase component; a second filter configured to filter the quadrature component to obtain a filtered quadrature component; a modulator configured to modulate a second carrier signal having the carrier frequency with the filtered in phase component and the filtered quadrature component to obtain a modulated signal; and an amplifier configured to amplify the modulated signal to obtain the radiofrequency output signal.
  2. 2. An amplifier circuit according to claim 1 wherein the first filter and/or the second filter is configured such that the gain of the circuit is less than one for signals having frequencies at which there is a phase shift of 180 degrees or more over the feedback loop.
  3. 3. An amplifier circuit according to claim 2 wherein the first filter and/or the second filter are configured such that the gain of the circuit decreases with frequency at a first rate for a range of frequencies for which the phase shift is less than 180 degrees over the feedback loop and the gain of the circuit decreases with frequency at a second, higher rate for frequencies for which the phase shift is more than 180 degrees over the feedback loop.
  4. 4. An amplifier circuit according to any preceding claim, further comprising a first DC voltage supply circuit configured to supply a first calibration voltage to be added to the in phase component and a second DC voltage supply circuit configured to supply a second calibration voltage to be added to the quadrature component.
  5. 5. An amplifier circuit according to claim 4 further comprising a first calibration output coupled to the output of the first filter and a second calibration output coupled to the output of the second filter.
  6. 6. An amplifier circuit according to claim 5, further comprising a first successive approximation register coupled to the first calibration output and configured to set the first calibration voltage, and a second successive approximation register coupled to the second calibration output and configured to set the second calibration voltage.
  7. 7. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprises an integrator.
  8. 8. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprises a low pass filter.
  9. 9. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprise proportional integral derivative controllers.
  10. 10. An amplifier circuit according to any preceding claim further comprising an output filter configured to filter the radiofrequency output signal.
  11. 11. An amplifier circuit according to claim 9 wherein the output filter is configured to suppress harmonics of the carrier frequency.
  12. 12. An amplifier circuit according to any preceding claim further comprising a phase shifter configured to obtain the second carrier signal by applying a phase shift to the first carrier signal.
  13. 13. A transmitter system comprising: a data unit configured to receive an input data signal and encode data from the input data signal on intermediate frequency signals; a radiofrequency unit configured to modulate a carrier signal with the intermediate frequency signals; and an amplifier circuit according to any one of claims 1 to 12 configured to receive the modulated carrier signal as the radiofrequency input signal.
  14. 14. A method of amplifying a radiofrequency input signal to obtain a radiofrequency output signal, the method comprising subtracting a feedback signal from the radiofrequency input signal to obtain a subtracted input signal, the feedback signal being dependent on the radiofrequency output signal; demodulating the subtracted input signal using a first carrier signal having a carrier frequency to obtain an in-phase component and a quadrature component; filtering the in-phase component; filtering the quadrature component; modulating a second carrier signal with the in-phase component and the quadrature component, the second carrier signal having the carrier frequency; and amplifying the modulated signal to obtain the output signal.
  15. 15. A method according to claim 14 wherein filtering the in-phase component and / or filtering the quadrature component comprises controlling the gain for signals having frequencies at which there is a phase shift of 180 degrees or more over a feedback loop to less than one.
  16. 16. A method according to claim 15 wherein controlling the gain comprises decreasing the gain with frequency at a first rate for a range of frequencies for which the phase shift is less than 180 degrees over the feedback loop and decreasing the gain of the circuit with frequency at a second, higher rate for frequencies for which the phase shift is more than 180 degrees over the feedback loop.
  17. 17. A method according to any one of claims 14 to 16, further comprising adding a first calibration voltage to the in phase component and adding a second calibration voltage to the quadrature component.
  18. 18. A method according to claim 17, further comprising a first calibration output coupled to the output of the first filter and a second calibration output coupled to the output of the second filter.
  19. 19. A method according to any one of claims 14 to 18 further comprising filtering radiofrequency output signal.
  20. 20. A method according to any one of claims 14 to 19 further comprising obtaining the second carrier signal by applying a phase shift to the first carrier signal.Amendments to the claims have been filed as follows CLAIMS: 1. An amplifier circuit comprising an input configured to receive a radiofrequency input signal; an output configured to provide a radiofrequency output signal; a feedback loop coupled to the output and configured to provide a feedback signal dependent upon the radiofrequency output signal and to subtract the feedback signal from the radiofrequency input signal to obtain a subtracted input signal; a demodulator configured to demodulate the subtracted input signal using a first carrier signal having a carrier frequency to obtain an in phase component and a quadrature component; a first filter configured to filter the in phase component to obtain a filtered in phase component; a second filter configured to filter the quadrature component to obtain a filtered quadrature component; a modulator configured to modulate a second carrier signal having the carrier 0') frequency with the filtered in phase component and the filtered quadrature component 0 to obtain a modulated signal; and C'.J an amplifier configured to amplify the modulated signal to obtain the T 20 radiofrequency output signal.2. An amplifier circuit according to claim I wherein the first filter and/or the second filter is configured such that the gain of the circuit is less than one for signals having frequencies at which there is a phase shift of 180 degrees or more over the feedback loop.3. An amplifier circuit according to claim 2 wherein the first filter and/or the second filter are configured such that the gain of the circuit decreases with frequency at a first rate for a range of frequencies for which the phase shift is less than 180 degrees over the feedback loop and the gain of the circuit decreases with frequency at a second, higher rate for frequencies for which the phase shift is more than 180 degrees over the feedback loop.4. An amplifier circuit according to any preceding claim, further comprising a first DC voltage supply circuit configured to supply a first calibration voltage to be added to the in phase component and a second DC voltage supply circuit configured to supply a second calibration voltage to be added to the quadrature component, 5. An amplifier circuit according to claim 4 further comprising a first calibration output coupled to the output of the first filter and a second calibration output coupled to the output of the second filter.6. An amplifier circuit according to claim 5, further comprising a first successive approximation register coupled to the first calibration output and configured to set the first calibration voltage, and a second successive approximation register coupled to the second calibration output and configured to set the second calibration voltage.7. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprises an integrator.8. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprises a low pass filter.9. An amplifier circuit according to any preceding claim wherein the first filter and/or the second filter comprise proportional integral derivative controllers.10. An amplifier circuit according to any preceding claim further comprising an output filter configured to filter the radiofrequency output signal.11. An amplifier circuit according to ctaim 10 wherein the output filter is configured to suppress harmonics of the carrier frequency.12. An amplifier circuit according to any preceding claim further comprising a phase shifter configured to obtain the second carrier signal by applying a phase shift to the first carrier signal.13. A transmitter system comprising: a data unit configured to receive an input data signal and encode data from the input data signal on intermediate frequency signals; a radiofrequency unit configured to modulate a carrier signal with the intermediate frequency signals; and an amplifier circuit according to any one of claims 1 to 12 configured to receive the modulated carrier signal as the radiofrequency input signal.14. A method of amplifying a radiofrequency input signal to obtain a radiofrequency output signal, the method comprising subtracting a feedback signal from the radiofrequency input signal to obtain a subtracted input signal, the feedback signal being dependent on the radiofrequency output signal; demodulating the subtracted input signal using a first carrier signal having a carrier frequency to obtain an in-phase component and a quadrature component; filtering the in-phase component to obtain a filtered in-phase component; filtering the quadrature component to obtain a filtered quadrature component; modulating a second carrier signal with the filtered in-phase component and the filtered quadrature component, the second carrier signal having the carrier frequency; 0) and o amplifying the modulated signal to obtain the output signal.15. A method according to claim 14 wherein filtering the in-phase component and I or filtering the quadrature component comprises controlling the gain for signals having frequencies at which there is a phase shift of 180 degrees or more over a feedback loop to less than one.16. A method according to claim 15 wherein controlling the gain comprises ¶ decreasing the gain with frequency at a first rate for a range of frequencies for which the phase shift is less than 180 degrees over the feedback loop and decreasing the gain with frequency at a second, higher rate for frequencies for which the phase shift is more than 180 degrees over the feedback loop.17. A method according to any one of claims 14 to 16, further comprising adding a first calibration voltage to the in phase component and adding a second calibration voltage to the quadrature component.18. A method according to claim 17, further comprising detecting a first calibration output coupled to the filtered in-phase component and detecting a second calibration output coupled to the filtered quadrature component.19. A method according to any one of claims 14 to 18 further comprising filtering radiofrequency output signal.20. A method according to any one of claims 14 to 19 further comprising obtaining the second carrier signal by applying a phase shift to the first carrier signal. a)
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