GB2513322A

GB2513322A - Power supply

Info

Publication number: GB2513322A
Application number: GB1307253.3A
Authority: GB
Inventors: Phillip Knowles
Original assignee: Harvard Engineering PLC
Current assignee: Harvard Engineering PLC
Priority date: 2013-04-22
Filing date: 2013-04-22
Publication date: 2014-10-29
Anticipated expiration: 2033-04-22
Also published as: WO2014174271A3; GB201307253D0; GB2513322B; WO2014174271A2

Abstract

A switch mode power supply or power factor correction unit (PFC) and method for controlling the supply of power from an AC power source 11, 12 to a load, comprising: input terminals for connecting to an AC power source 11,12; at least one output terminal 13 for connecting to a load; an inductor (or inductive transformer L1,L2); a controllable switching device S1 connected to the inductor L1,L2 and controllable to control current flow in the inductor so as to control the supply of power from the connected AC power source, via the inductor, to a connected load; and control means 2 which comprises a drive output terminal 21 to drive a signal to the switching device S1 to control the switching device, the drive signal substantially comprising a square wave signal alternating between a first state and a second state (figure 3). The control means further comprises an input terminal 22 arranged to receive an input signal, derived from the drive signal 21, and responsive to the input signal to switch the drive signal from the first state to the second state in response to the input signal falling below a threshold voltage and to inhibit switching of the drive signal from the first state to the second state if the input signal is above the threshold. An adaptive switching current control circuit 3 (figure 2) provides an inhibit signal to the control means (PFC controller 2) using the drive and control signals as inputs 31,33. An embodiment is based on a flyback converter (figure 1). A method is also disclosed whereby the square wave signal drive is provided as an input to a controller (figure 2) and relies on storage of charge in a capacitor (C11 figure 2) during the one of the two states of the input square waveform.

Description

Power Supply [0001] The present invention relates to power supplies for controlling the supply of power from an AC power source to a load, and in particular, although not exclusively, to power supplies comprising power factor correction (PFC) controllers.

BACKGROUND

[0002] Power supplies for controlling the supply of power from an alternating current (AC) source, such as a mains supply, to a load are well known. These include power supplies comprising controllers, such as power factor correction (PFC) controllers, arranged to control the supply of power to a load via an inductor by controlling a switching device connecting the inductor, directly or indirectly, to ground. In certain applications the controller is adapted to generate a square wave drive output for controlling the switching device, and is further adapted to receive a control input for determining an "on" time of the square wave output and a further input (sometimes called an inhibit input, or a zero current detect input) which it uses to ensure that the switching on of the switching device is performed only when the current flowing in the inductor has fallen substantially (La close enough) to zero.

[0003] In a particular application, a given boundary mode (also known as critical conduction mode) PFC controller has finite power range. That is for a given winding inductance and input voltage, the output power range can be defined. The high end power can be defined by the PFC controller's maximum on time for the power switch and the low end is defined by the minimum on time.

[0004] If the required output power is less than that supplied at minimum on time, in a single stage Flyback Dimmable Light Emitting Diode (LED) Driver application, the light load cycle skipping of a PEC controller produces noticeable flicker unless unrealistic amounts of capacitance are used in the output filter.

[0005] A second problem also occurs as output load decreases. The PEC controller's on time also decreases, but boundary mode operation forces the switch frequency to increase, pushing up switching losses of the primary switch and secondary rectifier.

[0006] The addition of dimming control can also lead to the increase of switching losses in light load conditions.

[0007] Whilst some PFC controllers extend the control range by offering features such as cycle or valley skipping in most cases this produces low frequency disturbances on the outputs. These are particularly undesirable in lighting applications where humans may perceive these disturbances as flickering' light.

[0008] In certain prior art power supplies an overwind (i.e. a secondary, or auxiliary winding or inductor) is arranged to sense current in the main power control inductor, and provides a signal indicative of the current flowing in that inductor. In certain applications that signal is substantially a square wave signal, and in certain prior art systems the signal is supplied to an inhibit input pin (which may also be described as a zero crossing detect, a zero voltage detect, or a zero current detect pin) to control the transition of a controller output from its low to its high state. A problem with this approach, however, is that as the maximum inductor current decreases, as will be the case when the load power decreases, the delay before the signal from the overwind falls also decreases. In general, the controller will trigger the drive output to go high in response to the inhibit input falling below a predetermined threshold. Thus, the smaller the signal supplied to the inhibit input, in general the more rapidly it will fall below the threshold. Thus, reducing load current can result in the controller switching frequency increasing.

[0009] It is an aim of certain embodiments of the invention to solve, mitigate or obviate, at least partly, at least one of the problems and/or disadvantages associated with the prior art. Certain embodiments aim to provide at least one of the advantages described below.

BRIEF SUMMARY OF THE DISCLOSURE

[0010] According to a first aspect of the present invention there is provided a power supply for controlling the supply of power from an AC power source to a load, the power supply comprising: input terminals for connecting to an AC power source; at least one output terminal for connecting to a load; an inductor; a controllable switching device connected to the inductor and controllable to control current flow in the inductor so as to control the supply of power from a connected AC power source, via the inductor! to a connected load; and control means (e.g. a controller) comprising a drive output terminal arranged to provide a drive signal to said switching device to control said switching device, the drive signal substantially comprising a square wave signal alternating between a first state (e.g. low value) and a second state (e.g. high value), the control means further comprising an input terminal arranged to receive an input signal and the control means being responsive to the input signal to switch said drive signal from the first value to the second value in response to the input signal falling below a threshold voltage and to inhibit switching of the drive signal from the first value to the second value if the input voltage is above the threshold, characterised in that the input signal is derived from the drive signal.

[00111 It will be appreciated that embodiments of this first aspect of the invention provide the advantage that, by deriving the inhibit input signal from the drive signal (which has a substantially constant amplitude, and does not vary with magnitude of current in the inductor) problems associated with the prior art techniques of deriving the inhibit input signal from an overwind are avoided. As discussed above, those problems include the reduction in delay before the overwind signal falls with load current, which can undesirably increase switching frequency as load power decreases) and ringing on the overwind signal which can have undesirable effects on the output of the controller.

[0012] Thus, in certain embodiments, the inhibit input signal is derived from a drive signal which has a signal amplitude that is not dependent on load power. With regard to ringing on the inhibit signal, certain CCM (Critical Conduction Mode) PFC controllers use the ringing to provide the CCM operation, and this can reduce switching losses in a single cycle. Some controllers skip valleys as the load power decreases to try and avoid the frequency climbing too high. An issue with skipping the valleys is that for a given load condition, system noise, variables and possible quantization leads these controllers to move back and forward between a few valleys, and this can give large steps in power between any two switching cycles, causing a disproportionate error in power to the load.

This error can be seen as a small blip' in the output voltage or current of the power supply, and in LED driver applications these blips' can often be seen as flicker. Certain embodiments if the invention circuit are able to negate any valley switching and provide a fully analogue resolution of the off time.

[0013] In certain embodiments the power supply comprises an input signal generating circuit arranged to receive said drive signal and provide said input signal to said input terminal of the controller.

[0014] In certain embodiments the input signal generating circuit comprises a first circuit input terminal, connected to the drive output to receive the drive signal, and a circuit output terminal, connected to the input terminal of the controller to provide said input signal to the controller, the circuit further comprising a first capacitor coupled to the first circuit input terminal and to the circuit output terminal, the first capacitor being arranged to be charged by the drive signal when the drive signal is in the second state, and to discharge when the drive signal is in the first state.

[0015] In certain embodiments said circuit further comprises a first resistor and a diode arranged such that the first capacitor charges through the first resistor and diode when the drive signal is in the second state. In certain such embodiments, the first capacitor has a second terminal connected either directly or via only a passive component or components (e.g. a resistor) to the circuit output terminal (in other words, not via a controllable switching device) such that the voltage at the circuit output terminal rises as the capacitor charges while the drive signal is in the second state, and then decays after the drive signal has switched to the first state. In certain such embodiments, the circuit may further comprise at least two parallel discharge paths arranged to determine at least the discharge rate of the capacitor, the at least two discharge paths comprising a path with a fixed resistance and a path with a controllable resistance.

[0016] In certain embodiments said circuit further comprises a second controllable switching device connected between the first capacitor and the circuit output terminal and having a control input coupled to the first circuit input terminal, the second switching device being arranged such that it prevents discharge of the first capacitor when the drive signal is in the second state and allows discharge of the capacitor through the second switching device when the drive signal is in the first state.

[0017] In certain embodiments the second switching device is a bipolar transistor, a base of the bipolar transistor being coupled to the first circuit input terminal.

[0018] In certain embodiments said base is coupled to the first circuit input terminal by a second capacitor and a second resistor arranged in parallel with one another.

[0019] In certain embodiments the second switching device is a field effect transistor, having a gate terminal coupled to the first circuit input terminal.

[0020] In certain embodiments said circuit further comprises a third capacitor coupled to the circuit output terminal and coupled to the first capacitor by the second switching device such that when the drive signal is in the second state the second switching device prevents flow of charge from the first capacitor to the third capacitor, and when the drive signal is in the first state the second switching device allows flow of charge from the first capacitor to the second capacitor, whereby a transition of the drive signal from the second state to the first state triggers the second switching device to enable charging of the third capacitor by the first capacitor.

[0021] In certain embodiments the power supply further comprises a third resistor through which the third capacitor is arranged to discharge.

[0022] In certain embodiments the power supply further comprises a fourth resistor and a device having a controllable conductivity arranged to control discharge of the third capacitor through the fourth resistor and the device, said device having a control input coupled to a second circuit input terminal, such that a signal supplied to the second circuit input terminal determines a conductivity of the device.

[0023] In certain embodiments the power supply further comprises feedback means arranged to provide a feedback signal to the second circuit input terminal, said feedback signal being indicative of a load current being supplied to a connected load.

[0024] In certain embodiments said feedback means is further arranged to supply the feedback signal to the control means, the control means being arranged to determine an on time, setting a time for the drive signal to be in the second state following a transition from the first state to the second state, according to the feedback signal.

[0025] In certain embodiments the feedback signal is arranged to have a magnitude which increases with load current.

[0026] In certain embodiments the device is arranged such that the conductivity of the device is reduced as the load current decreases.

[0027] In certain embodiments said device is a bipolar transistor having a base coupled to the second circuit input terminal.

[0028] In certain embodiments the circuit comprises a fifth resistor connected in series between the base of said device and the second circuit input terminal.

[0029] In certain embodiments the device and fourth resistor are connected in a series arrangement with one another, between first and second terminals of the third capacitor, and the third resistor is connected between said first and second terminals of the third capacitor, in parallel with the series arrangement of said device and fourth resistor, whereby the third resistor provides a first discharge path and the series arrangement of device and fourth resistor provides a second discharge path, in parallel to the first discharge path, the resistance of the second discharge path being determined by the signal to the second circuit input terminal.

[0030] In certain embodiments the first capacitor comprises a first terminal connected to ground and a second terminal connected to a first terminal of the second switching device, the third capacitor comprises a first terminal connected to ground and a second terminal connected to a second terminal of the second switching device, and the second switching device is controllable to switch between a first state in which it prevents current flow between its first and second terminals, and a second state in which it permits current flow between its first and second terminals, the second switching device being arranged to switch from its first to its second state in response to said drive signal changing from its second to its first state.

[0031] Another aspect of the invention provides a power supply for controlling the supply of power from an AC power source to a load, the powei supply comprising: input terminals for connecting to an AC power source; at least one output terminal for connecting to a load; an inductor; a controllable switching device connected to the inductor and controllable to control current flow in the inductor so as to control the supply of power from a connected AC power source, via the inductor, to a connected load; and control means (e.g. a controller) comprising a drive output terminal arranged to piovide a drive signal to said switching device to control said switching device, the diive signal substantially comprising a square wave signal alternating between a first value (e.g. low) and a second value (e.g. high), the control means further comprising an input terminal arranged to receive an input signal and the control means being responsive to the input signal to switch said drive signal from the first value to the second value in iesponse to the input signal falling below a threshold voltage and to inhibit switching of the drive signal from the first value to the second value if the input voltage is above the threshold, the power supply further comprising an input signal generating circuit arranged to receive a drive source signal substantially comprising a square wave signal alternating between a first state (e.g. low) and a second state (e.g. high), generate said input signal from the drive source signal, and provide said input signal to said input terminal of the controller.

[0032] In certain embodiments said circuit comprises: energy storage means for storing energy when the drive source signal is in the second state; an output capacitor; and switching means aiianged to prevent flow of energy from the eneigy storage means to the output capacitor when the drive source signal is in the second state and allow flow of energy from the energy storage means to the output capacitor when the drive source signal is in the first state, wherein the output capacitor comprises a terminal coupled to an output terminal of the circuit, the circuit output terminal being connected to the control means input terminal.

[0033] In certain embodiments the power supply further comprises: means for discharging the output capacitor, said means for discharging comprising a resistor arranged to provide a first discharge path (e.g. to ground).

[0034] In certain embodiments the means for discharging further comprises a controllable device arranged to provide a second discharge path, through the device, in parallel with the first discharge path.

[0035] In certain embodiments said device has a controllable conductivity.

[0036] In certain embodiments the device is arranged to receive a device control signal, said device control signal determining a resistance of the second discharge path.

[0037] In certain embodiments the second discharge path further comprises a second resistor arranged in series with the device.

[0038] In certain embodiments the power supply further comprises feedback means arranged to provide said device control signal to the device, the device control signal being dependent on a load current flowing in a connected load.

[0039] In certain embodiments said drive source signal is said drive signal.

[0040] In certain embodiments said drive source signal is derived from a current flowing in said inductor.

[0041] In certain embodiments said drive signal is a signal from a winding arranged to sense (monitor) a current flowing in the inductor.

[0042] In certain embodiments the power supply further comprises rectifying means connected to the input terminals and arranged to generate a rectified signal from a supplied AC signal, and the inductor and controllable switching device are connected in a series arrangement between a terminal of the rectifying means and ground (e.g. a ground rail or ground terminal).

[0043] In certain embodiments the inductor is a first winding of a transformer, the transformer comprising a second winding coupled to said output terminal to provide power to a connected load.

[0044] In certain embodiments said output terminal is coupled to a node between the inductor and the controllable switching device.

[0045] Another aspect of the invention provides a method of providing an input signal to an input terminal of a controller arranged to provide a substantially square wave drive signal to a controllable switching device of a power supply, the method comprising: coupling a capacitor to the input terminal; using a source signal substantially comprising a square wave signal alternating between a first state (e.g. low) and a second state (e.g. high) to store energy in energy storage means when the source signal is in the second state and charge said capacitor from the energy storage means when the source signal transitions from the second state to the first state.

[0046] In certain embodiments the method further comprises discharging the capacitor, while the source signal is in the first state, through a first discharge path.

[0047] In certain embodiments the method further comprises discharging the capacitor, while the source signal is in the first state, through a second discharge path in parallel with the first discharge path.

[0048] In certain embodiments the method further comprises controlling a resistance of the second discharge path.

[0049] In certain embodiments said controlling comprises controlling said resistance according to a load current in a load powered by the power supply.

[0050] It will be appreciated that certain embodiments of the present invention provide advantages over the prior art by adding adaptive control of the switching frequency with load demand. Certain embodiments also provide a method for overcoming signal blanking on inhibit inputs of PEC controllers. Certain embodiments provide a method for extending the input to output control ratio of boundary mode Power Factor Correction (PFC) controllers and/or reducing switching power losses.

[0051] Another aspect of the present invention provides an input signal generating circuit as described above in relation to any other aspect of the invention.

[0052] Another aspect of the invention provides apparatus comprising a load and a power supply, in accordance with any of the above-described aspects and embodiments of the invention! arranged to control the supply of power from an AC source to the load.

[0053] It will be appreciated that power supplies embodying the invention may be employed in a wide variety of applications, and embodiments of the invention include, but are not limited to: AC to DC converters/power supplies; DC power supplies; LED drivers; dimmable LED drivers; ballasts; compact fluorescent or cold cathode ballasts; portable or integral, wide input voltage range and/or wide output load range DC power supplies such as USB and/or mobile device power supplies, such as phones or tablets; audio amplifier power supplies; laptop power supplies etc.

BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Embodiments of the invention are further described hereinafter with reference to the accompanying drawings, in which: [0055] Fig. 1 is a schematic representation of a power supply embodying the present invention; [0056] Fig. 2 is a circuit diagram of an input signal generating circuit (an adaptive switching control circuit) embodying the invention and which may be incorporated in power supplies embodying the invention; [0057] Figs. 3 and 4 illustrate wave forms developed in a power supply circuit embodying the present invention during operation; [0058] Figs.5 and 6 illustrate corresponding wave forms generated in power supply circuits not embodying the present invention; [0059] Fig. 7 is a block diagram of an adaptive switching control circuit embodying the invention; [0060] Fig. 8 is a circuit diagram of a power supply circuit according to the prior art, of a type which may be modified in accordance with the present invention; and [0061] Fig. 9 is a circuit diagram of another input signal generating circuit embodying the invention and which may be incorporated in power supplies embodying the invention.

DETAILED DESCRIPTION

[0062] It will be appreciated from the following description that certain embodiments provide and/or incorporate circuit (which may be described as an Adaptive Switching Control (ASC) circuit) that interfaces with a switching inhibit input of a PFC controller; such as a zero current detection input. In certain embodiments the signal which the circuit generates can be manipulated to provide reasonable zero current detection (ZCD) switching at full load conditions and actually pushes the switching frequency of the controller down as the output load decreases. This circuit potentially reduces switching losses at low loads and extends the stable operating range, improving device performance over wide input voltage and/or output power range.

[0063] For example, in a prior art circuit using a conventional ZCD feedback the switching frequency was 300kHz before the PFC entered a light load condition and started to skip switching cycles. However, a circuit embodying the invention may be used to limit to a much lower frequency such as 20kHz. In this scenario the output power would be able to go lower by a factor of 15 and the power switching losses would be reduced by the same factor significantly increasing system efficiency.

[0064] Referring now to fig. 1, this power supply circuit comprises first and second input terminals ii, 12 for connecting to an AC supply and first and second output terminals 13, 14 for connecting to a load. The supply comprises a first inductor Li having a first terminal Lii connected to rectifying means 5 arranged to generate a rectified voltage from the AC input. A capacitor C is also connected between the inductor first [11 and ground. A second terminal of the inductor Li is connected to a controllable switching device Si which in this example is a mosfet. The mosfet Si has a gate terminal Si3 for receiving a control input which determines a conductivity of the mosfet between its drain and source terminals is sii, 512 arranged in series between the inductor Li and ground. The supply also comprises a controller 2 (which in this example is a PFC controller) arranged to generate a substantially square wave drive output at a gate drive output terminal 21. The controller 2 comprises an inhibit input terminal 22, and the signal supplied to this input terminal 22 determines whether the gate drive output is inhibited from transitioning from the low level to the high level. The controller 2 comprises a second input 23, which in this example is a control input which determines an on time for the drive output signal, that is it determines how long the gate drive signal remains in the high state, after switching from the low to the high state, before it makes its next transition from high to low.

[0065] The inhibit input terminal 22 is connected to receive its control signal from an inhibit output terminal 32 of an adaptive switching control circuit 3. That control circuit comprises a first input terminal 31 which is connected to the gate drive 21 of the controller 2, so that the square wave drive signal supplied to the switching device Si is also supplied as an input to the circuit 3. The circuit 3 comprises a second input 33 which it uses to control a decay rate of the inhibit signal provided from the inhibit output 32. In this example that second output 33 is provided by feedback means which includes a constant current/constant voltage control unit 41 arranged to monitor a load current flowing in a load connected between the terminals 13 and 14, and drive a corresponding current through the light generating portion of an opto coupler. This results in a corresponding voltage being developed across output terminals of the opto coupler, that output voltage being supplied to the control input 33. The arrangement is such that the voltage supplied to the control input 33 is substantially proportional to the current actually flowing in the load, at ii least over a range of values. In this example the load is fully decoupled (electrically isolated) from the AC supply side, by means of the transformer comprising inductor Li and inductor L2 (these inductors are primary and secondary windings of the transformer respectively) and the optocou pIer 42.

[0066] Referring now to fig. 2. this shows a circuit suitable for use as the circuit 3 in fig. i.

The Drive Source input is driven with a square wave (either directly or derived) from the gate drive output of a PFC controller. The Control Input, driven from 0 to 5V (typically, but values may be changed to scaled higher if required), governs the frequency shift over the power range of the PFC controller. Finally the output of the circuit is shown by the designation Inhibit Output', this may require a series resistor to interface with the FFC controller [0067] In the first instance the drive source input is driven high by the PEC controller, Ci charges up through Dl and Ri. Si is used to limit the peak current charging the capacitor and prevent slowing the turn on of the main power mosfet. Di prevents discharge of Ci when the drive source input is pulled low by the PFC controller.

[0068] At the same time as Ci is being charged by the positive signal on the drive source, 52 biases the base of TR1, a PNP bipolar transistor (although a P-channel MOSFET may also be substituted) so that TR1 does not conduct and C3 remains un-charged.

[0069] It is necessary to keep C3 un-charged while the gate drive signal is high for the following reason. Some PFC controllers such as the FL6961 feature a flip-flop which requires resetting to enable the ZCD. However some devices include a blanking feature which prevents the controller from seeing the positive swing on the inhibit pin until sometime after the gate drive has been driven high.

(0070] The above circuit achieves the delay of the inhibit signal rising though the use of TR1, 52 and C2. Whilst some FFC controllers may not feature such blanking on any inhibit input, retaining these parts ensures compatibility with more devices. However, some controllers may allow these parts to be omitted in certain embodiments (see the

description below re fig. 9).

[0071] When the Drive Source input is pulled low (by the PEC controller's gate drive output) current then flows through the base of TR1 and turns TR1 on. The conduction of TR1 charges C3. Since charge is shared between Ci and C3, C3 will typically be sized smaller than Ci in order to retain reasonable signal amplitude of the inhibit output of the circuit.

[0072] The inhibit signal being driven high after the gate drive goes low will, with most controllers, enable the ZOO detection of the FF0 controller. The PFO controller will typically have a threshold above zero, with hysteresis, to which the ZOO signal must drop in order to be detected (and hence enable/trigger the drive output to switch from low to high).

[0073] Once charged, 03 will discharge via R3. The RC time constant of 03 and R3 sets the maximum off time (Toff) of the FF0 controller, and therefore the minimum frequency.

The lowest frequency will be: 1 / (Time T(off) + the minimum on time that the PFC controller supports).

[0074] The discharge of 03 through R3 in certain embodiments is designed to give a much lower frequency than optimal at higher powers and would prevent boundary mode operation from occurring. It is therefore required, in certain embodiments, to allow the frequency to run higher at full load conditions. This is achieved using the Oontrol Input.

Some FF0 controllers such as the Fairchild FL6961 and ON Semiconductor NCL30000 use a feedback input, typically generated from an internal amplifier, the voltage of which (magnitude of which) determines the required on time or peak current of the PFC controller. With many PFO controller's control input, the largest current detection level or longest on time is set when the control is at its highest level. The PFC control demanding full power at its highest voltage rating allows the PFC feedback pin to be connected to the control input of the circuit. When the control input of the circuit is at its highest level, it will allow the most current to flow through TR2 increasing the discharge rate of 03 and allowing a high frequency from the FF0 controller and boundary mode operation.

[0075] As the control input lowers, and the demand for output power decreases, the current through TR2 will reduce. This decreases the discharge rate of 03 and pushes down the operating frequency of the PFO controller.

[0076] It is necessary to size R5 such that the minimum and maximum frequency of the PFC controller is optimal and utilises the range of the FF0 controller's control pin. With many FF0 controller los the control pin may be significantly above zero (around 1V with some parts) at lowest power demand and this means TR2 will always sink current from 03, in such cases TR2 also sets the minimum frequency.

[0077] Referring to Fig. 2 in more detail. Fig 2 illustrates an adaptive switching control circuit 3 of the power supply of Fig 1. The drive source input terminal 31 (i.e. the first circuit input terminal) is connected to a second terminal 012 of the first capacitor Cl via a first resistor Si and a diode 01. A first terminal Cii of the first capacitor Ci is connected to ground. The drive source input 31 is also connected to the control terminal of a controllable switching device, which in this example is a bipolar transistor TR1. In this example, the base b of transistor TR1 is connected to the drive source terminal 31 by means of a parallel arrangement of a second resistor R2 and a second capacitor 02.

When the signal to the drive source 31 is in the high state, the potential supplied to the base terminal of TR1 is such that TR1 is in a non-conducting state (i.e. current flow is inhibited between its collector and emitter), and so Cl charges via Ri and Dl, but cannot discharge through TR1.

[00781 The circuit also comprises a third capacitor 03, having a first terminal 031 connected to ground and a second terminal 032 connected to the transistor connector/emitter. This second terminal C32 is also coupled to the circuit output terminal (inhibit output 32), in this example by means of a resistor R6. A third resistor R3 is connected between the capacitor terminals 031 and 032 to provide a first discharge path through which 03 can discharge. The circuit further comprises a second transistor TR2 connected in series with a further resistor R5 to provide a second discharge path for 03, in parallel to the first discharge path. In this example, TR2 is a second bipolar transistor, having a based terminal supplied with a control input signal 33 via resistor R4. Transistor TR2 is thus a device having a controllable conductivity (i.e. between its collector and emitter). Thus, the control input 33 to transistor TR2 controls its conductivity, and hence the overall resistance of the second discharge path. When the control input 33 is such that TR2 is switched into a non-conducting state (completely, or substantially), capacitor 03 can only discharge through R3 to ground. As the transistor TR2 is progressively switched into a conducting state, an increasing discharge current is able to flow through the second discharge path. The minimum resistance of the second discharge path is thus substantially the resistance of R5. In this way, the time constant of the discharge of 03 can be controlled with control input 33.

[0079] Thus, when the drive source input is high, capacitor Cl charges. Then, when the drive source input 31 transitions from the high to the low state, transistor TR1 turns on and charge is able to flow from Cl to 03. Thus, Cl quickly charges C3 in response to a falling edge on the signal supplied to drive source terminal 31. Then, the voltage across 03 falls with time, at a rate determined by the combination of the first and second discharge paths.

[0080] It will be appreciated that embodiments of the invention using the circuit of fig. 2 and supplying the drive signal to the terminal 31 from the power switch output of a controller are using the power switch output as a means of triggering' of the signal appearing on 03, such that the positive rise of 03 occurs on the falling edge of the power switch output. They also use feedback (indicative of actual load power) to control the decay of 03.

[0081] It will be appreciated that the combination of elements Cl, Dl and Ri in Fig 2 can be regarded as energy storage means, arranged to store energy while the input to the drive source terminal 31 is in the high state. The first transistor TR1, with a base connected to the drive source terminal 31, can be regarded as one example of a falling edge trigger circuit, which is triggered by a falling edge on the signal supplied to the drive source terminal 31 to enable the energy storage means to charge capacitor 03, which can be described as an output capacitor. The combination of the first and second discharge paths, incorporating resistors and transistor TR2 can be regarded as an example of a voltage controlled current sink, which is arranged to receive a control input which ultimately will affect a switching frequency of the controller. Fig 7 is a block diagram of a controller input signal generating circuit (an adaptive switching control circuit) having this general structure, and embodying the present invention.

[0082] Referring now to figures 3 to 6, these illustrate the following waveforms: [0083] b = Drive Source (PFC controller gate drive output) [0084] c = Drain voltage of the power mosfet [0085] d = Inhibit output (connected to ZOD input of PFC controller) [0086] a = Control input (connected to compensation pin of PFC controller) [0087] The waveforms of figs. 3 and 4 correspond to a circuit, such as the circuit of fig. 2, embodying the invention in operation within a flyback circuit. Fig 3 shows the circuit operating at maximum output power. The control signal (a) is at the highest level, so the dv/dt of the inhibit output is at its steepest and the switching frequency is therefore at its highest. In contrast Fig 4 shows the circuit operating at the lowest output power state. The control signal is now much lower and as a result the inhibit output takes much longer to reach the PEC controller's threshold level. The frequency is therefore significantly lower.

[0088] If we compare this to the operation of the PFC controller circuit using conventional switching inhibit feedback from a transformer over wind (shown in Figures 5 and 6, high load and low load respectively), we see how the circuits embodying the invention allow lower frequency operation at lower load.

[0089] It will be appreciated that certain embodiments of the invention provide one or more of the following features and/or advantages: [0090] An artificial inhibit signal is generated from a power switch drive waveform (artificial in that it is not derived by directly monitoring current in the inductor); [0091] A circuit output signal designed to closely mimic the signal it replaces (e.g. an overwind signal), allows for greater compatibility with a range of FF0 controllers; [0092] Allows power supply output load range to be extended without compromising on full load efficiency, or component values; [0093] Control input allows direct control over operating frequency of PFC controller switching; [0094] Reliably defined circuit operation allows zero voltage switching to be achieved at full load condition; [0095] Improve Electromagnetic Compatibility of power supply in low output load conditions by reducing or holding the switching frequency to values where power supply EMC filters are most effective or where the maximum limits defined in EMC standards are greater; and [0096] Reduces switching losses, increasing system efficiency in wide output power range applications.

[0097] Referring now to fig. 8, this illustrates a power supply in accordance with the prior art and incorporating a PFC controller 2. This diagram is from an Onsemi data sheet for a 450W Universal Input Power Factor Controller, product numbers MC34262 and MC33262.

The power supply comprises a transformer T comprising a primary winding connected in series between rectifying means and a mosfet 01 controlled by a drive signal from pin 7 of the controller. The transformer comprises an auxiliary winding (overwinding) arranged to provide a signal, indicative of current in the primary winding, to a zero current detect pin 5 of the controller. An output terminal Vo is connected to a node between the primary winding and 01. This circuit may be modified in accordance with the invention to incorporate a circuit, as described above, generating an inhibit input signal for supply to pin from the drive output 7 in certain embodiments, or from some other square wave signal developed during operation of the power supply. For example, in certain alternative embodiments, the inhibit signal generating circuit is adapted to receive a signal from the auxiliary winding. Thus, a circuit embodying the invention, as described above, may be used to supply the inhibit pin 5, rather than pin 5 being supplied directly with a voltage signal from the overwinding.

[0098] It will be appreciated that, in certain embodiments, a switch drive signal from a controller may be used to generate a control signal (an inhibit input signal) for controlling the controller. In certain other embodiments, an overwind on a transformer/inductor may be used, providing its phasing is such that the signal it provides goes high when the mosfet gate drive is high. In certain embodiments a programmable microcontroller, such as a Microchip PlC, may be used to sense the feedback and gate drive, and produce a square wave output too (to provide the input to the inhibit input signal generating circuit), and this may advantageous in applications where other sources of feedback/control may be required or added to the system.

[0099] Referring now to fig. 9, this shows an alternative circuit embodying the invention and which may be incorporated in power supply circuits embodying the invention. It is based on the configurations envisaged in paragraph 71 above! and elements corresponding to those of the circuit of fig. 2 are given the same references. In this circuit, the second switching device TR1 has been omitted, such that the output terminal/second terminal C32 of 03 is permanently electrically connected to the output terminal 32 (in this case directly, but in alternative embodiments one or more passive components, such as a resistor, may be used in the connection. Thus, C3 charges while the input to terminal 31 is high, and then C3 discharges (resulting in the output voltage at 32 falling) after the input to 31 has made the transition to its low state. There are two parallel discharge paths for 03: a first with fixed resistance, comprising R3; and a second with controllable resistance, comprising R5 and transistor TR2 in series with each other. Thus, the signal supplied to the base of 1R2 controls the decay rate of the 03 voltage. These parallel discharge paths also affect the charging of 03, as they sink some current to earth/ground while input 31 is high.

[00100] Throughout the description and claims of this specification, the words "comprise" and "contain" and variations of them mean "including but not limited to", and they are not intended to (and do not) exclude other moieties, additives, components, integers or steps.

Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise.

[00101] Features, integers, or characteristics described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith.

All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive. The invention is not restricted to the details of any foregoing embodiments. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

[00102] It will be also be appreciated that, throughout the description and claims of this specification, language in the general form of "X for Y" (where Y is some action, activity or step and X is some means for carrying out that action, activity or step) encompasses means X adapted or arranged specifically, but not exclusively, to do Y. [00103] The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

Claims

CLAIMS1. A power supply for controlling the supply of power from an AC power source to a load, the power supply comprising: input terminals for connecting to an AC power source; at least one output terminal for connecting to a load; an inductor; a controllable switching device connected to the inductor and controllable to control current flow in the inductor so as to control the supply of power from a connected AC power source, via the inductor, to a connected load; and control means comprising a drive output terminal arranged to provide a drive signal to said switching device to control said switching device, the drive signal substantially comprising a square wave signal alternating between a first state and a second state, the control means further comprising an input terminal arranged to receive an input signal and the control means being responsive to the input signal to switch said drive signal from the first value to the second value in response to the input signal falling below a threshold voltage and to inhibit switching of the drive signal from the first value to the second value if the input voltage is above the threshold, characterised in that the input signal is derived from the drive signal.
2. A power supply in accordance with claim 1, comprising an input signal generating circuit arranged to receive said drive signal and provide said input signal to said input terminal of the controller.
3. A power supply in accordance with claim 2, wherein the input signal generating circuit comprises a first circuit input terminal, connected to the drive output to receive the drive signal, and a circuit output terminal, connected to the input terminal of the controller to provide said input signal to the controller, the circuit further comprising a first capacitor coupled to the first circuit input terminal and to the circuit output terminal, the first capacitor being arranged to be charged by the drive signal when the drive signal is in the second state, and to discharge when the drive signal is in the first state.
4. A power supply in accordance with claim 3, wherein said circuit further comprises a first resistor and a diode arranged such that the first capacitor charges through the first resistor and diode when the drive signal is in the second state.
5. A power supply in accordance with claim 3 or claim 4, wherein said circuit further comprises a second controllable switching device connected between the first capacitor and the circuit output terminal and having a control input coupled to the first circuit input terminal, the second switching device being arranged such that it prevents discharge of the first capacitor when the drive signal is in the second state and allows discharge of the capacitor through the second switching device when the drive signal is in the first state.
6. A power supply in accordance with claim 5, wherein the second switching device is a bipolar transistor, a base of the bipolar transistor being coupled to the first circuit input terminal.
7. A power supply in accordance with claim 6, wherein said base is coupled to the first circuit input terminal by a second capacitor and a second resistor arranged in parallel with one another.
8. A power supply in accordance with claim 5, wherein the second switching device is a field effect transistor, having a gate terminal coupled to the first circuit input terminal.
9. A power supply in accordance with any one of claims 5 to 8, wherein said circuit further comprises a third capacitor coupled to the circuit output terminal and coupled to the first capacitor by the second switching device such that when the drive signal is in the second state the second switching device prevents flow of charge from the first capacitor to the third capacitor, and when the drive signal is in the first state the second switching device allows flow of charge from the first capacitor to the second capacitor, whereby a transition of the drive signal from the second state to the first state triggers the second switching device to enable charging of the third capacitor by the first capacitor.
10. A power supply in accordance with claim 9, further comprising a third resistor though which the third capacitor is arranged to discharge.
11. A power supply in accordance with claim 10, further comprising a fourth resistor and a device having a controllable conductivity arranged to control discharge of the third capacitor through the fourth resistor and the device, said device having a control input coupled to a second circuit input terminal, such that a signal supplied to the second circuit input terminal determines a conductivity of the device.
12. A power supply in accordance with claim 11, further comprising feedback means airanged to provide a feedback signal to the second circuit input teiminal, said feedback signal being indicative of a load current being supplied to a connected load.
13. A power supply in accoidance with claim 12, wherein said feedback means is further arranged to supply the feedback signal to the control means, the control means being arranged to determine an on time, setting a time for the drive signal to be in the second state following a transition from the first state to the second state, accoiding to the feedback signal.
14. A power supply in accordance with claim 12 or claim 13, wherein the feedback signal is arranged to have a magnitude which increases with load current.
15. A power supply in accordance with claim 14, wherein the device is arranged such that the conductivity of the device is reduced as the load cuilent decreases.
16. A power supply in accoidance with any one of claims 11 to 15, wheiein said device is a bipolar transistor having a base coupled to the second circuit input terminal.
17. A power supply in accordance with claim 16, wherein the circuit comprises a fifth resistor connected in series between the base of said device and the second circuit input teiminal.
18. A power supply in accordance with any one of claims 11 to 17, wherein the device and fourth resistor are connected in a series arrangement with one another, between first and second terminals of the third capacitor, and the third resistor is connected between said first and second terminals of the third capacitor, in parallel with the series airangement of said device and fouith lesistol, wheieby the thud lesistol piovides a first discharge path and the series arrangement of device and fourth resistor provides a second discharge path, in parallel to the first discharge path, the resistance of the second discharge path being determined by the signal to the second circuit input terminal.
19. A power supply in accoidance with any one of claims 9 to 18, wheiein the first capacitor comprises a first terminal connected to ground and a second terminal connected to a first terminal of the second switching device, the third capacitor comprises a first terminal connected to ground and a second terminal connected to a second terminal of the second switching device, and the second switching device is controllable to switch between a first state in which it prevents current flow between its first and second terminals, and a second state in which it permits current flow between its first and second terminals, the second switching device being arranged to switch from its first to its second state in response to said drive signal changing from its second to its first state.
20. A power supply for controlling the supply of power from an AC power source to a load! the power supply comprising: input terminals for connecting to an AC power source; at least one output terminal for connecting to a load; an inductor; a controllable switching device connected to the inductor and controllable to control current flow in the inductor so as to control the supply of power from a connected AC power source, via the inductor, to a connected load; and control means comprising a drive output terminal arranged to provide a drive signal to said switching device to control said switching device, the drive signal substantially comprising a square wave signal alternating between a first value and a second value, the control means further comprising an input terminal arranged to receive an input signal and the control means being responsive to the input signal to switch said drive signal from the first value to the second value in response to the input signal falling below a threshold voltage and to inhibit switching of the drive signal from the first value to the second value if the input voltage is above the threshold, the power supply further comprising an input signal generating circuit arranged to receive a drive source signal substantially comprising a square wave signal alternating between a first state and a second state, generate said input signal from the drive source signal, and provide said input signal to said input terminal of the controller.
21. A power supply in accordance with claim 20, wherein said circuit comprises: energy storage means for storing energy when the drive source signal is in the second state; an output capacitor; switching means arranged to prevent flow of energy from the energy storage means to the output capacitor when the drive source signal is in the second state and allow flow of energy from the energy storage means to the output capacitor when the drive source signal is in the first state, wherein the output capacitor comprises a terminal coupled to an output terminal of the circuit, the circuit output terminal being connected to the control means input terminal.
22. A power supply in accordance with claim 21! further comprising: means for discharging the output capacitor, said means for discharging comprising a resistor arranged to provide a first discharge path.
23. A power supply in accordance with claim 22, wherein the means for discharging further comprises a controllable device arranged to provide a second discharge path, through the device, in parallel with the first discharge path.
24. A power supply in accordance with claim 23, wherein said device has a controllable conductivity.
25. A power supply in accordance with claim 24, wherein the device is arranged to receive a device control signal, said device control signal determining a resistance of the second discharge path.
26. A power supply in accordance with any one of claims 23 to 25, wherein the second discharge path further comprises a second resistor arranged in series with the device.
27. A power supply in accordance with claim 25 or claim 26, further comprising feedback means arranged to provide said device control signal to the device, the device control signal being dependent on a load current flowing in a connected load.
28. A power supply in accordance with any one of claims 20 to 27, wherein said drive source signal is said drive signal.
29. A power supply in accordance with any one of claims 20 to 27, wherein said drive source signal is derived from a current flowing in said inductor.
30. A power supply in accordance with any one of claims 20 to 27, or claim 29, wherein said drive signal is a signal from a winding arranged to sense a current flowing in the inductor.
31. A power supply in accordance with any preceding claim, further comprising rectifying means connected to the input terminals and arranged to generate a rectified signal from a supplied AC signal, and wherein the inductor and controllable switching device are connected in a series arrangement between a terminal of the rectifying means and ground.
32. A power supply in accordance with claim 31! wherein the inductor is a first winding of a transformer, the transformer comprising a second winding coupled to said output terminal to provide power to a connected load.
33. A power supply in accordance with claim 31, wherein said output terminal is coupled to a node between the inductor and the controllable switching device.
34. A method of providing an input signal to an input terminal of a controller arranged to provide a substantially square wave drive signal to a controllable switching device of a power supply, the method comprising: coupling a capacitor to the input terminal; using a source signal substantially comprising a square wave signal alternating between a first state and a second state to store energy in energy storage means when the source signal is in the second state and charge said capacitor from the energy storage means when the source signal transitions from the second state to the first state.
35. A method in accordance with claim 34, further comprising discharging the capacitor, while the source signal is in the first state, through a first discharge path.
36. A method in accordance with claim 35, further comprising discharging the capacitor, while the source signal is in the first state, through a second discharge path in parallel with the first discharge path.
37. A method in accordance with claim 36, further comprising controlling a resistance of the second discharge path.
38. A method in accordance with claim 37, wherein said contiolling complises controlling said resistance according to a load current in a load powered by the power supply.
39. An input signal generating circuit for a power supply in accordance with any one of claims 2 to 30.
40. Apparatus comprising a load and a power supply in accordance with any one of claims 1 to 33 arranged to powei the load from an AC power soulce.
41. A power supply, an input signal generating circuit for a power supply, a method of providing an input signal to a controller of a power supply, or apparatus comprising a load and power supply, substantially as hereinbefore described with reference to figures 1-4, 7 and 9 of the accompanying drawings.