GB2504488A

GB2504488A - Transceiver with a series switch positioned between a common impedance matching network and an LNA to provide transmit/receive switching

Info

Publication number: GB2504488A
Application number: GB201213513A
Authority: GB
Inventors: Franco Lauria
Original assignee: Toumaz Microsystems Ltd
Current assignee: Toumaz Microsystems Ltd
Priority date: 2012-07-30
Filing date: 2012-07-30
Publication date: 2014-02-05
Also published as: GB201213513D0; WO2014020297A1

Abstract

This invention relates to transmit/receive switching in a RF transceiver. Transmit and receive circuits share a common impedance matching network, 20. The impedance matching network is located between the antenna 22 and a branching point 28, where the circuit divides into two branches. A power amplifier (PA) and a low noise amplifier (LNA) are connected to respective branches. A series-switch T2 is connected between the impedance matching circuit and an amplifying section T1 of the LNA. The series switch and the amplifying section of the LNA may each include a respective FET. Preferably, there is no series switch between the impedance matching network and the PA. A DC bias voltage may be provided to the transmitter or/and receiver through the matching circuit.

Description

Radio frequency transceivers

FIELD OF THE INVENTION

The invention relates to radio frequency tranceivers, and to an area and power efficient on-chip switch for switching between transmit and receive modes.

BACKGROUND OF THE INVENTION

In wireless communication systems it is known to use an antenna to both transmit (TX) and receive (RX) in a time division duplex manner. As shown in Figure 1, a time division duplex transceiver (8, 10) may employ a single antenna 4 for transmission and reception with a TX RX switch and interface circuit (6), containing matching networks 11, connecting the antenna 4 to a receive Low Noise Amplifier (LNA) 8 and transmit Power Amplifier (PA) 10.

To maximize power efficiency, typically the transmit (TX) and receive (RX) circuits are integrated on a chip and operate at large on chip impedance while being interfaced with a lower impedance antenna (typically about 50 Ohm). Switches 6 are used to connect the antenna 4 to the Power Amplifier 10 in TX mode, and to connect the antenna 4 to the Low Noise Amplifier 8 in RX mode, while matching networks 11 provide impedance matching between the antenna 4 and the Low Noise Amplifier 8 and Power Amplifier 10. Also, conflicting matching requirements are needed tor TX and RX functions. The result is a complex circuit that consumes a large die area if integrated on chip or requires costly off chip components if implemented on a printed circuit board (PCB). Also as the TXIRX switch 6 is in cascade to the Transceiver (8, 10) the switch insertion loss degrades TX and RX performances.

SUMMARY OF THE INVENTION

The invention provides a radio frequency transceiver as set out in the accompanying claims.

BRIEF DESCRIPTION OF THE FIGURES

Figure 1 shows a known arrangement in which an antenna is connected to a transmitter and receiver operating in a time division duplex manner; Figure 2 shows a first embodiment of the invention; and Figure 3 shows a second embodiment of the invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

The embodiments described integrate a switch and impedance matching into a simple single RF (radio frequency) interface and modify the Low Noise Amplifier and Power Amplifier designs in order to keep the bulk of the design away from the signal path, thus minimizing the RF losses and implementation size. The implementation size is reduced due to the fact that (1) a common and simpler matching network common to both TX and RX is employed and (2) a single series switch is used in RX mode only, whilst in TX mode there is no series switch in the RE path.

Figure 2 shows a simplified diagram outlining an embodiment of the invention. A Low Noise Amplifier 12 forms the input stage of a receiver chain (not shown), and a Power Amplifier 14 forms the output stage of a transmitter chain (not shown). An inductor 16 (labelled Lmatch in Figure 2) and a capacitor 18 (labelled Cmatch in Figure 2) form a matching network 20. The matching network 20 matches the impedance of an antenna 22 (about 50 Ohm) with the higher impedances (800-1200 Ohm), of the Low Noise Amplifier 12 and Power Amplifier 14 which high impedances are required for Low Noise Amplifier noise and power matching and to maximize Power Amplifier efficiency and transmit power. The matching network 20 serves two purposes: (a) to maximize power transfer from the antenna 22 to the LNA 12 and (b) to minimize LNA noise.

Two transistors T5 and T6 are used as switches to select TX or RX bias voltages. To implement the RX or TX function, the Low Noise Amplifier input 24 and Power Amplifier output 26 are connected together to a single RF port 28. Transistors T5 and T6 are used to implement a SPDT (single pole double throw) switch, that connects the appropriate bias voltage (labelled VDD PA and Bias LNA in Figure 2) to the AC ground terminal 30 of the Matching inductor 16.

In TX mode, T5 turns on, T6 turns off and the DC bias voltage for the Power Amplifier 14 (Vbias PA) is connected to the inductor 16. In RX mode, T5 turns off, T6 turns on and the DC bias voltage for the Low Noise Amplifier 12 (VBias LNA) is connected to the inductor 16.

Nine transistors, labelled Ti to T9 in Figure 2, are used to implement the switching arrangement. Table 1 below gives a summary of the states of each of the transistors Ti to T9 in receive (RX) mode and transmit (TX) mode.

Table 1

Device RX Mode TX Mode Operating Function Ti ON OFF LNA input amplifying device T2 ON OFF Series Switch to LNA input T3 OFF ON PA last amplifying device T4 OFF ON PA cascode output device T5 OFF ON Series switch selecting VDDPA Bias voltage for RF port.

T6 ON OFF Series switch selecting Vbias LNA Bias voltage for RF port.

T7 OFF ON Series switch used to enable 14.

T8 ON OFF Series switch used to disable T4 by forcing its gate to zero in RX mode.

T9 ON OFF Device used to set LNA bias voltage

Table 1 Devices operation summary is

Low Noise Amplifier Block Ti is the input transistor of the Low Noise Amplifier 12. T2 is a series switch closed (ie ON) in RX mode and open (ie OFF) in TX mode so that the Low Noise Amplifier input is connected to the RF port 28 in RX mode, while it is disconnected in TX mode. T2 is a high voltage device, as in TX mode there are large voltage swings across its terminals.

Power Amplifier block 13 and T4 form the last stage of the Power Amplifier 14. T3 is a low voltage device designed to provide large transconductance gain, while 14 is a cascode device chosen to cope with the large TX output voltage swings. In TX mode the gate of T4 is connected to VDD, making it operate as a cascode. In this mode the Power Amplifier 14 operates as in a standard Power Amplifier (ie a power amplifier without a TX RX switch). In RX mode the gate of T4 is connected to ground disconnecting the Power Amplifier 14 from the antenna 22. Simulations show that the Power Amplifier performance is largely unaffected, with similar power and efficiency to the standard Power Amplifier. The Power Amplifier output will see an additional capacitance due to 12 drain but this can be tuned out adjusting the matching network.

When the Transceiver is in RX mode, the Power Amplifier 14 is disconnected from the RE port 28 by turning off T4, Ti is open (le OFF) and TB is closed (ie ON) to guarantee that T4 is off TB ensures that the gate of T4 is at zero potential, by shorting any accumulated charge to ground.

Matching Network The matching network in its simplest form comprises the inductor 16 (L match), which acts as a shunt inductor, as shown in Figure 2.

The shunt inductor 16 is needed to provide a DC bias voltage to the RE port 28. If required, alternative matching networks can be used as long as a DC bias voltage path exists from Vbias to the SF port 28. Figure 3 below shows the TXRX switch with a matching network which uses two inductors 32 and 34. The other components of Figure 3 are the same as those of Figure 2.

It will be seen that the embodiments provide a transmit! receive switch requiring no additional passive RE components, and using a single EET switch, T2, in the RE path.

In Figure 2 the RF path starts at the antenna 22 and for the receiver ends at the drain of Ti (labelled To receive chain in Figure 2), and for the transmitter starts at the gate of 13 (labelled From transmit chain in Figure 2) and ends at the antenna 22.

The embodiments provide the following advantages: No insertion loss in TX mode -No series switch between the Power Amplifier output device T4 and SF port 28. Note that in TX mode, T4 is not a series switch which causes insertion loss, but is instead a common gate amplifier, an integral part of the Power Amplifier design and is required even if TX/RX switching functionality is not required.

The output stage of the PA is composed of 13, configured as a common source amplifier and T4 a common gate amplifier. This is part of the PA design and would be there even if a RX function is not necessary.

By setting the gate of T4 to zero in RX mode, T4 can be switched off, disconnecting the TX circuit from the SF port 28. The fact that T4 is a common gate amplifier makes 14 the best candidate to be switched off in RX mode. This is because in normal operation, a common gate amplifier has no voltage swing at its gate (the gate is at zero potential), so the addition of 17 and 18 does not compromise performance and their size can be small.

Small Insertion loss in RX mode -As the series switch, T2, is placed after the impedance matching network 20, its resistance causes negligible power loss.

Low chip area/Low cost -A single, simple matching network for TX and RX requiring no additional costly external components, such as the components in block 6 in Figure 1.

Claims

CLAIMS: 1. A radio frequency transceiver comprising: a transmitter comprising a power amplifier forming the output stage of a transmitter chain; a receiver comprising a low noise amplifier forming the input stage of a receiver chain; an impedance matching circuit; a branching radio frequency path connecting said power amplifier and low noise amplifier to said matching circuit, and a further radio frequency path connecting said matching circuit to an antenna; wherein said low noise amplifier comprises a receiver amplifying device, and a single series switch is placed in the radio frequency path between said receiver amplifying device and said antenna to achieve switching of said transceiver between receive and transmit modes.
2. A transceiver as claimed in claim 1, wherein said receiver amplifying device is a FET.
3. A transceiver as claimed in claim 1 or 2, wherein said receiver amplifying device is the first amplifying device of said low noise amplifier when following the radio frequency path from the antenna to the low noise amplifier.
4. A transceiver as claimed in any preceding claim, wherein said single FET switch has a source and drain which are connected in series with the radio frequency path between the low noise amplifier and the antenna.
5. A transceiver as claimed in any preceding claim, wherein said power amplifier comprises a transmitter amplifying device, and wherein no additional series switch is provided in the radio frequency path between said transmitter amplilfying device and said antenna.
6. A transceiver as claimed in claim 5, wherein said transmitter amplifying device is FET.
7. A transceiver as claimed in claim 5 01 6, wherein said transmitter amplifying device is the final amplifying device of said power amplifier when following the radio frequency path from the power amplifier to the antenna.
8. A transceiver as claimed in any preceding claim, wherein said impedance matching circuit comprises a single inductor.
9. A transceiver as claimed in any preceding claim, wherein at least one DC bias voltage is provided to the transmitter or receiver through said matching circuit.
10. A transceiver as claimed in any preceding claim, wherein said impedance matching circuit is positioned between the antenna and said switch.
11. A transceiver as claimed in any preceding claim, wherein said single series switch is an on-chip switch.