GB2496822B - Cell-state determination in phase-change memory - Google Patents
Cell-state determination in phase-change memoryInfo
- Publication number
- GB2496822B GB2496822B GB201304453A GB201304453A GB2496822B GB 2496822 B GB2496822 B GB 2496822B GB 201304453 A GB201304453 A GB 201304453A GB 201304453 A GB201304453 A GB 201304453A GB 2496822 B GB2496822 B GB 2496822B
- Authority
- GB
- United Kingdom
- Prior art keywords
- cell
- phase
- state determination
- change memory
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP10174613 | 2010-08-31 | ||
PCT/IB2011/053757 WO2012029007A1 (en) | 2010-08-31 | 2011-08-26 | Cell-state determination in phase-change memory |
Publications (3)
Publication Number | Publication Date |
---|---|
GB201304453D0 GB201304453D0 (en) | 2013-04-24 |
GB2496822A GB2496822A (en) | 2013-05-22 |
GB2496822B true GB2496822B (en) | 2013-10-02 |
Family
ID=44720066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB201304453A Active GB2496822B (en) | 2010-08-31 | 2011-08-26 | Cell-state determination in phase-change memory |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP5705321B2 (en) |
CN (1) | CN103081018B (en) |
DE (1) | DE112011102156T5 (en) |
GB (1) | GB2496822B (en) |
WO (1) | WO2012029007A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2502553A (en) * | 2012-05-30 | 2013-12-04 | Ibm | Read measurements of resistive memory cells |
US10388370B2 (en) * | 2016-04-07 | 2019-08-20 | Helmholtz-Zentrum Dresden—Rossendorf E.V. | Method and means for operating a complementary analogue reconfigurable memristive resistive switch and use thereof as an artificial synapse |
DE102022125340A1 (en) | 2022-09-30 | 2024-04-04 | TechIFab GmbH | DEVICES AND METHODS FOR READING A MEMRISTIVE COMPONENT |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100182827A1 (en) * | 2009-01-22 | 2010-07-22 | Sergey Kostylev | High Margin Multilevel Phase-Change Memory via Pulse Width Programming |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10036140C1 (en) * | 2000-07-25 | 2001-12-20 | Infineon Technologies Ag | Non-destructive read-out of MRAM memory cells involves normalizing actual cell resistance, comparing normalized and normal resistance values, detecting content from the result |
US6650562B2 (en) * | 2002-01-23 | 2003-11-18 | Hewlett-Packard Development Company, L.P. | System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device |
US8116123B2 (en) * | 2008-06-27 | 2012-02-14 | Seagate Technology Llc | Spin-transfer torque memory non-destructive self-reference read method |
US7929338B2 (en) * | 2009-02-24 | 2011-04-19 | International Business Machines Corporation | Memory reading method for resistance drift mitigation |
-
2011
- 2011-08-26 CN CN201180042043.0A patent/CN103081018B/en not_active Expired - Fee Related
- 2011-08-26 JP JP2013525414A patent/JP5705321B2/en active Active
- 2011-08-26 DE DE201111102156 patent/DE112011102156T5/en active Pending
- 2011-08-26 GB GB201304453A patent/GB2496822B/en active Active
- 2011-08-26 WO PCT/IB2011/053757 patent/WO2012029007A1/en active Application Filing
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100182827A1 (en) * | 2009-01-22 | 2010-07-22 | Sergey Kostylev | High Margin Multilevel Phase-Change Memory via Pulse Width Programming |
Also Published As
Publication number | Publication date |
---|---|
WO2012029007A1 (en) | 2012-03-08 |
GB201304453D0 (en) | 2013-04-24 |
CN103081018A (en) | 2013-05-01 |
JP5705321B2 (en) | 2015-04-22 |
CN103081018B (en) | 2016-06-22 |
GB2496822A (en) | 2013-05-22 |
JP2013541123A (en) | 2013-11-07 |
DE112011102156T5 (en) | 2013-05-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
746 | Register noted 'licences of right' (sect. 46/1977) |
Effective date: 20131021 |