GB2485203A - Adjusting time via an electrical port - Google Patents

Abstract

An independently powered timepiece, such as a clock or a watch has a time display and an electronic time reference to which the display corresponds. An electrical port is configured to transmit and/or receive a time signal which is used to update the time reference.

Description

I

APPARATUS AND METHOD FOR CONVEYING TIME AND RELATED INFORMATION

TO TIMEPIECES

This invention relates to the way the time and related information is conveyed to a timepiece S such as a clock or watch. Two electrical contacts are used to send the data as an asynchronous serial signal.

Timepieces such as clocks and watches display, primarily, the passage of time. Setting the correct time on a timepiece is, in general, a more complex task than maintaining the correct time, as is described in the following two examples.

The first example is the mechanical or electromechanical timepiece. It need not necessarily store and count a representation of the time value other than as the position of the time indicating elements such as hour and minute hands. The timekeeping mechanism only needs to advance the positions of the indicating elements regularly. The correct time indication is set though external mechanical intervention. An example is a watch crown and associated keyless work, which detaches the pointers from the driving mechanism and allows them to be repositioned manually. A limitation of this approach is that it is difficult to extend the timepiece's functionality beyond basic time display. The state of the art, for example, would be the mechanical perpetual watch, where the time, date, month and year-remainder-four all need to be set, which is a complex mechanical task. (No attempt is made to account for the fact that not all years divisible by four are leap years!) A second limitation is that values must be known in order to set them. For example, a moon-phase indicator on a mechanical watch can only be correctly set if the correct moon phase is known, when it could be derived from knowledge of the date, month and year if these were stored and counted internally. Likewise a third limitation is that derivable values such as the day-of-week, even if known, require an intervention mechanism to set them correctly, even though they could be derived from knowledge of the date, month and year if these were stored and counted internally. A fourth limitation is that the mechanism that allows external intervention is typically difficult to waterproof, which is an important consideration in watchmaking.

More complex timepieces do store and count a representation of the time value. The second example is a watch with an LED or LCD display, where the internal representation is required in order to determine which display elements to excite. In this case the time is set through a complex sequence of presses of pushswitches on the device. The state of the art might be any one of many wristwatches that display time information up to, and including, the year and determine values such as day-of-week by internal calculation. A limitation of this approach is that setting the time on the timepiece is complicated, often requiring the user to resort to a written guide in order to determine how to operate it. A second limitation is that the setting process subjects the pushswitches to substantial wear and it is not uncommon for the failure of these parts to render the timepiece unusable. A third limitation is that the pushswitches are similarly difficult to waterproof.

According to a first aspect of the present invention, there is provided an independently powered timepiece, such as a clock or wristwatch, having a time display, comprising an electronic time reference, wherein the time display is configured to correspond to the electronic time reference, and an electrical port, configured for transmitting and/or receiving a signal representing the time, wherein the electronic time reference is configured to update on receipt of the signal representing the time.

According to a second aspect of the present invention, there is provided a signal, for transmission between a first timepiece and a second timepiece, the first timepiece being independently powered, such as a clock or wristwatch, and having a time display, the signal representing the time.

Accordingly, and with reference to figures 1 and 2, the invention is a method for conveying time information between devices in a peer-to-peer manner as follows: 1. Devices contain an electronic counter (101') where time information is stored. The stored time data is incremented regularly by means of oscillator (102') to keep the time information up-to-date. Readout interface (103') allows the time information to be conveyed as required, for example to update a display. Setting interface (104') may optionally be provided to modify the stored time information by external intervention.

2. Interface driving circuitry and electrical contacts (105', 106'; 202', 205') provide a communications link between any pair of such timepieces which are brought into electrical contact and allow one or more of the following operations: a. time information is obtained from electronic counter (203') of first device (201') and transmitted over the interface b. time information is received over the interface by second device (204') and stored in second device's electronic counter (206') c. a data request signal is transmitted over the interface by second device (203') to first device (201') which causes exchange of time information outlined in a' and b' above.

3. Interface driving circuitry and electrical contacts (105', 106') may additionally be capable of detecting when the contacts are shorted together and consequently engaging in a particular operation, for example generating data request signals as described in 2c' for a limited period.

4. Transmit-only devices (201') may use the communications system described in 2' convey time information to a second device (204') as described in 2b' and possibly 2c' without having the capability to accept time information by such means as described in (2a') Embodiments of the invention would generally take the form of integrated electronic circuits such as microcontrollers with serial communications peripherals, with the addition of protective circuitry to ensure that harsh electrical conditions at the electrical connections do not damage or interfere with the function of the timepiece. In order to provide as much flexibility as possible in the design of compliant timepieces, the electrical connectors (105') would likely be two in number, requiring half-duplex communication, but physically only restricted by the following requirements: (i) that they could can be brought into electrical contact with other such devices or readily shorted with a device such as a coin, e.g., "it should be possible to place the timepiece against a surface such that the contacts are the only parts to come into contact with the surface and that they do so 5mm apart" and (ii) that the contacts not be of a chemistry such that they generated an electrical potential if brought into contact with an electrolyte. Most likely one such contact would be the enclosure itself, if the enclosure were conducting. No indication need be given as to the polarity of the connections, since only two orientations exist and the incorrect orientation is rendered harmless by the protective circuitry. The user could then manually reverse the polarity.

Alternatively, the circuit could deduce the condition due to lack of response from the other device, or the current drawn by its protection circuitry, and perform the connection reversal electronically.

Accordingly, an embodiment is given in figure 3 where clock circuit 301' contains microprocessor, oscillator, counter, and readout interface (e.g. time display). I/O pin 302' connects driver circuitry in microcontroller to first electrical contact 303' via protection circuitry 304/305'. Second electrical contact 306' provides and electrical ground return path. Low-valued resistor 304' limits the current that may flow through first contact 303' while zener diode 305' limits any positive voltage on I/O pin 302' to the zener breakdown voltage, and any negative voltage to the zener forward voltage.

Battery 307' supplies a continuous source of power. Diodes 308' and 309' having low forward voltage ensure clock circuit 301' power input 312' is powered by the greater of the battery 307' or the voltage appearing at I/O pin 302' due to an applied voltage on electrical contact 303' thus ensuring that driver circuitry in two connected timepieces operate at compatible voltages even when operating with different battery supply voltages.

Battery 307' may be re-chargeable, in which case current limiting resistor 310' may be provided to allow battery to be charged by a voltage applied on electrical contact 303', irrespective of whether such voltage is a serial communication from another such device or a fixed voltage source. In this case, resistor 304' and zener 305' can provide a constant voltage source given a range of voltages provided at electrical contact 303' beyond the range limit anticipated for serial communications.

High-valued resistor 311' ensures I/O pin 302' is pulled weakly to ground when otherwise left floating, allowing microcontroller 101' to deduce that no device is attempting to communicating with it until a positive voltage is apparent on I/O pin 302'. This state also ensures that the input does not float, which consumes considerable power on the microprocessor digital input circuitry, nor that shorting of the contacts consumes significant power.

In an alternate embodiment, shown in figure 4, high-valued resistor 403' is instead connected to circuit 401' output 404'. Most of the time I/O pin 402' is pulled weakly to ground by output 404'. Occasionally output 404' may pulse a positive voltage, allowing I/O pin 402' to detect whether a short condition exists across the electrical contacts 405'I'406'.

In an alternate embodiment, shown in figure 5, circuit 501' output 504' may not only be connected to high-valued resistor 503', but also to additional circuitry 507' such as a stepper motor coil. Output 504' from time to time pulses a positive voltage in order to drive coil 507', and it is at these times that the voltage on I/O pin 502' is sampled to detect whether a short condition exists across the electrical contacts 505/506'.

In an alternate embodiment, shown in figure 6, circuit 601' I/O pin 602' may not only be connected to high-valued resistor 603', but also to additional circuitry 607' such as a thermistor which in combination with resistor 603' acts as a potential divider. If electrical contact 605' is floating, positive voltage pulses on output 604' allow the divided potential to be measured on I/O pin 602', while it being immediately apparent if a short condition exists across the electrical contacts 605'I'606' due to the measured voltage being out of the expected range.

The aim of alternate embodiments shown in figure 5 and 6 is to minimize the required number of connections to the clock circuit. They are not incompatible and could be combined in a single circuit. The embodiment shown in figure 7 takes advantage of the fact that a typical watch stepper motor coil requires excitations of alternating polarities. Two outputs 701' and 702' alternately issue positive voltage pulses to excite coil 703'. The potential divided by high-value resistor 704' and thermistor 705', and also any shorting between connectors 707' and 708', are measurable at I/O pin 706' in either polarity of excitation at 701'I'702', thus increasing the frequency of the data readings.

Transmission of information in the above-discussed embodiments occurs as a succession of bits imparted as voltages across the connectors, with logic 0 being when the connectors are at the same electrical potential, and logic I being when one is held at the circuit supply ground potential and the other at the circuit supply positive potential. Transmission of information needs to be sufficiently robust that spurious signals generated due to static, shorting, poor connection, etc, can be rejected.

With reference to figure 8, where vertical axis 801' represents the potential difference across the connectors in volts, and horizontal axis 802' represents time in seconds, an embodiment of the transmission of information is as follows.

1. Transmitting device optionally monitors connections for a period 803' of 5Oms, during which time it is required to have stayed at logic 0, in order to avoid collision with a transmission from the other device. Since this step is optional, a receiving device is not required to detect it as a condition of accepting the transmission.

2. Transmitting device holds the connection at logic I for a minimum period 804' of 5Oms, indicating it may issue serial data. Receiving device rejects any transmission where this state is not detected. Receiving device might conceivably exit a low-power sleep state when such state is detected.

3. Transmitting device outputs a back-to-back succession of bytes in conventional TTL 8N1 serial format, i.e. a logic 0 start bit, eight data bits, least significant bit first, and a logic I stop bit. The bit rate is 3276,< 303.4 Hz, being easily derived from a 32768Hz watch crystal, slow enough to be managed by a microcontroller clocked at the same rate, fast enough to allow communications to complete quickly from a human perspective and close enough to 300Hz to be compatible with the more standard 300Hz baud rate. The series of bytes is as follows: a. A preamble 805' comprised of the single byte 110 (ASCII H' for header').

Receiving device rejects any transmission where this byte is not detected.

b. A data payload 806' of one or more bytes, the contents of which allow the length of the payload to be determined. Receiving device rejects any transmission where the complete payload is not received intact as a back-to-back succession of bytes.

c. A checksum 807', such that the sum-modulo-256 of all bytes a', b and c is zero. Receiving device rejects any transmission where the checksum is not correct.

4. Transmitting device holds the connection at logic I for a minimum period 808' of SUms, indicating the end of the transmission. Receiving device rejects any transmission where this state is not detected where expected.

5. Transmitting device releases the line 809' to allow other transmissions to take place.

6. Correctly received transmissions are not required to be acknowledged in any way by receiving device. Any acknowledgement would be a separate transmission, or a temporary non-idle condition imparted by the device receiving the original message.

Within the above-discussed embodiments, circumstances under which transmissions are initiated include: 1. A device detecting that its contacts have been shorted for a minimum of two seconds, and such shorting has ceased for one second, then sends a transmission where the payload indicates a Time Request. Such transmissions are repeated once per second for ten seconds or until a Time Information transmission is then received.

2. A device receiving a Time Request transmission responds with a Time Information transmission, the payload of which includes the time information stored in its counters. The device receiving the Time Information transmission may then store the conveyed information in its counters.

3. A device sending a transmission may indicate within the transmission that it requests that acknowledgement it received. In this case, a Transmission Acknowledge transmission is sent by the device receiving the transmission, be it a formal transmission as depicted in figure 8, or a temporary non-idle condition.

4. A transmit-only device may ceaselessly issue Time Information transmissions spaced by one second. Such device is not required to maintain the logic 0 state during quiet periods (803 and 809' in figure 8), since the equivalent can be achieved from the receiver's perspective simply by bringing it temporarily into contact with the transmit-only device. This allows such transmit-only device to be implemented on standard TTL serial ports, such as the USB to TTL serial cable from Future Technology Devices International, whose idle state is logic 1' but which can otherwise easily generate all other required states (804' to 808' in figure 7).

5. A configuration and diagnostics device might issue Time Request and Time Information commands under user control, in addition to commands for diagnosis, calibration, identification, request to a issue calibration waveform over connections 3051306', pointer alignment, etc.

Claims (26)

1. CLAIMS1. An independently powered timepiece, such as a clock or wristwatch, having a time display, comprising an electronic time reference, wherein the time display is configured to correspond to the electronic time reference; and an electrical port, configured for transmitting and/or receiving a signal representing the time, wherein the electronic time reference is configured to update on receipt of the signal representing the time.
2. 2. A timepiece as claimed in Claim 1, wherein the electrical port is configured to be in an idle and a non-idle state, wherein there is a potential difference across the electrical port in the non-idle state.S
3. 3. A timepiece as claimed in Claim 2, wherein the electrical port is configured to initiate a transmission of the signal representing the time by being in the non-idle state for a predetermined time period.
4. 4. A timepiece as claimed in any one of the preceding claims, wherein the electrical port is further configured to transmit or receive electrical power.
5. 5. A timepiece as claimed in Claim 4, further comprising a battery, wherein the battery is configured to charge on receipt of the electrical power.
6. 6. A timepiece as claimed in Claim 5, further comprising a voltage regulator circuit, wherein the voltage regulator circuit is configured to receive the electrical power and deliver a substantially constant voltage to the battery for charging.
7. 7. A timepiece as claimed in any one of Claims 2 to 6, wherein the transition between the idle and non-idle state is effected by shorting the electrical port.
8. 8. A timepiece as claimed in any one of Claims 2 to 7, including a testing circuit, configured to test if the electrical port is in the non-idle state.
9. 9. A timepiece as claimed in any one of Claims 2 to 8, wherein the electrical port is configured to return to the idle state after a time period.
10. 10. A timepiece as claimed in any one of the preceding claims, further comprising a protective circuit, configured to protect against voltages above a predetermined level across the electrical port.
11. 11. A timepiece as claimed in Claim 10, wherein the protective circuit is further configured to reverse the polarity of the electrical port.
12. 12. A timepiece as claimed in any one of the preceding claims, wherein the signal representing the time further represents daylight saving time.
13. 13. A timepiece as claimed in any one of the preceding claims, wherein the signal representing the time also represents the month.
14. 14. A timepiece as claimed in any one of the preceding claims, wherein the electrical port is further configured to transmit an acknowledgement on receipt of the signal representing the time.
15. 15. A timepiece as claimed in any one of the preceding claims, further comprising an oscillator, wherein the electrical port is further configured to transmit a calibration signal, such that the oscillator may be calibrated.
16. 16. A timepiece as claimed in any one of the preceding claims, wherein the signal includes a header portion, a data portion and a checksum.
17. 17. A timepiece as claimed in Claim 16, further comprising a detector, configured to detect the header portion.S
18. 18. A timepiece as claimed in Claim 16, further comprising a detector, wherein the data portion includes a series of bytes, the detector being configured to detect a time delay between consecutive bytes.
19. 19. A timepiece as claimed in Claim 16, further comprising a detector, configured to detect the checksum.
20. 20. A timepiece as claimed in any one of the preceding claims, wherein the electrical port is in the non-idle state for a predetermined time period after transmission of the signal relating to the time.
21. 21. A timepiece as claimed in Claim 20, further comprising a detector, configured to detect if the electrical port is in the non-idle state for the predetermined time period.
22. 22. A timepiece as claimed in any preceding claim, wherein the electrical port is positioned at a peripheral portion of thereof.
23. 23. A signal, for transmission between a first timepiece and a second timepiece, the first timepiece being independently powered, such as a clock or wristwatch, and having a time display, the signal representing the time.
24. 24. A signal as claimed in either Claim 23 or 24, wherein the signal bit rate is between 290Hz and 310Hz.
25. 25. A timepiece substantially as herein described with reference to and as shown in any combination of the accompanying drawings.
26. 26. A signal substantially as herein described with reference to and as shown in any combination of the accompanying drawings.