GB2479893A - Spin field effect transistor - Google Patents

Spin field effect transistor Download PDF

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GB2479893A
GB2479893A GB1007018A GB201007018A GB2479893A GB 2479893 A GB2479893 A GB 2479893A GB 1007018 A GB1007018 A GB 1007018A GB 201007018 A GB201007018 A GB 201007018A GB 2479893 A GB2479893 A GB 2479893A
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iron
layer
manganese
cobalt
spin
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GB201007018D0 (en
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Genhua Pan
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Plymouth University
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Plymouth University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/435Resistive materials for field effect devices, e.g. resistive gate for MOSFET or MESFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66984Devices using spin polarized carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/82Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of the magnetic field applied to the device

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
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Abstract

A spin field effect transistor comprising a base layer 4; a source assembly 10 arranged on and in electrical contact with the base layer 4, the source assembly 10 having a layer of ferromagnetic material 14 having a first magnetic moment A; a drain assembly 20 arranged on and in electrical contact with the base layer 4, the drain assembly having a layer of ferromagnetic material 24 having a second magnetic moment B, the drain assembly 20 being displaced on the base layer 4 from the source assembly 10; and a gate assembly 30 disposed on the base layer 4 between the source assembly 10 and the drain assembly 20, the gate assembly 30 comprising a layer of ferromagnetic material 36 having a third magnetic moment C; wherein the gate assembly 30 further comprises means for varying the orientation of the third magnetic moment C such that it may be brought into and out alignment with both the first and second magnetic moments A,B. A method of controlling a spin field effect transistor is also described, the transistor comprising a source assembly 10, a drain assembly 20 and a gate assembly 30 in contact with a base layer 4, the method comprising varying the magnetic moment C of a layer of ferromagnetic material 36 in the gate assembly 30 relative to the magnetic moment A,B of a layer of ferromagnetic material 14,24 in each of the source and drain assemblies 10,20. The transistor finds use in spin current gating and spin current amplification.

Description

A TRANSISTOR AND A METHOD FOR OPERATING THE SAME
The present invention relates to a transistor. In particular, the present invention relates to a transistor utilising the spin degrees of freedom present in electrons, especially to a MOSFET transistor relying on electron spin. The present invention further relates to a method for operating, in particular controlling, the transistor.
Conventional electronic devices employ the charge carrying characteristics of materials, in particular electrons in semiconductor materials. Thus, in a conventional semiconductor device, a negative charge is carried by an electron, while a positive charge is carried by an absence of electrons, or holes'. Recently, attention has turned to the property of electrons to exhibit specific spin orientations. In particular, an electron may be characterized as being spin up' (represented by the symbol 1') or spin down' (represented by the symbol i,'), depending upon the orientation of its spin. The direction of spin of an electron is detectable as a weak magnetic energy state, that is characterized by the orientation of the spin. Devices that operate according to the manipulation and control of the spin orientation of an electron have potentially wide applications in the fields of communications, computer technology and data storage. Although in the very early stages of development, the concept of using electron spins in this way has, by analogy with conventional electronics, been called spintronics'. * *
:: 25 A particular requirement for the widespread commercial adoption of spintronics for a wide range of electrical devices is the development of a transistor able to utilize the spin degrees of freedom exhibited by electrons, instead of or in addition to their charge. For example, it would be most advantageous if a spin-based equivalent to the conventional field effect transistor (FET), in particular the metal * 30 oxide semiconductor field effect transistor (MOSFET) could be found. It would be * especially advantageous if such a device could be devised that is operable at or near ambient or room temperatures.
Recent years has seen considerable investigation into the generation, control and production of spin oriented electrons. Thus, US 6,369,404 discloses a device for the measurement of single electron and nuclear spins. The device comprises a semiconductor substrate, onto which is introduced at least one donor atom to produce a donor nuclear spin electron system having large electron wave functions at the nucleus of the donor atom. An insulating layer extends across the substrate, to which is attached first and second conducting gates. The first gate controls the energy of the bound electron state at the donor atom. The second gate is used to generate at least one additional electron in the substrate. The gates are biased to move the additional electron to the donor atom in the substrate, when the spins of the additional electron and donor electron or nucleus so permit.
US 6,403,999 discloses a method and apparatus for the detection of free electrons with a selected spin polarization within a semiconductor material. The method involves applying a static magnetic field and an electromagnetic field to the semiconductor, during which free electrons are injected into the semiconductor by way of diffusion or tunneling techniques from a ferromagnetic material. The movement of the spin polarized electrons within the semiconductor gives rise to a Hall voltage across the semiconductor by virtue of the applied magnetic field and the Hall effect. The measurement of this Hall voltage is used to estimate a concentration of free electrons with a given spin. This method relies upon the application of magnetic fields and the resulting Hall effect voltage arising from the movement of the electrons within the semiconductor. * * S..
25 EP 1 659 416 concerns a method and apparatus for spin detection. The method for detecting spin polarization in a medium comprises measuring a first current on a first contact with the medium having a first spin selectivity, measuring a *..
* second current on a second contact with the medium having a second spin *.. selectivity, and deriving an average or statistically relevant spin state from a
S
comparison of the first and second currents. The selectivity of the first and second * contacts to the spin is achieved using a combination of materials having different magnetic properties.
One technique that has received significant attention in recent years for the handling of spin polarized electrons is spin tunneling. Spin tunneling is a technique by which spin polarized carriers, in particular electrons, are caused to pass from a source material into a second material. The technique has been known for some time and observed in the case of two ferromagnetic materials. Thus, Pan, F.M., et al., Transport Properties on La07Sr03MnO3IAl2O3/Fe Tunnel Junctions', Journal of Zhejiang University Science, 2000, Vol. 1, No. 2, pages 121 to 124 describes experiments in which the transport of spin polarized electrons between a layer of LaSrMnO and a layer of iron was observed. The aforementioned layers were separated by an insulating layer of alumina (A1203).
More recently, attention has focused on similar spin tunneling phenomena for the transport of spin polarized electrons from a source material, for example a ferromagnetic material, into a semiconductor material. This technique has been recognized as having potential in realizing many devices based upon the principles of electron spin polarization and spintronics.
Motsnyi, V.F., et al., Electrical Spin Injection in a Ferromagnetic/Tunnel Barrier/Semiconductor Heterostructure', APL 81, 265 (2002) describe experiments conducted to investigate the electrical ballistic electron spin injection from a ferromagnetic metal/tunnel barrier contact into a semiconductor Il-V heterostructure.
An injected spin polarization of 8% at 80K was observed in a * CoFe/Al2O3JGaAs/(Al,Ga)As structure. *5(*
: 25 Van Dorpe, P. et al., Highly Efficient Room Temperature Spin Injection in a Metal-Insulator-Semiconductor Light-Emitting Diode', Jpn. J. Appl. Phys. Vol. 42, No.5B, pages L502 to L504, describe similar experiments to demonstrate the efficiency of spin injection into an AlGaAs/GaAs semiconductor from a CoFe/AIO S.... tunnel spin injector. *. *. 30
* * Ohno, H. et al. Semiconductor Spin Electronics', ISAP International, No. 5 (January 2002) pages 4 to 13 provide a general report into the basic principles of spin polarization in semiconductors and techniques for its use. They describe the principles of spin injection into a ferromagnetic/semiconductor structure and indicate that injection of spin in p-n junctions using magnetic semiconductors has been confirmed by measuring the polarization of light emitted from the recombination of spin polarized electrons and unpolarised holes.
Saikin, S. et aL, ModeUing for Semiconductor Spintronics', lEE Proc.-Circuits Devices Syst., Vol. 152, No. 4, August 2005, pages 366 to 376 summarise approaches to modeling spin transport. It is stated that the problem of spin injection into a nonmagnetic semiconductor is one of the important issues of semiconductor spintronics. It is disclosed that spin-polarised electrons may be injected into a semi-conductor from a metal ferromagnetic contact through a Schottky barrier.
WO 2005/1 09517 discloses a semiconductor device using location and the sign of the spin of electrons and having a spin valve structure. The device comprises a ferromagnetic layer on a substrate having a tunnel barrier layer. A multilayered structure is disclosed, an example being a Ga0 94Mn0.06As/GaAs/Gao.94Mno.06As trilayer structure.
In a topical review, Schmidt G. Concepts for spin injection into semiconductors -a review', J. Phys. D: AppI. Phys. 38 (2005) pages R107 to R122, reviews systems for spin injection into semiconductors and methods for trying to estimate the spin injection efficiency of the system. Systems are disclosed which involve spin injection through a Schottky barrier and through an oxide tunnel barrier layer, for example A1203 tunnel barriers.
25 Saikin S., et al., Spin dynamics in a compound semiconductor spintronic structure with a Schottky barrier', J. Phys.: Condens. Matter 18 (2006), pages 1535 to 1544, provide a theoretical demonstration of spin injection through a Schottky S..
barrier into GaAs semiconductors. SII* * * S..'
Perhaps most recently, the electrical injection and detection of spin-polarized S electrons in a silicon chip at room temperature has been demonstrated, as described by M.E. Flatte, Silicon spintronics warms up', Nature vol. 462/26, pages 419 to 420 (2009). Similarly, the room-temperature electrical injection of spin polarized electrons into n-type and p-type silicon from a ferromagnetic tunnel contact is described by S.P. Dash, et al., Electrical creation of spin polarization in silicon at room temperate', Nature 462, pages 491 to 494 (2009).
Our pending international patent application, publication number WO 2008/044001, discloses a method of detecting spin polarization in a subject material comprises applying a potential difference across the subject material causing an electrical current to flow across the material, thereby inducing carrier polarization within the material in a direction perpendicular to the direction of current flow, carriers of one spin orientation concentrating at a first edge of the subject material and carriers of the opposite orientation concentrating at a second edge of the material, opposite to the first edge under the action of the Spin Hall Effect (SHE); allowing spin polarized carriers to tunnel into a ferromagnetic material from the subject material in at least a portion adjacent one of the first or second edges of the subject material; and measuring the tunneling magnetoresistance (TMR) between the ferromagnetic material and the subject material at the first or second edge. An apparatus for analyzing carrier spin polarization comprises a subject material; means for applying an electric field to the subject material so as to induce a current to flow through the subject material, thereby inducing spin polarization of carriers at opposing first and second edges of the subject material in a direction perpendicular to the electric field under the action of the spin Hall effect (SHE); a ferromagnetic material in contact with at least a portion adjacent one of the first or second edges of the subject material; and means for measuring the tunneling magnetoresistance between the ferromagnetic material and the subject material at the first or second edge. S...
25 A. Fert, et at., Semiconductor between spin-polarized source and drain', * IEEE Trans. Electron Devices 54 (2007) provide a tutorial paper discussing the problems of spin transport in a non-magnetic channel between a source and a drain, S...
in particular the injection of spin polarized current from a magnetic metal and the requirement for specific interfacial resistances to be achieved and maintained.
S S *5S
I. Applebaum, et at., Electronic measurement and control of spin transport in silicon', Nature 447, pages 295 to 298 (2007) consider the transport of spin oriented electrons in silicon, including both the injection and detection of spin oriented electrons in the silicon material.
M. Iran, et al., Enhancement of the spin accumulation at the interface between a spin-polarized tunnel junction and a semiconductor', Physical Review Letters 102 (2009) report on spin injection experiments conducted using a Co/A1203/GaAs interface with electrical detection and applying a transverse magnetic field to induce a large voltage drop at the interface. This is described as indicating a significant increase in the spin accumulation signal.
S. Datta, et al., Electronic analog of the elecro-optic modulator', Applied Physics Letters 56, pages 665 to 667 (1990) discuss an electron wave analog of an electro-optic modulator. The proposed device comprises a gallium-arsenide substrate having spaced-apart iron contacts thereon. A metal-semiconductor junction forming a Schottky barrier is provided as a gate between the two iron contacts. It is suggested that the structure may be useful in modulating currents of spin-oriented electrons in the substrate material.
A spin-injected field effect transistor is described by H.C. Koo, et al, Control of spin precession in a spin-injected field effect transistor', Science, Vol. 325, pages 1515 to 1518 (2009). The transistor comprises an indium-arsenide substrate having two ferromagnetic (FM) electrodes thereon, separated by a gate electrode. It is indicated that orientation of the magnetic fields in the FM electrodes can be used to control the precession of electrons through the substrate.
Most recently, T. Marukame, et al. Read/write operation of spin-based MOSFET using highly spin polarized ferromagnetic/MgO tunnel barrierfor * reconfigurable logic devices', lED M09-215, describe a spin-based MOSFET device * : with spin-transfer-torque switching operable at very low temperatures. The device S...
:. comprises a silicon substrate having spaced apart source and drain assemblies, each having a layer of FM material with a magnetic moment. A gate assembly is . 30 disposed on the silicon substrate between the source and drain assemblies. The drain assembly is provided with spin-transfer-torque switching (STTS) capabilities using a magnetic tunnel junction (MTJ), to provide write functionality, by which the orientation of the niagnetic field in the layer of FM material of the drain assembly can be varied and controlled. In this way, the operation of the so-called STS-MOSFET device can be controlled.
While considerable work and investigation is underway into the development of a spin-based transistor, in particular a spin-based MOSFET, there is still a need for an improved device that represents a candidate for use in a wide range of commercial electrical devices.
According to the present invention there is provided a spin field effect transistor comprising: a base layer; a source assembly arranged on and in electrical contact with the base layer, the source assembly having a layer of ferromagnetic material having a first magnetic moment; a drain assembly arranged on and in electrical contact with the base layer, the drain assembly having a layer of ferromagnetic material having a second magnetic moment, the drain assembly being displaced on the base layer from the source assembly; and a gate assembly disposed on the base layer between the source assembly and the drain assembly, the gate assembly comprising a layer of ferromagnetic material having a third magnetic moment; wherein the gate assembly further comprises means for varying the orientation of the third magnetic moment such that it may be brought into and out alignment with both the first and second magnetic moments. b... * 25
****** * The transistor of the present invention comprises a source assembly, a drain assembly and a gate assembly, all located on a base layer or substrate. It has been S...
found that the precession of spin oriented electrons through the base layer from the source assembly to the drain assembly, that is the spin current in the source-drain 30 channel, may be controlled by varying the orientation of the magnetic moment in an FM layer in the gate assembly. As described hereinafter, this may be achieved using electron spin tunnelling techniques at the gate assembly. The transistor operates as a MOSFET when the first, second and third magnetic moments are aligned, that is are parallel to one another. In this respect, for a current of spin polarised electrons to pass from the source assembly to the drain assembly through the base layer, it is required that the magnetic moments of the source assembly and the drain assembly are parallel. The current is further controlled by the orientation of the magnetic moment in the FM layer of the gate assembly. The magnetic moments in the FM layers of the source assembly and the drain assembly may be variable, in which case it is required that the orientation of the magnetic moment can be controlled. As also described hereinafter, one preferred embodiment of the transistor of the present invention has the magnetic moment at either one or both of the source assembly and the drain assembly fixed or pinned. For example the orientation of the magnetic moment may be fixed in the FM layer of either one or both of the source assembly and drain assembly by means of its own uniaxial anisotropy energy or using an AFM layer with exchange biasing, as described in more detail below..
In a further aspect, the present invention provides a method of controlling a spin field effect transistor, the transistor comprising a source assembly, a drain assembly and a gate assembly in contact with a base layer, the method comprising varying the magnetic moment of a layer of ferromagnetic material in the gate assembly relative to the magnetic moment of a layer of ferromagnetic material in each of the source and drain assemblies.
The transistor of the present invention comprises a source assembly and a drain assembly arranged on a substrate or base layer. The substrate is a semiconductor material. The semiconductor may be an elementary semiconductor in * group Ill or IV of the Periodic Table, or a compound semiconductor of groups Ill-V and groups ll-Vl, or oxide semiconductors. The semiconductor may be an intrinsic *.....
* semiconductor, or may be an extrinsic semiconductor, with one or more dopants.
The semiconductor subject material may comprise an n-type or a p-type **** * semiconductor. Suitable semiconductor materials are known in the art and include ** . bulk or thin film semiconductors such as gallium arsenides (GaAs), gallium *,,*. 30 antimonys (GaSb), indium arsenides (InAs), indium antimonys (lnSb), aluminium aresenides (AlAs), aluminium antimonys (AlSb), indium phosphides (lnP), zinc selenide (ZnSe), silicon, germanium, aluminium gallium arsenides (AIGaAs), and indium gallium arsenides (lnGaAs). Silicon, including n-silicon and p-silicon, is a particularly preferred semiconductor. A further preferred semiconductor for use in the base layer is grapheme, a form of carbon finding increasing use in the development of high speed conventional transistors.
The source assembly and the drain assembly are each disposed on the base layer so as to be in electrical contact with the base layer, such that electrons may pass between the base layer and each of the drain assembly and the source assembly. Each of the source assembly and the drain assembly comprise a layer of ferromagnetic (FM) material extending over the base layer and contacting the base layer through a suitable junction, preferably with a layer of an electrically insulating tunneling barrier material disposed between the FM material and the base layer.
Suitable ferromagnetic (FM) materials for use in the source and drain assemblies are known in the art and include both crystalline and non-crystalline (amorphous) ferromagnetic materials. Examples of suitable ferromagnetic materials are the metals cobalt, iron, nickel, gadolinium and dysprosium. Crystalline ferromagnetic materials include oxides of iron, nickel/iron, copper/iron, magnesium/iron, manganese/iron, yttrium/iron, chromium and europium. Amorphous ferromagnetic materials suitable for use include transition metal-metalloid alloys, typically comprising 80% of a transition metal, for example iron, cobalt or nickel, and a metalloid, for example boron, carbon, silicon, phosphorous or aluminium. Other suitable ferromagnetic materials include combinations of manganese/bismuth, manganese/antimony, nickel/manganese/antimony and manganese/arsenic.
Preferred magnetic materials include cobalt (Co), nickel (Ni), iron (Fe), together with alloys of cobalt, iron, nickel, niobium (Nb), boron (B) and zirconium (Zr), in particular **** 25 cobalt/iron (CoFe), nickel/iron (NiFe), cobalt/iron/niobium (CoFeNb), cobalt/zirconium * (CoZr), cobalt/iron/zirconium (CoFeZr), cobalt/iron/boron (CoFeB), and nickelliron/boron (N1FeB). Further preferred FM materials include the Heulsier alloys or half-metallic ferromagnetic materials. These FM materials have very high theoretical spin polarization and are particularly suitable for use in the FM layers of *...* 30 the source and drain assemblies, to promote the injection and detection/production of spin oriented carriers, especially at room temperature. Examples of such FM materials include combinations of cobalt/iron/silicon (Co2FeSi), cobalt/iron/silicon/aluminium (Co2FeSiAl), iron/silicon (Fe3Si), iron/vanadium/aluminium (Fe2VAI), cobalt/iron/germanium (Co2FeGe), cobalt/iron/chromium/aluminium (C02FeCrAI), nickel/manganese/aluminium (Ni2MnAI), nickel/manganese/indium (Ni2Mnl n), nickel/manganese/tin (Ni2MnSn), nickel/manganese/antimony (Ni2MnSb), nickel/manganese/gallium (Ni2MnGa), cobalt/manganese/aluminium (Co2MnAl), cobalt/manganese/silicon (Co2MnSi), cobalt/manganese/gallium (Co2MnGa), cobalt/manganese/germanium (Co2MnGe), copper/manganese/aluminium (Cu2MnAl), and palladium/manganese/aluminium (Pd2MnAI).
The layer of FM material in the source assembly and/or drain assembly may consist of a single layer of a single FM material, a single layer of a mixture of two or more FM materials, or a plurality of layers of a single FM material or a mixture of two or more FM materials.
The FM layer of each of the source and the drain assemblies may have any suitable thickness. The thickness of the FM layer in each of the source and the drain assemblies is preferably in the range of from 2 to 100 Angstroms, more preferably from 5 to 75 Angstroms, still more preferably from 10 to 50 Angstroms.
Both the source assembly and the drain assembly comprise a layer of FM material having first and second magnetic moments, respectively. The FM material of both of the source assembly and the drain assembly preferably has a magnetic moment that is fixed in its orientation, in particular by means of the uniaxial anisotropy of the FM layer or by means of a pinning structure. If fixed or pinned in this manner, the magnetic moment of the layer of FM material in the source *.S.
**** 25 assembly is parallel to the magnetic moment of the layer of FM in the drain assembly. *.S.
The pinning structure may be an antiferromagnetic (AFM) layer disposed in *** contact with the pinned FM layer. Suitable materials for use in the AFM layer of the pinning structure include transition metals, their alloys or oxides, for example S...
combinations of iridium/manganese (lrMn), platinum/manganese (PtMn), * nickel/iron/manganese (NiFeMn), iron/manganese (FeMn), cobalt oxide (CoO) and nickel oxide (NiO). Alternatively, the magnetic moment may be fixed and stabilized by using a synthetic AFM layer as the pinned layer. The synthetic AFM layer may comprise a layer of an AFM material, as described above, disposed over two layers of an FM material sandwiching a layer of ruthenium. In such a construction, the layer of ruthenium typically has a thickness in the range of from 2 to 50 Angstroms, preferably from 3 to 10 Angstroms. The AFM layer typically has a thickness in the range of from 10 to 200 Angstroms, more preferably from 50 to 100 Angstroms.
The orientation of the magnetic moment in the FM layer of the source and drain may be fixed using techniques known in the art. In particular, the orientation of the magnetic moment may be stabilized and fixed by annealing the layer of FM material once fixed to the base layer in a magnetic field.
If the magnetic moment in the layer of FM material in either one or both of the source assembly and the drain assembly is not fixed or pinned, each assembly comprises means for controlling the orientation of the magnetic moment. Preferably, the means for controlling the first and/or second magnetic moments employs spin polarized electron current, in particular using a magnetic tunneling junction/tunnel or a spin-valve/tunnel. In particular, control of the orientation of the first and/or second magnetic moments is achieved using spin-transfer-torque-switching (STTS), a technique known in the art, for example as described by T. Marukame, et al. Read/write operation of spin-based MOSFET using highly spin polarized ferromagnetic/MgO tunnel barrier for reconfigurable logic devices', lED M09-215. To allow control of the orientation of the magnetic moment in either the source and/or drain assembly, the assembly is provided with a second layer of FM material disposed over the first layer of FM material and separated therefrom by a layer of an electrically insulating tunnelling barrier material. SuItable tunnelling barrier materials are described in more detail below, with a preferred material being a metal oxide, in particular magnesium oxide (MgO). In operation, the second layer of FM material is provided with a magnetic moment. Electrons passing from the second layer of FM * material through the tunnelling barrier material into the first layer of FM material are i..., 30 spin oriented or polarised, with the orientation of the spin of the electrons determining the orientation of the magnetic moment in the first layer of FM material.
As noted above, each of the source and drain assemblies preferably comprises a layer of electrically insulating tunneling barrier material disposed between the layer of FM material and the base layer. This arrangement is known in the art to offer highly efficient injection and extraction of spin polarized carriers between FM materials and semiconductors by removing the conductance mismatch problem, which is the cause of inefficient spin injection and extraction in junctions having a direct contact between the layer of FM material and the semiconductor base layer. Further, this arrangement also offers the advantage that the interface between ferromagnetic material and the subject material will be more stable over time, be less sensitive to temperature fluctuations that direct metal/semiconductor contacts, and will allow the magnetic properties to be more closely controlled. Suitable tunneling barrier materials are known in the art and include metal oxides. Examples of suitable tunneling barrier materials include magnesium oxide (Mg-O, or MgO), aluminium oxide (Al-O, or A1203) and hafnium oxide (Hf-O, or Hf02). Magnesium oxide, in particular crystalline magnesium oxide, is a particularly preferred tunneling barrier material, as this allows both the drain and source assemblies to operate by means of coherent spin tunneling. Other preferred crystalline tunneling barrier materials include zinc/selenium (ZnSe) and strontium/titanium oxide (Sr-Ti-O, or SrTiO3).
In operation, the source assembly provides spin injected electrons in the base layer, in particular by coherent spin tunneling. Spin oriented electron precession through the source-drain channel in the base layer is controlled by the gate assembly, as described hereinafter. Spin oriented electrons are detected at the drain assembly, which acts as a spin filter for electrons leaving the base layer.
The layer of tunneling barrier material may have any suitable thickness. The thickness of the tunnel barrier for the source and drain may be the same, or may be * * different. The tunneling barrier material is preferably present in a layer having a * : * thickness in the range of from 0.5 Angstroms to 100 Angstroms, more preferably from 2 to 70 Angstroms, still more preferably from 2 to 40 Angstroms. ** *
* * 30 As noted above, the spin field effect transistor of the present invention **..
comprises a gate assembly disposed in contact with the base layer between the source assembly and the drain assembly over the source-drain channel in the base layer. As also noted above, the gate assembly is used to control the precession of electrons in the source-drain channel of the base layer. In particular, control of the precession of electrons is achieved using the gate assembly only in the case that the first and second magnetic moments are fixed or pinned.
The gate assembly comprises a first layer of FM material disposed on the base layer, preferably separated therefrom by a layer of electrically insulating tunnelling barrier material. Suitable FM materials and tunnelling barrier materials are as hereinbefore described. The thickness of the first layer of FM material and the thickness of the tunnelling barrier material are also as described above.
The first layer of FM material in the gate assembly has a magnetic moment, the third magnetic moment, that may be varied in its orientation, in particular to be rotated to be parallel with or out of parallel with the magnetic moments in both the source assembly and the drain assembly. The gate assembly further comprises means for controlling the orientation of the third magnetic moment in the first layer of FM material. Preferably, the means for controlling the third magnetic moment employs electron spin tunneling, in particular using a magnetic tunneling junction/tunnel or a spin-valve/tunnel. In particular, control of the orientation of the third magnetic moment is achieved using spin-transfer-torque-switching (STTS), a technique known in the art, for example as described by 1. Marukame, et al. Read/write operation of spin-based MOSFET using highly spin polarized ferromagnetic/MgO tunnel barrier for reconfigurable logic devices', lED M09-215.
STTS is described in more detail in US patent No. 5,695,864. To allow control of the orientation of the magnetic moment in the first layer of FM material in the gate assembly, the assembly is provided with a second layer of FM material disposed S." .... 25 over the first layer of FM material and separated therefrom by a layer of an electrically insulating tunnelling barrier material. Suitable FM materials for use in the second layer are as described above. Suitable tunnelling barrier materials are described in more detail above, with a preferred material being a metal oxide, in particular magnesium oxide (MgO). In operation, the second layer of FM material is provided with a magnetic moment. Electrons passing from the second layer of FM material through the tunnelling barrier material into the first layer of FM material are * spin oriented or polarised, with the orientation of the spin of the electrons determining the orientation of the magnetic moment in the first layer of FM material. The orientation of the magnetic moment in the first layer of FM material may be varied by changing the direction of the current of electrons passing through the assembly. In particular, reversing the direction of the current through the layers reverses the magnetic orientation of the magnetic moment in the first layer of FM material. In this way, the magnetic moment in the first layer of FM material may be oriented to be parallel or anti-parallel (that is have the reverse polarity) to the magnetic moments in the FM layers of both the source assembly and the drain assembly.
In operation, when the third magnetic moment is oriented to be parallel to both the first and second magnetic moments in the source and drain assemblies, the precession or current of spin oriented electrons in the source-drain channel is enhanced. In contrast, when the third magnetic moment is not parallel with the first and second magnetic moments, in particular is anti-parallel, the precession of spin oriented electrons in the source-drain channel is suppressed. This provides for full control of the channel spin current and the amplification of the current in the source-drain channel.
As noted above, the source assembly and drain assembly are each in contact with the base layer or substrate. Preferably, one or, more preferably, both of the source assembly and the drain assembly contact the base layer by means of a layer of tunnelling barrier material. The source assembly acts as a source for spin oriented or polarised electrons. For effective injection of spin polarised electrons from the source assembly into the base layer, the relative electrical resistances of the source assembly and the base layer are important. In particular, for the effective injection of spin polarised electrons from the source assembly into the base layer, the first theoretical threshold resistance to spin polarised injection of the source assembly, r, is required to be significantly less than the tunnel contact resistance (or interface resistance) between the base layer and the tunnel barrier layer, rb. Similarly, for the effective detection or production of spin polarised electrons from the base layer into the drain assembly, the tunnel contact resistance, ri,, is required to be significantly lower than the second theoretical threshold resistance of the drain assembly, r2. I...
*.: Thus, for the effective operation and control of the transistor of the present invention, the following condition is preferably met: *..S * * S... 5* * * S
S S
r1 < rb < r2 In order to meet the above interface resistance conditions for spin injection into the source and for spin extraction out of the drain, the thickness of the tunnel barrier layer for the source assembly and the drain assembly may be made the same, or may be different.
The injection of spin polarised carriers through a tunnelling barrier layer into a substrate are described by S.P. Dash, et al, Electrical creation of spin polarization in silicon at room temperate', Nature 462, pages 491 to 494 (2009). The detection of spin polarised electrons in the base layer or substrate at the source assembly may be achieved by the local (same electrode) or non-local (different electrodes) Hanle effect measurements.
Reference is made to A. Fert, et al., Semiconductor between spin-polarized source and drain', IEEE Trans. Electron Devices 54 (2007), for a discussion of the requirements for the aforementioned resistances in the injection and detection of spin polarised carriers.
As noted above, spin polarised electrons are injected into the base layer or substrate at the source assembly, precess through the base layer and are detected and/or produced from the base layer at the drain assembly. Preferably, the distance between the source assembly and the drain assembly is the same as or less than the spin diffusion length of the spin polarised carriers in the semiconductor materials. In this way, the condition that r, is significantly less than r2 mentioned above is better satisfied, as the dwell time of the polarised carrier in the base layer is less than the spin lifetime. The spin diffusion length of a carrier in a semiconductor depends upon the operating conditions, composition of the material and the type and degree of dopant. For example, for heavily doped silicon at a temperature of 300K, the spin I....
* S diffusion length of electrons is about 230 nm, while the spin diffusion length for holes 30 is about 310 nm (S.P. Dash, et al., Electrical creation of spin polarization in silicon at S...
room temperate', Nature 462, pages 491 to 494 (2009)). *S. * S * *. * S *
S
The spin field effect transistor of the present invention and the method of controlling find use in such applications as spin current gating or in spin current amplification.
Further, the present invention provides a spin current amplifier comprising a spin field effect transistor as hereinbefore described.
An embodiment of the present invention will now be described, by way of example only, having reference to the accompanying drawing, in which: Figure 1 is a diagrammatical cross-sectional view of a transistor of the present invention.
Turning to Figure 1, there is shown a spin field effect transistor, generally indicated as 2. The transistor 2 comprises a base layer or substrate 4. The base layer 4 is formed from an n-type or p-type silicon semiconductor material.
Alternatively, the base layer may be formed from another semiconductor material, for example graphene. As shown in Figure 1, the base layer consists of a single layer of material. However, the base layer 4 may be comprises of two or more layers of semiconductor materials.
A source assembly 10 and a drain assembly 20 are mounted on the base layer 4 in the spaced apart locations shown in Figure 1. A region of the base layer 4 extending between the source assembly 10 and the drain assembly 20 can be identified as a channel 6, along which spin polarised carriers will diffuse, when the *..* transistor is operating.
S
* S5555 * S The source assembly 10 comprises a tunnelling barrier layer 12 of *.S.
magnesium oxide (MgO) in contact with the surface of the base layer 4. A layer of fixed or pinned ferromagnetic (FM) material 14 is disposed on the tunnelling barrier * * ** layer 12 and thus separated from the base layer 4. The magnetic moment in the :: layer of FM material 14 is fixed in orientation, as indicated by the arrow A in Figure 1.
Similarly, the drain assembly 20 comprises a tunnelling barrier layer 22 of magnesium oxide (MgO) in contact with the surface of the base layer 4. A layer of fixed or pinned ferromagnetic (FM) material 24 is disposed on the tunnelling barrier layer 22 and thus separated from the base layer 4. The magnetic moment in the layer of FM material 24 is fixed in orientation, as indicated by the arrow B in Figure 1, so as to be parallel to the direction of the magnetic moment in the FM layer 14 of the source assembly.
The FM material employed in the FM layers 14, 24 of both the source and drain assemblies 10, 20 is preferably cobaltliron/boron (C0FeB), cobalt/iron (CoFe), or cobalt/iron/silicon/aluminium (Co2FeSiAI). The tunnelling barrier layers 12, 22 are preferably formed from magnesium oxide (MgO). If the magnetic moment of the FM layer 14, 24 of the source and drain assemblies 10, 20 is pinned, this is achieved by an overlayer of AFM material, preferably comprising iridium/manganese (lrMn), platinum/manganese (PtMn) or nickel/iron/manganese (NiFeMn).
A gate assembly 30 is disposed on the base layer 4 between the source assembly 10 and the drain assembly 20, so as to overlie the channel 6 in the base layer. The gate assembly 30 comprises a tunnelling barrier layer 32 of magnesium oxide (MgO) in contact with the surface of the base layer 4, which serves to separate the base layer from the remaining components of the gate assembly. The gate assembly 30 further comprises a writable magnetic tunnelling junction (MTJ), generally indicated as 34, disposed on the tunnelling barrier layer 32. The MTJ 34 comprises a lower layer of FM material 36. The magnetic moment of the FM layer 36, indicted by the arrow C is variable, in particular being oriented to be parallel or antiparallel to the magnetic moments in the pinned FM layers 14, 24 of the source *S** assembly 10 and the drain assembly 20. The MTJ 34 further comprises a tunnelling barrier layer 38 of magnesium oxide (MgO) disposed on the FM layer 36. An upper layer of FM material 40 is disposed on the tunnelling barrier layer 38. The orientation S...
: of the magnetic field in the lower FM layer 36 may be varied and controlled by spin transfer torque switching (STTS) using the upper FM layer 40. In particular, the * magnetic moment in the lower FM layer 36 may be oriented between being parallel S. ** S. S. * S S * S and anti-parallel to the magnetic moments in the FM layers 14, 24 of the source assembly 10 and the drain assembly 20.
The FM layer 40 comprises a FM material as indicated above for the source and drain assemblies 10, 20.
In operation, spin polarised carriers, in particular electrons or holes, are injected into the base layer at the source assembly using a current or voltage source.
The orientation of the magnetic moment in the lower FM layer 36 of the gate assembly 30 is varied and controlled by spin transfer torque switching from the upper FM layer 40. An electrical current is applied through the upper FM layer 40 into the tower FM layer 36, causing the tunnelling of spin oriented carriers from the upper FM layer into the lower FM layer, in turn controlling the orientation of the magnetic moment in the lower FM layer, depending upon the polarity/direction of the applied current.
As the magnetic moment in the lower FM layer 36 is brought parallel with the magnetic moments A and B in the FM layers 14, 24 of the source assembly 10 and the drain assembly 20, precession of the injected spin polarised carriers in the channel 6 in the base layer 4 is enhanced in the direction of the drain assembly 20.
Similarly, as the magnetic moment in the lower FM layer 36 is brought anti-parallel with the magnetic moments A and B in the FM layers 14, 24 of the source assembly and the drain assembly 20, precession of the injected spin potarised carriers in the channel 6 in the base layer 4 is suppressed in the direction of the drain assembly 20. In this way, the transistor 2 may be controlled, with the amplification of the current of spin polarised carriers in the channel 6 in the base layer 4 being switched *S..
**,, on and off. * . *..* **** *** * * * S... *. S. * S * * .

Claims (25)

  1. CLAIMS1. A spin field effect transistor comprising:a base layer; a source assembly arranged on and in electrical contact with the base layer, the source assembly having a layer of ferromagnetic material having a first magnetic moment; a drain assembly arranged on and in electrical contact with the base layer, the drain assembly having a layer of ferromagnetic material having a second magnetic moment, the drain assembly being displaced on the base layer from the source assembly; and a gate assembly disposed on the base layer between the source assembly and the drain assembly, the gate assembly comprising a layer of ferromagnetic material having a third magnetic moment; wherein the gate assembly further comprises means for varying the orientation of the third magnetic moment such that it may be brought into and out alignment with both the first and second magnetic moments.
  2. 2. The spin field effect transistor according to claim 1, wherein the orientation of one of the first and second magnetic moments is fixed.
  3. 3. The spin field effect transistor according to claim 2, wherein the orientation of both of the first and second magnetic moments are fixed.
  4. 4. The spin field effect transistor according to either of claims 2 or 3, wherein the orientation of the magnetic moment is fixed by uniaxial anisotropy energy. * * ***.
  5. 5. The spin field effect transistor according to either of claims 2 or 3, wherein the orientation of the magnetic moment is pinned, the source and/or drain assembly 0*s* *..: comprising a layer of antiferromagnetic material (AFM) disposed over the layer of ferromagnetic material. **** * * S... * * *
  6. 6. The spin field effect transistor according to claim 5, wherein the AFM layer comprises one or more transition metals, their alloys or oxides, including combinations of iridium/manganese (lrMn), platinum/manganese (PtMn), nickel/iron/manganese (NiFeMn), iron/manganese (FeMn), cobalt oxide (CoO) or nickel oxide (NiO).
  7. 7. The spin field effect transistor according to any preceding claim, wherein the base layer comprises an elementary semiconductor in group Ill or IV of the Periodic Table, or a compound semiconductor of groups Ill-V and groups Il-VI, or oxide semiconductors.
  8. 8. The spin field effect transistor according to any preceding claim, wherein the base layer comprises a intrinsic semiconductor or an extrinsic semiconductor.
  9. 9. The spin field effect transistor according to any preceding claim, wherein the base layer comprises a semiconductor material selected from gallium arsenides (GaAs), gallium antimonys (GaSb), indium arsenides (InAs), indium antimonys (lnSb), aluminium aresenides (AlAs), aluminium antimonys (AISb), indium phosphides (lnP), zinc selenide (ZnSe), silicon, germanium, aluminium gallium arsenides (AIGaA5), and indium gallium arsenides (lnGaAs), or grapheme.
  10. 10. The spin field effect transistor according to any preceding claim, wherein the layer of ferromagnetic material of the source and/or drain assembly comprises one or more of cobalt, iron, nickel, gadolinium and dysprosium, oxides of iron, nickel/iron, copper/iron, magnesium/iron, manganese/iron, yttrium/iron, chromium and europium, transition metal-metalloid alloys comprising 80% of a transition metal, including iron, cobalt or nickel, and a metalloid, including boron, carbon, silicon, phosphorous or * aluminium; combinations of manganese/bismuth, manganese/antimony, nickel/manganese/antimony and manganese/arsenic; alloys of cobalt, iron, nickel, niobium (Nb), boron (B) and zirconium (Zr), including cobalt/iron (CoFe), nickel/iron **** *..: (NiFe), cobalt/iron/niobium (CoFeNb), cobalt/zirconium (CoZr), cobalt/iron/zirconium (CoFeZr), cobalt/iron/boron (C0FeB), and nickel/iron/boron (NiFeB); Heulsler alloys or half-metallic ferromagnetic materials; including combinations of cobalt/iron/silicon S..' : : : (Co2FeSi), cobalt/iron/silicon/aluminium (Co2FeSiAl), iron/silicon (Fe3Si), iron/vanadium/aluminium (Fe2VAI), cobalt/iron/germanium (Co2FeGe), cobalt/iron/chromium/aluminium (Co2FeCrAI), nickel/manganese/aluminium (Ni2MnAI), nickel/manganese/indium (Ni2Mnl n), nickel/manganese/tin (Ni2MnSn), nickel/manganese/antimony (Ni2MnSb), nickel/manganese/gallium (Ni2MnGa), cobalt/manganese/aluminium (Co2MnAl), cobalt/manganese/silicon (Co2MnSi), cobalt/manganese/gallium (Co2MnGa), cobalt/manganeselgermanium (Co2MnGe), copper/manganese/aluminium (Cu2MnAI), and palladium/manganese/aluminium (Pd2MnAl).
  11. Ii. The spin field effect transistor according to any preceding claim, wherein one of the source assembly and drain assembly comprises a layer of tunnelling barrier material disposed between the layer of ferromagnetic material and the base layer.
  12. 12. The spin field effect transistor according to claim 11, wherein both of the source assembly and drain assembly comprises a layer of tunnelling barrier material disposed between the layer of ferromagnetic material and the base layer.
  13. 13. The spin field effect transistor according to either of claims 11 or 12, wherein the tunnelling barrier material comprises magnesium oxide (Mg-O, or MgO), aluminium oxide (Al-a, orAl2O3), hafnium oxide (Hf-a, or Hf02), zinc/selenium (ZnSe), strontium/titanium oxide (Sr-Ti-O, or SrTiO3) or a mixture thereof.
  14. 14. The spin field effect transistor according to any preceding claim, wherein the layer of ferromagnetic material of the gate assembly comprises one or more of cobalt, iron, nickel, gadolinium and dysprosium, oxides of iron, nickel/iron, copper/iron, magnesium/iron, manganese/iron, yttrium/iron, chromium and europium, transition metal-metalloid alloys comprising 80% of a transition metal, including iron, **** cobalt or nickel, and a metalloid, including boron, carbon, silicon, phosphorous or aluminium; combinations of manganese/bismuth, manganese/antimony, nickel/manganese/antimony and manganese/arsenic; alloys of cobalt, iron, nickel, *.*.: niobium (Nb), boron (B) and zirconium (Zr), including cobalt/iron (CoFe), nickel/iron * (NiFe), cobalt/iron/niobium (CoFeNb), cobalt/zirconium (CoZr), cobalt/iron/zirconium (CoFeZr), cobalt/iron/boron (CoFeB), and nickel/iron/boron (NIFeB); Heulsler alloys or half-metallic ferromagnetic materials; including combinations of cobalt/iron/silicon (Co2FeSi), cobalt/iron/silicon/aluminium (Co2FeSiAI), iron/silicon (Fe3Si), iron/vanadium/aluminium (Fe2VAI), cobalt/iron/germanium (Co2FeGe), cobalt/iron/chromium/aluminium (Co2FeCrAI), nickel/manganese/aluminium (Ni2MnAI), nickel/manganeselindium (Ni2Mnln), nickel/manganese/tin (Ni2MnSn), nickel/manganese/antimony (Ni2MnSb), nickel/manganese/gallium (Ni2MnGa), cobalt/manganese/aluminium (C02MnAI), cobalt/manganese/silicon (Co2MnSi), cobalt/manganese/gallium (Co2MnGa), cobalt/manganese/germanium (Co2MnGe), copper/manganese/aluminium (Cu2MnAI), and palladium/manganese/aluminium (Pd2MnAI).
  15. 15. The spin field effect transistor according to any preceding claim, wherein the orientation of the third magnetic moment may be controlled by spin transfer torque switching.
  16. 16. The spin field effect transistor according to claim 15, wherein the gate assembly comprises a first and a second layer of ferromagnetic material, the first layer having the third magnetic moment and the second layer disposed over the first layer.
  17. 17. The spin field effect transistor according to claim 16, wherein a layer of tunnelling barrier material is disposed between the first and second layers of ferromagnetic material.
  18. 18. A method of controlling a spin field effect transistor, the transistor comprising a source assembly, a drain assembly and a gate assembly in contact with a base layer, the method comprising varying the magnetic moment of a layer of ferromagnetic material in the gate assembly relative to the magnetic moment of a layer of ferromagnetic material in each of the source and drain assemblies.
    * 30
  19. 19. The method according to claim 18, wherein the magnetic moment in one of : the source and drain assemblies is fixed. *
  20. 20. The method according to claim 19, wherein the magnetic moment in both of *.S' the source and drain assemblies is fixed. ** ** * * * * S
  21. 21. The method according to any of claims 18 to 20, wherein the magnetic moment of the gate assembly is varied by spin transfer torque switching.
  22. 22. A spin field effect transistor substantially as hereinbefore described, having reference to Figure 1.
  23. 23. A method of controlling a spin field effect transistor substantially as hereinbefore described having reference to Figure 1.
  24. 24. A spin current amplifier comprising a spin field effect transistor according to any of claims I to 17 or 22.
  25. 25. The use of a spin field effect transistor as claimed in any of claims ito 17 and 22 or the method as claimed in any of claims 18 to 21 and 23 in spin current gating or in spin current amplification. S... * ** ....* * . a,,. * a... a a . a * * a * a. as a. * 5
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WO2013103606A1 (en) * 2012-01-05 2013-07-11 Quantum Devices, Llc Coherent spin field effect transistor
US11430889B2 (en) * 2018-07-30 2022-08-30 Korea University Research And Business Foundation Junctionless field-effect transistor having metal-interlayer-semiconductor structure and manufacturing method thereof

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Publication number Priority date Publication date Assignee Title
JP6806200B1 (en) * 2019-08-08 2021-01-06 Tdk株式会社 Magnetoresistive element and Whistler alloy

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US20050117391A1 (en) * 2003-03-11 2005-06-02 Hiroaki Yoda Magnetic random access memory
WO2005104240A1 (en) * 2004-04-27 2005-11-03 Agency For Science, Technology And Research Magneto-electric field effect transistor for spintronic applications
JP2007165786A (en) * 2005-12-16 2007-06-28 Toshiba Corp Field-effect transistor, integrated circuit, and memory
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WO2005104240A1 (en) * 2004-04-27 2005-11-03 Agency For Science, Technology And Research Magneto-electric field effect transistor for spintronic applications
JP2007165786A (en) * 2005-12-16 2007-06-28 Toshiba Corp Field-effect transistor, integrated circuit, and memory
US20100072528A1 (en) * 2008-09-24 2010-03-25 Tomoaki Inokuchi Spin transistor, integrated circuit, and magnetic memory

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Publication number Priority date Publication date Assignee Title
WO2013103606A1 (en) * 2012-01-05 2013-07-11 Quantum Devices, Llc Coherent spin field effect transistor
US11430889B2 (en) * 2018-07-30 2022-08-30 Korea University Research And Business Foundation Junctionless field-effect transistor having metal-interlayer-semiconductor structure and manufacturing method thereof

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