GB2461916A

GB2461916A - Balancing common mode voltage in a current driven passive matrix display

Info

Publication number: GB2461916A
Application number: GB0813160A
Authority: GB
Inventors: Stefan Wurster; Barry Thompson
Original assignee: Cambridge Display Technology Ltd
Current assignee: Cambridge Display Technology Ltd
Priority date: 2008-07-18
Filing date: 2008-07-18
Publication date: 2010-01-20
Anticipated expiration: 2028-07-18
Also published as: TWI476747B; WO2010007366A1; GB2461916B; TW201013618A; GB2461916A9; GB0813160D0

Abstract

To balance a common mode voltage in a passive matrix driven emissive display, such as an OLED display, a first set of column electrodes (310) and row electrodes 306 are driven respectively with a first set of column drive signals and row drive signals. The common mode voltage is monitored across each of the first set of column and row electrodes and compared to a threshold value. The monitored common mode voltages are then summed, excluding those voltages which deviate from the threshold value by a specified amount. The specified deviation is preferably below the threshold value. The summed common mode voltage is compared to a reference voltage 606 and a single bit signal may be generated to indicate whether the summed common mode voltage is higher or lower than the reference voltage 606. Finally, the first set of column or row drive signals are adjusted so that the summed common mode voltage approaches the reference voltage 606.

Description

BALANCING COMMON MODE VOLTAGE IN A CURRENT

DRIVEN DISPLAY

The present invention relates, in general, to a method and apparatus for balancing a common mode voltage in a current driven display. Particularly, the invention provides a feedback method to automatically correct for errors in sensing the common mode voltage in current driven displays such as a passive matrix driven organic electroluminescent display.

Organic light emitting diodes (OLEDs) comprise a particularly advantageous form of electro-optic display. They are bright, colourful, fast switching, provide a wide viewing angle and are easy and cheap to fabricate on a variety of substrates.

Organic (which here includes organometallic) LED5 may be fabricated using either polymers or small molecules in a range of colours, depending upon the materials used. Examples of polymer-based organic LEDs are described in WO 90/1 31 48, WO 95/06400 and WO 99/481 60; examples of small molecule based devices are described in US 4,539,507 and examples of dendrimer-based materials are described in WO 99/21935 and WO 02/067343.

A basic structure 1 00 of a typical organic LED is shown in Figure 1 a. A glass or plastic substrate 102 supports a transparent anode layer 104 comprising, for example, indium tin oxide (ITO) on which is deposited a hole transport layer 106, an electroluminescent layer 108 and a cathode 110. The electroluminescent layer 108, may comprise, for example, PEDOT: PSS (polystyrene-sulphorate -doped polyethylene -dioxythiophene). Cathode layer 11 0 typically comprises a low work function metal such as calcium and may include an additional layer immediately adjacent electroluminescent layer 108, such as a layer of aluminium, for improved electron energy level matching.

Contact wires 114 and 116 to the anode and the cathode respectively provide a connection to a power source 118. The same basic structure may also be employed for small molecule devices.

In the example shown in Figure la light 120 is emitted through transparent anode 104 and substrate 102 and such devices are referred to as "bottom emitters". Devices which emit through the cathode may also be constructed, for example, by keeping the thickness of cathode layer 11 0 less than around 50- 100mm so that the cathode is substantially transparent.

Organic LEDs may be deposited on a substrate in a matrix of pixels to form a single or multi-colour pixellated display. A multi-coloured display may be constructed using groups of red, green and blue emitting pixels. In such displays the individual elements are generally addressed by activating row (or column) lines to select the pixels, and rows (or columns) of pixels are written to, to create a display. So-called active matrix displays have a memory element, typically a storage capacitor and a transistor, associated with each pixel whilst passive matrix displays have no such memory element and instead are repetitively scanned, somewhat similarly to a TV picture, to give the impression of a steady image.

Figure lb shows a cross-section through a passive matrix OLED display 150 in which like elements to those of Figure la are indicated by like reference numerals. In the passive matrix display 150 the electroluminescent layer 108 comprises a plurality of pixels 152 and the cathode layer 110 comprises a plurality of mutually electrically insulated conductive lines 154, running into the page in Figure ib, each with an associated contact 156. Likewise the ITO anode layer 104 also comprises a plurality of anode lines 158, of which only one is shown in Figure ib, running at right angles to the cathode lines. Contacts (not shown in Figure 1 b) are also provided for each anode line. An electroluminescent pixel 1 52 at the intersection of a cathode line and anode line may be addressed by applying a voltage between the relevant anode and cathode lines.

Referring now to Figure 2a, this shows, conceptually, a driving arrangement for a passive matrix OLED display 150 of the type shown in Figure lb. A plurality of constant current generators 200 are provided, each connected to a supply line 202 and to one of a plurality of column lines 204, of which for clarity only one is shown. A plurality of row lines 206 (of which only one is shown) is also provided and each of these may be selectively connected to a ground line 208 by a switched connection 210. As shown, with a positive supply voltage on line 202, column lines 204 comprise anode connections 158 and row lines 206 comprise cathode connections 154, although the connections would be reversed if the power supply line 202 was negative with respect to ground line 208.

As illustrated pixel 212 of the display has power applied to it and is therefore illuminated. To create an image connection 210 for a row is maintained as each of the column lines is activated in turn until the complete row has been addressed, and then the next row is selected and the process repeated.

Alternatively a row may be selected and all the columns written in parallel, that is a row selected and a current driven into each of the column lines simultaneously, to simultaneously illuminate each pixel in a row at its desired brightness. Although the latter arrangement requires more column drive circuitry it is preferred because it allows a more rapid refresh of each pixel. In a further alternative arrangement each pixel in a column may be addressed in turn before the next column is addressed, although this is generally not preferred because of the effect, inter alia, of column capacitance as discussed below. It will be appreciated that in the arrangement of Figure 2a the functions of the column driver circuitry and row driver circuitry may be exchanged.

It is usual to provide a current-controlled rather than a voltage-controlled drive to an OLED because the brightness of an OLED is determined by the current flowing through it, thus determining the number of photons it outputs. In a voltage-controlled configuration the brightness can vary across the area of a display and with time, temperature, and age, making it difficult to predict how bright a pixel will appear when driven by a given voltage. In a colour display the accuracy of colour representations may also be affected.

Figures 2b to 2d illustrate, respectively the current drive 220 applied to a pixel, the voltage 222 across the pixel and the light output 224 from the pixel over time 226 as the pixel is addressed. The row containing the pixel is addressed and at the time indicated by dashed line 228 the current is driven onto the column line for the pixel. The column line (and pixel) has an associated capacitance and thus the voltage gradually rises to a maximum 230. The pixel does not begin to emit light until a point 232 is reached where the voltage across the pixel is greater than the OLED diode voltage drop. Similarly when the drive current is turned off at time 234 the voltage and light output gradually decay as the column capacitance discharges. Where the pixels in a row are all written simultaneously, that is where the columns are driven in parallel, the time interval between times 228 and 234 corresponds to a line scan period. Figure 3 shows a schematic diagram 300 of a generic driver circuit for a passive matrix OLED display. The OLED display is indicated by dashed line 302 and comprises a plurality n of row lines 304 each with a corresponding row electrode contact 308 and a plurality n of column lines 308 with a corresponding plurality of column electrode contacts 310. An OLED is connected between each pair of row and column lines with, in the illustrated arrangement, its anode connected to the column line. A y-driver 314 drives the column lines 308 with a constant current and an x-driver 316 drives the row lines 304, selectively connecting the row lines to ground. The y-driver 314 and x-driver 316 are typically both under the control of a processor 318. A power supp'y 320 provides power to the circuitry and, in particular, to y-driver 314.

Figure 4 shows schematically the main features of a current driver 402 for one column line of a passive matrix OLED display, such as the display 302 of Figure 3. Typically a plurality of such current drivers are provided in a column driver integrated circuit, such as y-driver 314 of Figure 3, for driving a plurality of passive matrix display column electrodes.

The current driver 402 of Figure 4 outlines the main features of this circuit and comprises a current driver block 406 incorporating a bipolar transistor 416 which has an emitter terminal substantially directly connected to a power supply line 404 at supply voltage Vs. (This does not necessarily require that the emitter terminal should be connected to a power supply line or terminal for the driver by the most direct route but rather that there should preferably be no intervening components, apart from the intrinsic resistance of tracks or connections within the driver circuitry between the emitter and a power supply rail). A column drive output 408 provides a current drive to OLED 412, which also has a ground connection 414, normally via a row driver MOS switch (not shown in Figure 4).

A current control input 410 is provided to current driver block 406 and, for the purpose of illustration, this is shown connected to the base of transistor 416 although in practice a current mirror arrangement is preferred. The signal on current control line 410 may comprise either a voltage or a current signal.

Where the current driver block 406 provides a variable controllable current source each current driver block may be interfaced with and controlled by an analogue output from a digital to analogue converter. Such a controllable current source can provide a variable brightness or grayscale display. Other methods of varying pixel brightness include varying pixel on time using Pulse Width Modulation (PWM). In a PWM scheme a pixel is either fully on or completely off but the apparent brightness of a pixel varies because of time integration within the observer's eye.

There is a continuing need for driver schemes which can improve the lifetime of an OLED display. There is a particular need for techniques which are applicable to passive matrix displays since these are very much cheaper to fabricate than active matrix displays. Reducing the drive level (and hence brightness) of an OLED can significantly enhance the lifetime of the device -for example halving the drive/brightness of the OLED can increase its lifetime by approximately a factor of four. In WO 2006 035246, WO 2006 035247 and WO 2006 035248, the contents of which are herein incorporated by reference, the applicant has recognised that one solution lies in multi-line addressing techniques employed to reduce peak display drive levels, in particular in passive matrix OLED displays, and hence increase display lifetime. Broadly speaking, these methods comprise driving a plurality of column electrodes of the OLED display with a first set of column drive signals at the same time as driving two or more row electrodes of the display with a first set of row drive signals; then the column electrodes are driven with a second set of column drive signals at the same time as the two or more row electrodes are driven with a second set of row drive signals. Preferably the row and column drive signals comprise current drive signals from a substantially constant current generator such as a current source or current sink. Preferably such a current generator is controllable or programmable, for example, using a digital-to-analogue converter.

The effect of driving a column at the same time as two or more rows is to divide the column drive between two or more rows in a proportion determined by the row drive signals -in other words for a current drive the current in a column is divided between the two or more rows in proportions determined by the relative values or proportions of the row drive signals. Broadly speaking this allows the luminescence profile of a row or line of pixels to be built up over multiple line scan period, thus effectively reducing the peak brightness of an OLED pixel thus increasing the lifetime of pixels of the display. With a current drive a desired luminescence of a pixel is obtained by means of a substantially linear sum of successive drive signals to the pixel.

The present invention is therefore concerned with improving the efficiency of, in particular, a passive matrix OLED display. Advantageously, the present invention is also compatible with multi-line addressing techniques.

Current generating circuits as discussed above in their simplest form comprise a current source and current sink. For example, as illustrated in Figure 3, the column Y driver 314 can be considered as a current source and the row X driver 316 can be considered as a current sink although, as will be appreciated by a person skilled in the art, the functions can be revered.

Whether a current sink or source current source are matched depends upon a number of factors including transistor characteristics and operating parameters such as voltage levels. In operation, mismatched drivers are the cause of streaking in a display, for example, where individual columns are driven harder than neighbouring columns. Over time mismatched drivers can drift towards a matched condition normally at a maximum voltage level. Such a matched condition can waste power if such a maximum voltage level is not required and can also be detrimental to the lifetime of an OLED display.

According to a first aspect of the present invention, there is provided a method of balancing a common mode voltage in a passive matrix driven emissive display, the method including driving a first set of column electrodes with a first set of column drive signals and driving a first set of row electrodes with a first set of row drive signals; monitoring a common mode voltage across each of the first set of column or row electrodes and comparing the monitored common mode voltage to a threshold value; summing the monitored common mode voltages whilst excluding from the summing those row or column electrodes a specified deviation from the threshold value; comparing the summed common mode voltage to a reference voltage; and adjusting the first set of column or row drive signals so that the summed common mode voltage approaches the second reference voltage.

Preferably, excluding comprises disabling an enable input of a row or column driver to which the excluded row or column electrode is connected.

Preferably, the specified deviation is below the threshold value.

Preferably, summing includes determining an average voltage across the summed electrodes.

Preferably, comparing the summed common mode voltage to a reference voltage includes generating a signal to indicate whether the summed common mode voltage is higher or lower than the reference voltage. Very preferably, the generated signal is a single bit.

Preferably, a row or column drive signal is controlled by a drive processor in accordance with a reference control current and adjusting includes communicating a signal to the drive processor and adjusting the reference control current.

Preferably, the method includes driving the column electrodes of the display with the first set of column drive signals at the same time as driving two or more row electrodes of the display with the first set of row drive signals; then driving the column electrodes with the second set of column drive signals at the same time as two or more row electrodes are driven with a second set of row drive signals.

Preferably, the first and second column drive signals and the first and second row drive signals are selected such that a desired luminescence of pixels in the display driven by the row and column electrodes is obtained by a substantially linear sum of luminances determined by the first row and column drive signals and luminances determined by the second row and column drive signals.

Preferably, the emissive display comprises pixels comprised of an organic electroluminescent material.

Embodiments of the invention will now be described, by way of example only, and with reference to the accompanying drawings in which: Figures la and lb show cross sections through, respectively, an organic light emitting diode and a passive matrix OLED display; Figures 2a to 2d show, respectively, a conceptual driver arrangement for a passive matrix OLED display, a graph of current drive against time for a display pixel, a graph of pixel voltage against time, and a graph of pixel light output against time; Figure 3 shows a schematic diagram of a generic driver circuit for a passive

matrix OLED display according to the prior art;

Figure 4 shows a block diagram of a passive matrix OLED display driver; Figure 5 is a schematic diagram of passive matrix driven OLED display according to a first embodiment of the present invention; Figure 6 is a schematic diagram of a row driver according to a second embodiment of the present invention; and Figure 7 is a schematic diagram of a row driver according to a third embodiment 1 0 of the present invention.

In figure 5 a passive matrix OLED display similar to that described with reference to figure 3 has row electrodes 306 driven by row driver circuits 512 and column electrodes 310 driven by column drives 510. Further details of the row driver circuits 512 according to the present invention are shown in figure 6.

Column drivers 510 have a column data input 509 for setting the current drive to one or more of the column electrodes; similarly row drivers 512 have a row data input 511 for setting the current drive ratio to two or more of the rows.

Preferably inputs 509 and 511 are digital inputs for ease of interfacing; preferably column data input 509 sets the current drives for all the m columns of display 302.

Data for display is provided on a data and control bus 502, which may be either serial or parallel. Bus 502 provides an input to a frame store memory 503 which stores luminance data for each pixel of the display or, in a colour display, luminance information for each sub-pixel (which may be encoded as separate ROB colour signals or as luminance and chrominance signals or in some other way). The data stored in frame memory 503 determines a desired apparent brightness for each pixel (or sub-pixel) for the display, and this information may be read out by means of a second, read bus 505 by a display drive processor 506 (in embodiments bus 505 may be omitted and bus 502 used instead).

Display drive processor 506 may be implemented entirely in hardware, or in software using, say, a digital signal processing core, or in a combination of the two, for example, employing dedicated hardware to accelerate matrix operations. Generally, however, display drive processor 506 will be at least partially implemented by means of stored program code or micro code stored in a program memory 507, operating under control of a clock 508 and in conjunction with working memory 504. Code in program memory 507 may be provided on a data carrier or removable storage 507a.

The code in program memory 507 is configured to implement one or more of multi-line addressing methods using conventional programming techniques. In some embodiments these methods may be implemented using a standard digital signal processor and code running in any conventional programming language. In such an instance a conventional library of DSP routines may be employed, for example, to implement singular value decomposition, or dedicated code may be written for this purpose, or other embodiments not employing SVD may be implemented such as the techniques described above with respect to driving colour displays.

Referring to Figure 6, a schematic diagram of a row driver 600 according to an embodiment of the present invention comprises each of the plurality of row electrodes 306 connectable to row data input 511. Each of the plurality of row electrodes 306 is further connected to a high value resistor 602, where the number of high value resistors 602 is provided to match the number of row electrodes 306. Each high value resistor 602 and correspondingly each row electrode 306 are also connected to a common node 604 which is connected to a reference voltage generator 606 through reference resistor 608.

A comparator 610 is connected across the reference resistor 608 having a positive input terminal connected between the reference resistor 608 and the common node 604 and a negative input terminal connected between the reference resistor 608 and the reference voltage generator 606. An output terminal of the comparator 610 is connected to a digital controller 612 which comprises a correction logic module 614, a correction look-up table 616, a correction interpolator 618 and a post-processing module 620.

In operation, an average row voltage of the driven row electrodes 306 is provided at the common node 604. If the average row voltage of the driven row electrodes 306 is above a reference voltage generated by the reference voltage generator 606 then a current flows into the common node 604 and out to the reference voltage generator 606. If the average row voltage of the driven row electrodes 306 is below a reference voltage generated by the reference voltage generator 606 a current flows out from reference voltage generator 606 towards the common node 604.

The current flow is detected by the comparator 610 which is operable to output a single bit to indicate whether the average row voltage of the driven row electrodes is higher or lower than the reference voltage. The single bit is communicated to the digital controller 612 and used to adjust a row reference current for subsequent frames. On receiving the single bit signal the digital controller 612 employs correction logic through a correction logic module 614 to adjust the row reference current ref A correction lookup table 616 provides determined values for adjustment of ref which is subsequently stepped up or down depending upon the requirements.

In some circumstances an alternative arrangement is preferred to that described in relation to the second embodiment of the present invention. For example, all the row electrodes can be programmed to a certain current, but particular columns can be temporarily switched off or blanked. In such blanking periods, the individual rows that no longer have a "pull-up" columns current available will normally collapse to ground. When this occurs, the summed voltage is the average row voltage of the driven row electrodes including those row electrodes which have collapsed to ground. Consequently, an error is introduced into the summing point of the common mode voltage comparator.

In order to prevent such an error occurring, with reference to Figure 7, a third embodiment 700 of the present invention provides a comparator 702 on each of the row electrodes 306. In operation, the comparator 702 monitors the row common mode voltage on each of the row electrodes 306 to determine if it decays below a certain reference voltage. If a comparator 702 trips on observance of a common mode voltage below the reference voltage then a row-enabling switch 704 can disable the row electrode current from being included in the summed voltage.

The function of enabling and disabling of the row electrode current from being included in the summed voltage is automatic and does not require the intervention of a common mode control circuitry that controls and regulates the overall common mode voltage via the column electrode DACs. This avoids a need for an individual control of all N individual row electrodes and so reduces the overhead for the row electrode control.

No doubt many other effective alternatives will occur to the skilled person. It will be understood that the invention is not limited to the described embodiments and encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.

Claims

CLAIMS1. A method of balancing a common mode voltage in a passive matrix driven emissive display, the method including driving a first set of column electrodes with a first set of column drive signals and driving a first set of row electrodes with a first set of row drive signals; monitoring a common mode voltage across each of the first set of column or row electrodes and comparing the monitored common mode voltage to a threshold value; summing the monitored common mode voltages whilst excluding from the summing those row or column electrodes a specified deviation from the threshold value; comparing the summed common mode voltage to a reference voltage; and adjusting the first set of column or row drive signals so that the summed common mode voltage approaches the second reference voltage.
2. A method as claimed in claim 1, wherein excluding comprises disabling an enable input of a row or column driver to which the excluded row or column electrode is connected.
3. A method as claimed in claim 1 or 2, wherein the specified deviation is below the threshold value.
4. A method as claimed in any preceding claim, wherein summing includes determining an average voltage across the summed electrodes.
5. A method as claimed in any preceding claim, wherein comparing the summed common mode voltage to a reference voltage includes generating a signal to indicate whether the summed common mode voltage is higher or lower than the reference voltage.
6. A method as claimed in claim 5, wherein the generated signal is a single bit.
7. A method as claimed in any preceding claim, wherein a row or column drive signal is controlled by a drive processor in accordance with a reference control current and adjusting includes communicating a signal to the drive processor and adjusting the reference control current.
8. A method as claimed in any preceding claim including driving the column electrodes of the display with the first set of column drive signals at the same time as driving two or more row electrodes of the display with the first set of row drive signals; then driving the column electrodes with the second set of column drive signals at the same time as two or more row electrodes are driven with a second set of row drive signals.
9. A method as claimed in claim 6, wherein the first and second column drive signals and the first and second row drive signals are selected such that a desired luminescence of pixels in the display driven by the row and column etectrodes is obtained by a substantially linear sum of luminances determined by the first row and column drive signals and luminances determined by the second row and column drive signals.
10. A method as claimed in any preceding claim, wherein the emissive display comprises pixels comprised of an organic electroluminescent material.