GB2455772A

GB2455772A - Early reporting of commands to a peripheral device

Info

Publication number: GB2455772A
Application number: GB0724940A
Authority: GB
Inventors: Steven Rawlings
Original assignee: Symbian Software Ltd
Current assignee: Symbian Software Ltd
Priority date: 2007-12-20
Filing date: 2007-12-20
Publication date: 2009-06-24
Also published as: GB2455874A; WO2009081101A8; WO2009081101A1; GB0724940D0; GB0823042D0

Abstract

A host device communicates with a peripheral device, such as a mass storage device, over an interface, such as the universal serial bus (USB). The host sends a first command, such as a write command 3,2, to the device. Prior to the completion of the command 3,28, the device sends a report 3, 14, which acknowledges successful completion of the command, back to the host. The host sends a second command 3,20 to the device while the first command is completing. The report for the first command may be sent when the time left to complete the first command is the same as the time required to send the second command and any associated data to the device. The data may be split into two parts and the acknowledgement sent after the first part has been written. Alternatively, a timer may be used to indicate when to send the report.

Description

Method and System for Improved Peripheral Device Access

Technical Field

The present invention relates to a method and system for improving the access to a peripheral device in a computer system, and in particular, to improving, for example, access to a mass storage device.

Background to the Present Invention and Prior Art

It is well known in the art that removable peripheral devices can be connected to a host computer system. in recent years, it has become much more common for removable and portable mass storage devices to be connected to a computer system. Such storage devices may, for example, be an external hard drive to the computer system, or a portable entertainment device, such as, for example, a portable music player, such as an MP3 player, video player, or the like. Digital cameras and camcorders also commonly contain such storage devices.

Typically, in a modern computer system a peripheral device is connected to the host device using the universal serial bus (USB) interface. USB is a serial bus standard which was designed to allow peripherals to be connected using a single standardised interface socket, and to improve "plug and play" capabilities by allowing devices to be connected and disconnected without rebooting the computer system. A USB system comprises a USB host, to which multiple peripheral devices can be connected via a multitude of downstream USB ports. USB device communication is based on "pipes" (logical channels), which are connections from the host controller to a logical entity on the device named an "end point".

A USB device can have up to 32 active pipes, 16 into the host controller and 16 out of the controller. Each end point can transfer data in one direction only. End points are grouped into interfaces, and each interface is associated with a single device function.

Peripheral devices that attach to the universal serial bus can be full custom devices requiring a full custom device driver to be used, or may belong to a "device class". These classes define expected behavior in terms of device and interface descriptors, so that the same device driver may be used for any device that claims to be a member of a certain class. Typical operating systems implement device classes so as to provide generic drivers for any USB device.

Where a mass storage device is connected to a host system using the universal serial bus USB provides a device class called the USB mass storage device class. The USB mass storage device class provides a simple interface to read and write sectors of data from a mass storage system, for example such as a hard drive, CD or DVD reader and writer drives, flash memory devices, or the like. The simple interface uses the SCSI command protocol set. The SCSI command protocol set is well known, and is typically used for accessing internal hard drives within a computer system, but, in this case, is also used to access USB mass storage devices. SCSI (small computer system interface) provides a circular process to transfer data between devices on the SCSI bus. From the first layer of the SCSI protocol, all additional layers of the protocol must be executed before any data is transferred to or from another device. This means that the SCSI protocol must be completed for each read and write command before the next SCSI command can be executed. In SCSI terminology, communication takes place between an initiator and a target. The initiator sends a command, being part of the SCSI command protocol set, to the target, which then responds. At the end of the command sequence the target returns a status code byte, to indicate success, or error, or that the target is busy. There are four categories of SCSI commands: N (non data), W (writing data from initiator to target), R (reading data from target to initiator),and B (bi-directional).

Figure 1 is a block diagram showing a typical USB mass storage device connected to a host computer 10, using the universal serial bus. More particularly, host computer 10 comprises a central processing unit (CPU) 102, display controller 104, for example for controlling a video display unit such as a monitor or the like, and keyboard controller 106, for controlling a connected keyboard (not shown). The host computer 10 will typically also contain memory 110, as well as an internal mass storage device 108, such as a hard drive, flash memory, or the like. For communication with peripheral devices, a USB host 112 is provided, which, as mentioned previously, makes use of a SCSI handler 114, for communicating control commands belonging to the SCSI command protocol set to the peripheral device. The host 110 further comprises a number of USB interface ports, for the physical connection of a peripheral device thereto.

A typical USB mass storage device 20 comprises the mass storage 202 itself, such as a hard disk, flash memory, or the like. The mass storage device will also typically include control circuitry, running control software to control the mass storage device. For example, a file server 204 handles the writing to and reading from of data to/from the mass storage 202.

The file server is controlled by a file process thread 206, which maintains overall control of the writing to and reading from of data from the mass storage 202. The file process thread 206 makes use of a SCSI handler 208 for receiving control commands using the SCSI command protocol set from the IJSB host 112 in the host computer 10.

In order to write data to and read data from the mass storage 202 in the mass storage device the SCSI handler 114 in the USB host 112 in the host computer 10 sends appropriate SCSI commands to the SCSI handler 208 in the USB mass storage device 20. The SCSI commands are interpreted and the appropriate command passed to the file process thread, which controls the file server to access the mass storage accordingly. Figure 2 illustrates the typical sequence of operations for performing a write command i.e. to write data to the mass storage 202 in the USB mass storage device 20. For example, the USB mass storage device 20 could be an MP3 player, or the like, connected to the host computer 10, and the user of the host computer 10 wishes to copy MP3 files onto the mass storage 202 in the mass storage device 20.

With reference to Figure 2, the host SCSI handler 114 at step 2.2 issues a "write 10" command, which is a SCSI write command, which is 10 bytes long. Each SCSI write command contains a "logical block address" which is the address of a number of logical blocks in the mass storage 202 to which data should be written. A typical logical block address equates to 512 bytes of storage.

The SCSI handler 208 in the mass storage device receives the "write 10" command, and at step 2.4 issues its own "get data" command back to the host SCSI handler, which causes the SCSI handler 114 in the host to then transfer the data block to be written to the SCSI handler 208 in the mass storage device, at step 2.6. As mentioned, typically a data block to be written will be 512 bytes in size. The SCSI handler 208 then, at step 2.8, tells the controlling file process thread 206 that it has received a write command, and that the data is available to be written. The file process thread 206 then instructs the file server 204 to write the data, at step 2.10, and thereafter the file server 204 writes the data to the mass storage device 202. It takes a finite amount of time for the data to be written, as shown.

Once the data has been written, at step 2.12 the file server 204 sends an acknowledgement signal back to the file process thread 206, which forwards the successful acknowledgement signal to the SCSI handler 208 at step 2.14. The SCSI handler 208 then sends a "write success" SCSI command at step 2.16, to the host SCSI handler 114. This therefore completes the SCSI write command, and the block of data has been successfully written. The host SCSI handler 114 can then issue a second "write 10" command, as shown at step 2.1 8, to write a second block of data to the mass storage device 202 in the mass storage device 20. Steps 2.18 to 2.32 therefore correspond to steps 2.2 to 2.16, previously described, but whereby a second block of data is written.

Whilst the above procedure enables reliable access to a mass storage device so as to write data thereto, it will also be understood that corresponding SCSI read commands can also be used to read data therefrom. The use of the SCSI command protocol set to control the USB mass storage device provides that tried and trusted technology is being used, which is reliable and compatible with many existing systems. However, the nature of the SCSI command protocol set, being a circular process, means that a successful acknowledgement of a previous write command must be received by the SCSI handler in the host before the write command for a subsequent block of data is sent and that subsequent block of data can then be written. This leads to a slower data transfer procedure between the mass storage device 202 and the host than may otherwise be possible, for the reason that the mass storage 202 in the mass storage device is not being accessed (either written to, or read from), for a significant portion of time, whilst the SCSI commands are being exchanged.

This is apparent in Figure 2, as explained below.

More particularly, if one looks at step 2.12 in Figure 2, after the first block of data has been written, then a "complete (ok)" signal is sent back to the file process thread. This must then be passed back to the host SCSI handler at step 2.16, before a further "write 10" command is passed from the host SCSI handler to the device SCSI handler. Thereafter, the device SCSI handler must obtain the block of data to be written, and then the write command must be passed ultimately to the file server, via the file process thread. All of this signaling takes a significant amount of time during which the mass storage 202 itself is not being accessed i.e. read from or written to. This time period in Figure 2 is the time period between step 2.12, after the writing of the first block of data, and step 2.26, whereupon the second block of data starts being written. As a result of this time period, due to the SCSI command protocol signaling, access to and from the mass storage 202 is not as quick or efficient as it could be otherwise.

Summary of the invention

The present invention aims to provide improved techniques for peripheral devices and in particular where the peripheral device is accessed using a command set which requires acknowledgement of a previous command prior to issue of a next access command.

Embodiments of the invention provide this improvement by submitting a successful acknowledgement command back to the host before the accessing of the peripheral device has been completed, but after a significant amount of the access has been undertaken. For example, where a write access to mass storage is to be performed, writing of the data to the mass storage is commenced and a successful acknowledgement of the write is passed back to the host device before the writing of the data is completed. This allows for signaling to obtain the next block of data to be written to be undertaken at the same time as the writing of the remainder of the previous block of data, which in turn permits writing of the next block of data to be able to commence substantially immediately after writing of the previous block of data has completed. In this way, access to the mass storage is improved, as there is no long period between subsequent accesses of the mass storage, during which signaling commands relating to the present access and next access are exchanged.

Moreover, reliability is substantially maintained, because a significant portion of the access has been completed successfully before the successful completion acknowledgement is sent back to the host.

In view of the above a first aspect of the invention provides a method of accessing a peripheral device of a host system, the method comprising the steps: receiving at the peripheral device a first access command from the host device; operating the peripheral device to perform a first access operation in response to the received first access command; prior to the completion of the first access operation, acknowledging the successful completion of the first access operation to the host device; and during the completion of the first access operation, receiving at the peripheral device a second access command from the host device specifying a second access operation.

The acknowledgement of the successful completion of the first access operation is sent after the commencement of the operation but before the access operation has completed.

As a result of this arrangement the next access command can be received in time for the end of the first access command, and hence can be commenced substantially immediately thereafter. Moreover, because at least some, and preferably most, of the first access operation has been performed before the acknowledgement is sent back to the host, the acknowledgement is still meaningful in that the host device can rely on it. Reliability is therefore maintained.

Preferably the successful completion acknowledgement is sent to the host device a first time period before the completion of the first access operation, the first time period corresponding substantially to the amount of time the host device takes to respond with a second access command after receipt of the successful completion acknowledgement in respect of the first access command. In this way, the successful completion acknowledgement is sent back to the host as late as possible such that it can represent as much as possible of the access operation which has been performed. Reliability of the arrangement is therefore maintained because the host device can place reliance on the receipt of the successful completion acknowledgement that at least part, and preferably most, of the access operation in respect of which the acknowledgement is received was actually performed before the acknowledgement message was sent.

In preferred embodiments the access operation is a data write operation. The present invention is particularly advantageous for use with write operations.

From a second aspect the invention also provides a peripheral device for connection to a host system for accessing thereby, the peripheral device comprising: an interface for connection to the host system, the interface receiving, during use, access commands from the host device; and a controller which in use controls the peripheral device to perform access operations in response to the received access commands and controls the interface to respond to the host device with successful completion acknowledgements of access operations; the peripheral device being characterised in that: the controller, prior to the completion of a first access operation, controls the interface to acknowledge the successful completion of the first access operation to the host device; and during the completion of the first access operation the interface receives a second access command from the host device specifying a second access operation.

The second aspect has the same advantages, and provides the same further features and associated advantages as described previously in respect of the first aspect.

Further aspects and features of the invention will be apparent from the appended claims.

Brief Description of the Drawings

Further features and advantages of the present invention will become apparent from the following description of embodiments thereof, presented by way of example only, and by reference to the accompanying drawings, wherein like reference numerals refer to like parts, and wherein: -Figure 1 is a block diagram of a host computer and mass storage device used as the basis for embodiments of the present invention; Figure 2 is a signal time diagram illustrating the exchange of signals in an access operation

according to the prior art;

Figure 3 is a signal time diagram illustrating the exchange of signals according to an access operation of a first embodiment of the present invention; and Figure 4 is a signal time diagram illustrating the exchange of signals according to an access operation of a second embodiment of the present invention.

Description of Embodiments of the Invention

Embodiments of the invention provide a mass storage device 20, of the same architecture as described previously with respect to Figure 1. The mass storage device 20 connects to the universal serial bus of a host computer 10, such that the host computer 10 can access mass storage 202 in the mass storage device 20, i.e. read data therefrom, and write data thereto.

The mass storage device communicates with the USB host 112 in the host computer 10 using the SCSI command protocol set, as described previously in respect of the prior art.

Accordingly, the mass storage device 20 comprises a SCSI handler 208, a file process thread 206 in overall control of the accessing of the mass storage 202 in the device 20, and a file server 204, which handles the actual reading and writing of data from the mass storage 202. The mass storage 202 may, for example, be a hard disk, flash memory, or the like.

Within embodiments of the invention, therefore, it is the access procedures performed by the file process thread 206 which cause the mass storage device 20 to operate differently from the prior art, and in accordance with embodiments of the invention. In particular, according to embodiments of the invention, the file process thread 206 controls the mass storage device to exchange SCSI command protocol signals with the SCSI handler in the host at different times than in the prior art and in particular, provides for the exchange of SCSI command protocol signals to obtain the next block of data to be written, whilst the previous block of data is still being written. In particular, in a first embodiment of the invention a block of data to be written is split into a first part, which is written, and then successful acknowledgement of the writing of that first part is passed back via the SCSI handlers, to enable the next block of data to be obtained for writing to the mass storage 202.

Whilst the next block of data is being obtained, the second part of the first block of data is then written.

In a second embodiment, rather than split a block of data into two parts during the writing of the block of data, before the writing is completed a successful acknowledgement is passed back via the mass storage device SCSI handler to the SCSI handler in the host, such that the next block of data can then be obtained, whilst the remainder of the first block of data is still being written.

In both embodiments, therefore, a significant portion of the data can be written to the mass storage 202 before a successful acknowledgement is passed back but then, whilst the next SCSI command is being obtained, the remainder of the data access is performed. In this way, access to the mass storage 202 is quickened, whilst reliability, in terms of the host being able to rely upon the successful acknowledgements as indicating that the access has been successful, is substantially maintained.

Further details of the first embodiment of the invention will become apparent with reference to Figure 3.

Figure 3 is a time signal diagram illustrating which signals are passed between elements of the mass storage device 20 of the first embodiment, and at what time. Figure 3 particularly relates to a write command, where data is being written by the host computer 10 to the mass storage 202 in the mass storage device 20.

Referring to Figure 3, firstly at step 3.2 the host SCSI handler 114 in the USB host 112 in the host computer 10 sends a "write 10" command, being a SCSI command, to the SCSI handler 208 in the mass storage device. The SCSI handler 208 responds at step 3.4 with a SCSI "get data" command, to cause the SCSI handler 114 in the USB host 112 to send, at step 3.6, the block of data presently to be written to the SCSI handler in the mass storage device, where it is buffered. At step 3.8 the SCSI handler 208 informs the file process thread 206 that it has a block of data to be written and upon receipt of this signal the file process thread 206 obtains the block of data data, and buffers a first part of the data in a first buffer, and the remainder of the block of data in a second buffer. The respective sizes of the first and second buffers will be discussed later.

At step 3.10 the file process thread instructs the file server to write the data in the first buffer to the mass storage 202. This takes a finite amount of time whilst the data is being written, as shown in Figure 3, whereupon the file server then returns with a successful acknowledgement at step 3.12, to the file process thread. Upon receipt of the acknowledgement of the successful writing of the data in the first buffer, the file process thread then passes the successful acknowledgement back to the mass storage device SCSI handler 208, at step 3.14, and, at the same time, instructs the file server 204 to begin writing the data in the second buffer to the mass storage 202. Thus, the data in the second buffer starts to be written to the mass storage 202.

Whilst the data from the second buffer is being written the SCSI handIer 208 has received the acknowledgement from the file process thread 206 and interprets this acknowledgement as the entire block of data having been successftilly written. Therefore, the SCSI handler 208 then passes back to the host SCSI handler 114 a "write success" SCSI command signal, to indicate to the host SCSI handler that the first block of data was successfully written, and I0 a next access command can be issued. In response to the "write success" signal at step 3.18 the host SCSI handler 114, believing the first block of data to now have been written, sends, at step 3.20, a "write 10" SCSI command in respect of the next block of data to be written. This is acknowledged by the SCSI handler 208 in the mass storage device by the SCSI handler 208 issuing the "get data" response at step 3.22, which is responded to by the host SCSI handler 114 passing, at step 3.24, the next block of data to be written to the device SCSI handler 208, where it is buffered.

During steps 3.18 to 3.24, meanwhile, the file server 204 completes the writing of the second part of the first block of data which was stored in the second buffer to the mass storage 202, and indicates this to the file process thread 206 by sending the "complete (ok)" signal at step 3.8. Thus, at that time, the file process thread 206 knows that the first block of data has been successfully written, and that further, subsequent, access operations can be performed on the mass storage 202. Note that the file process thread 206 receives the successful acknowledgement signal at step 3.28 from the file server 204 at about the same time that the SCSI handler 208 receives the next block of data to be written, at step 3.24.

Returning to the SCSI handler, the SCSI handler informs the file process thread 206 that it has the next block of data to be written at step 3.26 and passes the buffered data thereto.

Thereupon, the file process thread 206 splits the block of data again into two parts, with a first part being stored in the first buffer, and a second part being stored in the second buffer.

The file process thread then instructs the file server 204 to write the data in the first buffer, at step 3.30. At step 3.32 the file server acknowledges the successful writing of the data in the first buffer back to the file process thread 206, which then simultaneously instructs the writing of the second buffer, at step 3.36, and sends the successful acknowledgement of the writing of the data block back to the SCSI handler 208, at step 3.34. In this respect, steps 3.30, 3.32, 3.36, and 3.34 are identical to steps 3.10, 3.12, 3.16, and 3.14 in respect of the first block of data.

Processing then continues with steps 3.38, 3.40, 3.42, 3.44, 3.46, 3.48, 3.50, and 3.52, which correspond to steps 3.18, 3.20, 3.22, 3.24, 3.26, 3.28, 3.30, and 3.32, respectively.

II

Basically, the second part of the data block in the second buffer is written, whilst simultaneously the SCSI signaling protocols are used to obtain the next mass storage access command, such that access of the mass storage to write thereto can be performed immediately after the data in the second buffer has been written.

With the first embodiment, therefore, by dividing the data blocks to be written into data in a first buffer, and data in a second buffer, and acknowledging the successful write of the whole data block after the data block in the first buffer has been written, then the SCSI signaling protocol can be used to obtain the next data block to be written, whilst the data in the second block is being written. Then, substantially immediately after the data in the second buffer has been written, the data of the second block which is in the first buffer can start to be written to the mass storage 202. Access operations on the mass storage 202 can therefore be performed more quickly, as there is less time between access operations to wait for the SCSI signaling operations to be performed.

It will be appreciated that a multithreaded processing arrangement is needed in order to implement this invention, so that data can be written to a file system at the same time as an acknowledgement of completion is being sent.

With respect to the first buffer and the second buffer, these may be implemented as separate physical buffers i.e. two separate memories, with separate memory address ranges, or may be implemented as virtual buffers in the same memory i.e. the first buffer corresponds to a first set of memory address values or a first range of such values in the memory, and the second buffer corresponds to a second set of memory address values or a second range of such values. The address ranges may be contiguous or spaced far apart. Various further arrangements to provide the two buffers will be apparent to the person skilled in the art.

The improvement in the speed of access operations to the mass storage 202 can be seen by comparing Figures 2 and 3. In this respect, the time arrows of Figures 2 and 3 represent substantially the same amount of time (although may not, themselves, be to scale, or represent, along their length, a linear amount of time). Therefore, as will be seen in Figure 2 in the amount of time represented by the length of the arrows two blocks of data are completely written. However, in the same amount of time represented in Figure 3, two complete blocks of data are written, represented by the first buffer being written twice between steps 3.10 and 3.12, and steps 3.30 and 3.32, and the second buffer being written twice, represented between steps 3.16 and 3.28, and 3.36 and 3.48. However, in addition, the first part of a third block of data is also written in substantially the same amount of time, represented by the data written between steps 3.50 and 3.52. Therefore, depending upon the size of the first buffer, which in turn is dependent upon the write rate to the mass storage as well as the latency of the host in responding with the next access command after receipt of the successful completion acknowledgement, an increase in performance is obtained. In the example of Figure 3, where the buffers are of similar sizes, somewhere between a 25% and 356/a increase in performance could be achieved, in that 25% to 35% more data than in the prior art can be accessed in the same time period.

With respect to the sizes of the first buffer and second buffer the sum of the sizes of the first buffer and the second buffer must equal the size of the data block to be written, typically 512 bytes. In respect of the relative sizes, however, the data in the second buffer is written during the time it takes for the SCSI handler 208 to send the successful acknowledgement back to the host SCSI handler; to receive the next SCSi command; and to then be in a position where the next block of data to be written is available to the file process thread. Therefore, the size of the second buffer should be approximately equivalent to the time period necessary for the above signals to be exchanged, multiplied by the write rate to the mass storage 202 i.e.: -second_buffer_size (bytes) = signaling_protocol_time (seconds) x mass_storage_write_rate (bytes per second).

Having calculated the second buffer size in accordance with the above, the first buffer size is then the difference between the data block size, and the second buffer size i.e.: -first_buffer_size (bytes) = data_block_size (bytes)-second_bu ffer_size (bytes).

The operation of a mass storage device according to a second embodiment will now be described with respect to Figure 4.

Within the second embodiment, the same system architecture as described previously with respect to Figure 1 is used. Within the second embodiment, however, the file process thread 206 controls the writing of data to the mass storage 202 by the file server 204, and the sending of SCSI command signals via the SCSI handler 208, in the manner shown in Figure 4.

More particularly, Figure 4 illustrates the signals which are passed between the host device and the mass storage device 20, and between the elements of the mass storage device 20, to effect a write command i.e. to write data from the host device 10 to the mass storage device 20.

With reference to Figure 4, in the case that the host device 10 wishes to write data to the mass storage device 20, connected to the universal serial bus of the host device 10, then the SCSI command protocol set is used to control the mass storage device 20. In particular, to write a first block of data, at step 4.2 the host SCSI handler 114 issues a "write 10" command, which is received at the SCSI handler 208 of the mass storage device 20. The SCSI handler 208 then responds, at step 4.4, with a "get data" command, and this is responded to by the SCSI handler in the host with the block of data, at step 4.6, which is then buffered by the SCSI handler 208 in the mass storage device. The SCSI handler 208 then informs the file process thread 206 that it has data to be written, at step 4.8, and the file process thread 206 then controls the file server 204, and instructs it to begin writing the buffer data, at step 4.10. The file server 204 then begins to write the data block.

At the same time as instructing the file server 204 to begin writing the first block of data, the file process thread 206 starts a timer, to time a first time period P, where P is shorter than the total write time Wof the block of data, as shown in Figure 4. The length of time calculated for the time period P will be discussed later. After the time period P has expired, the file process thread, at step 4.12, indicates to the SCSI handler 208 that the block of data has been successfully written. This causes the SCSI handler 208 to transmit a "write success" SCSI command signal back to the SCSI handler 114 in the IJSB host 112, at step 4.14. Thus, as far as the SCSI handler in the host is concerned, the first block of data has been successfully written, and the SCSI commands have been successfully completed, such that a subsequent SCSI process can commence. In the present example, a second block of data is to be written, and hence, at step 4.16 the SCSI handler 114 transmits a further "write 10" command to the SCSI handler 208 in the mass storage device 20. The SCSI handler 208 then responds as previously, i.e. at step 4.18 requests the SCSI handler 114 to transmit the data block thereto, and this is performed at step 4.20. Thus, at the point in time after step 4.20 has finished, the SCSI handler 208 in the mass storage device has the second block of data to be written.

In the meantime, however, the file server 204 has continued to write the first block of data during the time periodf, being the part of the overall write time Wafter the indication of a successful write is sent from the file process thread 206 to the SCSI handler 208 at step 4.12, and during which the SCSI handIer 208 is communicating with the SCSI handler 114 in the host to obtain the next block of data to be written. After the time periodf, i.e. after the total write time W such that the whole first block of data has been written successfully, the file server 204 sends a successful acknowledgement signal to the tile process thread 206, at step 4.24. At this point, therefore, the file process thread knows that the file server has finished writing the first block of data, and that a subsequent access operation can be performed.

Returning to the SCSI handler, at this same point in time it has received the second block of data to be written. It therefore, at step 4.22, sends a "write data" command to the file process thread, which has also just received the successful acknowledgement of the writing of the first block of data, at step 4.24. The file process thread is therefore able to instruct the file server, at step 4.26, to begin writing the second block of data. The second block of data is then written between steps 4.26 and step 4.40, as shown. However, as previously, after the time period P during the writing of the second block of data a successful acknowledgement is passed back to the SCSI handler 208 from the file process thread 206, at step 4.28. This allows the SCSI handler to then signal success to the host SCSI handler 114, and obtain the next block of data to be written, whilst the remainder of the second block of data is still being written, during time periodf In this respect, steps 4.30, 4.32, 4.34, 4.36, 4.38, 4.40, and 4.42, correspond to steps 4.14, 4.16, 4.18, 4.20, 4.22, and 4.26, described previously. As will be apparent, the process repeats for subsequent blocks of data until all the data which is required to be written has been written.

With respect to the respective time periods P andf the sum of these time periods equals the total write time W, necessary to write the block of data to the mass storage. i.e.: -w=P+f With respect to the relative lengths of time periods P andf the time periodfcorresponds to the signaling time between the SCSI handler in the mass storage device and the SCSI handler in the host, to acknowledge the successful write of the previous block of data, and to obtain the next block of data to be written. In this respect, the time periodf in the second embodiment corresponds to the write time of the second buffer in the first embodiment.

Knowing this time period, the time period P, which is the time period which is actually timed by the file process thread 206 after the write command of the data block is passed to the file server, is found by subtracting the time period f from the total write time required for the data block i.e.: -P= W-f With the above arrangement, therefore, received data blocks are written as whole data blocks all at once, without being buffered, as in the first embodiment. However, in order to cause the respective SCSI handlers to acknowledge the previous data block, and obtain the next data block for writing earlier than was heretofore the case, the successful acknowledgement is sent by the file process thread back to the SCSI handler after the time period P, whilst the data block is still being written.

At the expiry of the time period P it is likely that a large portion, if not most, of the data block will have been successfully written by that time, although some data will remain to be written. In both embodiments of the invention there is therefore a trade off between being able to indicate a successful access operation, where the indication relates to the operation being fully completed, and indicating the access operation slightly earlier, where most of the access operation has been completed, but a remainder still needs to be performed. However, by sending the acknowledgements slightly earlier than has heretofore been the case, and, in respect of the second embodiment, after the time period P, then the signaling steps required to obtain the next block of data to be written can be performed whilst the small remainder of data still to be written is written. The next block of data is therefore immediately ready for access, and can be written substantially immediately after the writing of the previous block of data is completed.

The second embodiment is even more advantageous than the first embodiment and the prior art. In this respect the time arrows of Figure 4 again represent substantially the same amount of time as the time arrows in Figures 2 and 3 (with the same proviso as previously, that the time depicted is not necessarily linear along the length of the arrows, and the arrows are not to scale). Therefore, whilst in the prior art two full data blocks were written in the time shown, and in the first embodiment substantially two and half data blocks were written, in the second embodiment it will be seen that almost three complete data blocks are written in the same amount of time. Therefore, a performance increase of almost 50% is obtained, in that almost 50% more data has been written in the same time period than would be the case using the prior art operation. However, as with the first embodiment, the actual performance increase which is obtained is dependent upon the write rate as well as the latency of the host in responding with the next access command after receipt of a successful acknowledgment. The figure of almost 50% applies to the situation of Figure 4, wherein the time period for the host to respond with the next access command after receipt of a successful acknowledgment is around 50% of the time requires to write a data block.

The reason why the second embodiment is even more advantageous than the first embodiment is that each data block is written as a continuous block, without buffering into two parts. In view of the fact that there is a guard time between the file server being instructed by the file process thread to write some data, and then reporting back to the file process thread that the write is complete, and then receiving the next write command, within the first embodiment there are in fact twice as many guard times as there are in the second embodiment. This is because there is an additional guard time between the writing of the first buffer and the writing of the second buffer for each data block, as well as a guard time between the writing of the second part of the data of a first data block, and the writing of the first part of the data (from the first data buffer), of a subsequent data block.

In contrast, in the second embodiment, because each data block is written continuously, rather than in two parts, there need only be a guard time between the writing of each data block. Thus, in the same amount of time with less guard times more data can be written or read.

In both embodiments of the invention, therefore, the access times to write to a mass storage device are improved. The improvement is obtained by allowing the SCSI handler to fetch the next block of data to be written (or the next read command), whilst the remainder of the previous block of data is written (or read) to (from) the mass storage. This is achieved by acknowledging a successful write of the whole block of data, before the whole block of data has in fact been written. Thus, with embodiments of the invention reliability in terms of the host device being able to rely on the acknowledgements received from the remote device of a successful access operation is slightly decreased, in that in fact for a received acknowledgement, not all of the data to which that acknowledgement relates has at that point in time been written. However, it is likely that a majority, and certainly a substantial portion, of the data block will have been successfully written at that point in time, and hence the success acknowledgement still has meaning. Therefore, with both the first and second embodiment a substantial increase in access speed to the mass storage can be achieved, but without an unacceptable decrease in reliability, in terms of the host device being able to rely on the acknowledgements received from the mass storage device SCSI handler.

Various modifications and additions may be made to the above described embodiments to provide further embodiments, any and all of which are intended to be encompassed by the appended claims.

Claims

Claims 1. A method of accessing a peripheral device of a host system, the method comprising the steps: a) receiving at the peripheral device a first access command from the host device; b) operating the peripheral device to perform a first access operation in response to the received first access command; c) prior to the completion of the first access operation, acknowledging the successful completion of the first access operation to the host device; and d) during the completion of the first access operation, receiving at the peripheral device a second access command from the host device specifying a second access operation.
2. A method according to claim 1, wherein the successful completion acknowledgement is sent to the host device a first time period before the completion of the first access operation, the first time period corresponding substantially to the amount of time the host device takes to respond with a second access command after receipt of the successful completion acknowledgement in respect of the first access command.
3. A method according to claim I or 2, wherein the access operation is a data write operation.
4. A method according to claim 3, wherein the operating of the peripheral device comprises buffering the data to be written in two parts, and writing the first part of the data before acknowledging the successful completion of the first access operation.
5. A method according to claim 4, wherein the second access command is received during the writing of the second part of the data.
6. A method according to claims 4 or 5, wherein the second part of the data is of a size substantially given by: second_buffer_size (bytes) = signaling_protocol_time (seconds) x data_write_rate (bytes per second); wherein the signalling_protocol_time is the time between the peripheral acknowledging the successful completion of the first access operation and receiving the second access command and any associated data necessary for performing the command.
7. A method according to claim 3, wherein the operating of the peripheral device comprises starting a timer to time a second time period and commencing writing of the data at the start of the second time period, the successful acknowledgement being sent to the host device after the second time period has elapsed.
8. A method according to claim 7, wherein the second access command is received during the writing of the remainder of the data to be written after the second time period has elapsed.
9. A method according to claims 7 or 8, wherein the second time period (P) is given by: P= W-f wherein W is the total write time of the data to be written, andf is the time between the peripheral acknowledging the successful completion of the first access operation and receiving the second access command and any associated data necessary for performing the command.
10. A method according to any of claims 3 to 9, wherein the second access operation is also a data write operation.
II. A method according to claim 10, wherein the method is repeated until no further data needs to be written.
12. A method according to any of the preceding claims, wherein the second access operation is commenced substantially immediately after the completion of the first access operation.
13. A method according to any of the preceding claims, wherein the peripheral device is a mass storage device.
14. A method according to claim 13, wherein the mass storage device is a USB mass storage device which operates in accordance with the USB mass storage device class.
15. A peripheral device for connection to a host system for accessing thereby, the peripheral device comprising: a) an interface for connection to the host system, the interface receiving, during use, access commands from the host device; and b) a controller which in use controls the peripheral device to perform access operations in response to the received access commands and controls the interface to respond to the host device with successful completion acknowledgements of access operations; the peripheral device being characterised in that: c) the controller, prior to the completion of a first access operation, controls the interface to acknowledge the successful completion of the first access operation to the host device; and d) during the completion of the first access operation the interface receives a second access command from the host device specifying a second access operation.
16. A device according to claim 15, wherein the successful completion acknowledgement is sent to the host device a first time period before the completion of the first access operation, the first time period corresponding substantially to the amount of time the host device takes to respond with a second access command after receipt of the successful completion acknowledgement in respect of the first access command.
17. A device according to claim 15 or 16, wherein the first access operation is a data write operation.
18. A device according to claim 17, comprising one or more data buffers for buffering data in two parts, wherein a first part of the data is written before acknowledging the successful completion of the first access operation.
19. A device according to claim 18, wherein the second access command is received during writing of a second part of the data.
20. A device according to claims 18 or 19, wherein the second part of the data is of a size substantially given by: second_buffer_size (bytes) = signaling_protocol_time (seconds) x data_write_rate (bytes per second); wherein the signalling_protocol_time is the time between the peripheral acknowledging the successful completion of the first access operation and receiving the second access command and any associated data necessary for performing the command.
21. A device according to claim 17, and further comprising a timer to time a second time period; wherein writing of data commences at the start of the second time period, and the successful acknowledgement is sent to the host device after the second time period has elapsed.
22. A device according to claim 22, wherein the second access command is received during writing of the remainder of the data to be written after the second time period has elapsed.
23. A device according to claims 2! or 22, wherein the second time period (P) is given by: P= W-f wherein W is the total write time of the data to be written, and f is the time between the peripheral acknowledging the successful completion of the first access operation and receiving the second access command and any associated data necessary for performing the command.
24. A device according to any of claims 17 to 23, wherein the second access operation is also a data write operation.
25. A device according to claim 24, wherein write operations are repeated until no further data needs to be written.
26. A device according to any of claims 15 to 25, wherein the second access operation is commenced substantially immediately after the completion of the first access operation.
27. A device according to any of claims 15 to 26, wherein the peripheral device is a mass storage device.
28. A device according to claim 27, wherein the mass storage device is a USB mass storage device which operates in accordance with the USB mass storage device class.
29. A computer program or suite of computer programs arranged such that when executed by a computer system it/they cause the computer to operate in accordance with the method of any of claim I to 14.
30. A computer readable storage medium storing a computer program or at least one of the suite of computer programs according to claim 29.
31. A method of accessing a peripheral device substantially as hereinbefore described with reference to Figures 1, 3, and 4
32. A peripheral device substantially as hereinbefore described with reference to Figures 1,3, and 4.