GB0724940D0 - Method and system for improved peripheral device access - Google Patents

Method and system for improved peripheral device access

Info

Publication number
GB0724940D0
GB0724940D0 GB0724940A GB0724940A GB0724940D0 GB 0724940 D0 GB0724940 D0 GB 0724940D0 GB 0724940 A GB0724940 A GB 0724940A GB 0724940 A GB0724940 A GB 0724940A GB 0724940 D0 GB0724940 D0 GB 0724940D0
Authority
GB
United Kingdom
Prior art keywords
peripheral device
device access
improved peripheral
improved
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0724940A
Other versions
GB2455772A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Symbian Software Ltd
Original Assignee
Symbian Software Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Symbian Software Ltd filed Critical Symbian Software Ltd
Priority to GB0724940A priority Critical patent/GB2455772A/en
Publication of GB0724940D0 publication Critical patent/GB0724940D0/en
Priority to PCT/GB2008/004158 priority patent/WO2009081101A1/en
Priority to GB0823042A priority patent/GB2455874A/en
Publication of GB2455772A publication Critical patent/GB2455772A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
GB0724940A 2007-12-20 2007-12-20 Early reporting of commands to a peripheral device Withdrawn GB2455772A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB0724940A GB2455772A (en) 2007-12-20 2007-12-20 Early reporting of commands to a peripheral device
PCT/GB2008/004158 WO2009081101A1 (en) 2007-12-20 2008-12-17 Method and system for improved peripheral device access
GB0823042A GB2455874A (en) 2007-12-20 2008-12-17 Early reporting of commands to a peripheral device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0724940A GB2455772A (en) 2007-12-20 2007-12-20 Early reporting of commands to a peripheral device

Publications (2)

Publication Number Publication Date
GB0724940D0 true GB0724940D0 (en) 2008-01-30
GB2455772A GB2455772A (en) 2009-06-24

Family

ID=39048518

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0724940A Withdrawn GB2455772A (en) 2007-12-20 2007-12-20 Early reporting of commands to a peripheral device
GB0823042A Withdrawn GB2455874A (en) 2007-12-20 2008-12-17 Early reporting of commands to a peripheral device

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB0823042A Withdrawn GB2455874A (en) 2007-12-20 2008-12-17 Early reporting of commands to a peripheral device

Country Status (2)

Country Link
GB (2) GB2455772A (en)
WO (1) WO2009081101A1 (en)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3583283D1 (en) * 1984-11-02 1991-07-25 Measurex Corp MEMORY BUS ARCHITECTURE.
US4942579A (en) * 1987-06-02 1990-07-17 Cab-Tek, Inc. High-speed, high-capacity, fault-tolerant error-correcting storage system
JP2743606B2 (en) * 1991-04-11 1998-04-22 三菱電機株式会社 Array type recording device
US5579474A (en) * 1992-12-28 1996-11-26 Hitachi, Ltd. Disk array system and its control method
EP0690382B1 (en) * 1994-07-01 2003-01-02 Sun Microsystems, Inc. Computer system with a multiplexed address bus and pipelined write operations
US7181548B2 (en) * 1998-10-30 2007-02-20 Lsi Logic Corporation Command queueing engine
US6757767B1 (en) * 2000-05-31 2004-06-29 Advanced Digital Information Corporation Method for acceleration of storage devices by returning slightly early write status
US20060143412A1 (en) * 2004-12-28 2006-06-29 Philippe Armangau Snapshot copy facility maintaining read performance and write performance

Also Published As

Publication number Publication date
GB0823042D0 (en) 2009-01-28
GB2455874A (en) 2009-06-24
WO2009081101A1 (en) 2009-07-02
GB2455772A (en) 2009-06-24
WO2009081101A8 (en) 2010-12-23

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)