GB2437573A

GB2437573A - Combiner circuit for Doherty amplifier

Info

Publication number: GB2437573A
Application number: GB0608365A
Authority: GB
Inventors: Anders Stensgaard Larsen
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 2006-04-28
Filing date: 2006-04-28
Publication date: 2007-10-31
Anticipated expiration: 2026-04-28
Also published as: GB0608365D0; GB2437573B

Abstract

A combiner circuit (300), for combining RF signals produced by a Doherty amplifier circuit (100), including a first channel (302), a second channel (304) and an output junction (319), the first channel including a first quarter wave transmission line (309) adapted to receive an RF signal continuously from a first amplifier of the amplifier circuit and to deliver an RF signal to the output junction, the second channel including a second quarter wave transmission line (315) adapted to receive from a second amplifier of the amplifier circuit an RF signal during a high power mode but not during a low power mode of the amplifier circuit and adapted to deliver an RF signal, when received, to the output junction; and a switching arrangement (313, 317) operable to isolate the second transmission line in the low power mode. Also described is an amplifier circuit (100) and an RF transmitter (500) including the combiner circuit.

Description

TITLE: COMBINER CIRCUIT, AMPLIFIER CIRCUIT AND RF

TRANSMITTER INCLUDING THE COMBINER CIRCUIT AND THE

AMPLIFIER CIRCUIT

FIELD OF THE INVENTION

The present invention relates to a combiner circuit, an amplifier circuit and an RF (radio frequency) transmitter including the combiner circuit and the amplifier circuit. In particular, the invention relates to a combiner circuit for use in an RF power amplifier in a Doherty circuit configuration for use in an RF transmitter.

BACKGROUND OF THE INVENTION

RF communication terminals employ an RF transmitter to generate RF signals and a receiver to receive RF signals. Such terminals also normally employ an antenna to send signals produced by the transmitter over-the-air to another terminal and to receive signals sent over the air from another terminal for delivery to the receiver.

The transmitter normally includes at least one RF power amplifier, herein referred to as an RFPA', to amplify the RF signals before they are coupled to the antenna for over-the-air transmission. RFFA5 may be used in each of several stages of the transmitter.

As modern RF communication systems operate in narrow frequency bands it is desirable for the RF transmitter to be linear, i.e. for each RFPA to produce a linear power amplification of the input signal provided to it, in order to prevent distortion of the signal to be transmitted and to minimize inter-channel interference.

It is also desirable for each RFPA to be efficient so that the amount of input electrical power appearing as output power from the RFPA is as high as possible.

Selection of an RFPA for use in a particular application usually involves a compromise between linearity and efficiency.

A well known problem associated with RFPA5 is that they suffer a drop in power efficiency at reduced power output. For example, a Class B RFPA may have an efficiency of about 78% at full output power, but the power efficiency may drop to about 39% when there is a reduction of about 6 dB in the output power. This drop in efficiency can be serious for example in transmitters that employ modulation schemes for coding of data to be transmitted in which there is a variation in amplitude.

A number of technologies are known in the prior art to enhance the power efficiency of an RFPA at reduced power output. For example, in one known technology, a circuit providing power supply modulation is employed. A supply voltage to the RFPA is varied in proportion to the input RF power. Such circuits are difficult to design to operate correctly.

Another known technology to enhance the power efficiency of an RFPA is to provide the RFPA in the form of a Doherty circuit. Such a circuit has a plurality of amplifiers in parallel to amplify an RF signal. A divider divides an input RF signal into fractions and applies the fractions to the individual amplifiers. A first one of the amplifiers, known as a main' amplifier is active continuously for all power levels of the input RF signal to be amplified. A second one of the amplifiers, known as a peak' amplifier, is active only in a first or high power mode of the circuit during selected periods when the RF power level of the input RF signal is higher than a threshold. The peak amplifier is not active in a second or low power mode of the circuit during selected periods when the RF power level of the signal is not greater than the threshold. The amplified RF signals produced by the individual amplifiers are combined by a combiner circuit.

There are various sources of non-linearity in operation of an RFPA in the form of a Doherty circuit.

One such source is the combiner circuit. The input impedance of the combiner circuit changes between the low power mode and the high power mode and this can cause an undesirable impedance mis-match in the combiner circuit leading to a loss of linearity.

SUMMARY OF THE INVENTION

According to the present invention in a first aspect there is provided a combiner circuit according to claim 1 of the accompanying claims.

According to the present invention in a second aspect there is provided a Doherty amplifier circuit according to claim 12 of the accompanying claims.

According to the present invention in a third aspect there is provided an RF transmitter according to claim 14 of the accompanying claims.

Further features of the invention are defined in the accompanying dependent claims and are disclosed in the embodiments of the invention to be described.

Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block schematic diagram of an RF amplifier circuit embodying the invention.

FIG. 2 is a block schematic diagram of an alternative RF amplifier circuit embodying the invention.

FIG. 3 is a block schematic diagram of a combiner circuit embodying the invention for use in the amplifier circuit of FIG. 1.

FIG. 4 is a block schematic diagram of a combiner circuit embodying the invention for use in the amplifier circuit of FIG. 2.

FIG. 5 is a block schematic diagram of an RF transmitter incorporating the amplifier circuit of FIG. 1 or the amplifier circuit of FIG. 2.

DESCRIPTION OF EMBODIMENTS OF THE INVENTION

An amplifier circuit 100 which is a first illustrative form of an RFPA embodying the invention is shown in FIG.' 1. The circuit 100 comprises a Doherty circuit configuration including a parallel arrangement of a first RF amplifier 101 and a second RF amplifier 103.

The amplifiers 101 and 103 may comprise solid state amplifying devices, e.g. bipolar or field effect power transistors. The amplifiers 101 and 103 may be identical or different. An input connection 105 delivers an input modulated RF signal to the circuit 100. The signal may be produced in a manner described later with reference to FIG. 5. The modulated RF signal is applied to a two-way RF divider 107. The modulated RF signal is divided by the divider 107 into two coherent signals each comprising a fraction, e.g. half, of the power of the input RF signal.

A first signal which is one of the divided signals is provided to a first branch 109 leading from the divider 107 to the first amplifier 101. A second signal which is the other one of the divided signals is provided to a second branch 111 leading from the divider 107 to the second amplifier 103. The second amplifier 103 has two states, an active state and an inactive state, which are selected alternately in selected time periods. The states are selected and controlled as described later.

The first signal is provided continuously to the first amplifier 101 and is amplified by the first amplifier 101. An amplified RF output signal produced by the first amplifier 101 is delivered via a path 113 to a combiner circuit 300. The combiner circuit 300 is a novel circuit which is described in more detail later with reference to FIG. 3. The second signal provided to the second amplifier 103 is amplified by the second amplifier 103 when in the active state. An amplified RF output signal produced by the second amplifier 103 when in the active state is delivered via a path 117 to the combiner circuit 300. The combiner circuit 300 combines the RF signals delivered to it via the paths 113 and 117 to provide a single, amplified RF output signal at an output connection 119.

The first amplifier 101 comprises a main' amplifier of the Doherty configuration of the circuit 100. The second amplifier 103 comprises a peak' amplifier of the Doherty configuration of the circuit 100. The first amplifier 101 is active for all power levels of the input modulated RF signal delivered to the input connection 105. The second amplifier 103 is selectively activated so that it is in the active state during selected periods when the power level of the input modulated RF signal is greater than a pre-determined power level threshold. The second amplifier 103 is in the inactive state during selected periods when the power level of the input RF signal is less than the power level threshold.

The circuit 100 thereby has two modes, a high power mode and a low power mode, when the second amplifier 103 is respectively in its active state and its inactive state. This provides enhanced efficiency of the RFPA comprising the circuit 100 compared with a single amplifier.

Control signals for switching the state of the second amplifier 103 between its active state and its inactive state are delivered via a connection 121. The signals may be produced in a manner described later. The signals may be delivered to an electronically controlled switch 123, which switches the state of the second amplifier 103 in a response to receipt of the control signals. The switch 123 may operate in a known manner to switch the state of the second amplifier 103. For example, the switch 123 may change a bias voltage applied to the second amplifier 103. Alternatively, or in addition, the control signals may be delivered via the connection 121 to a switch 125 included in the branch 111. The control signals when applied to the switch 125 switch delivery of the second signal to the second amplifier 103 on and off by closing and opening the switch 125.

An amplifier circuit 200 which is a second illustrative form of RFFA embodying the invention is shown in FIG. 2. The circuit 200 again comprises a Doherty circuit configuration and includes, arranged in parallel, a first amplifier 201, a second amplifier 203 and a third amplifier 205. The amplifiers 201 and 205 may comprise amplifying devices such as solid state amplifying devices, e.g. bipolar or field effect power transistors, which may be identical. The amplifier 203 may also comprise an amplifying device such as a solid state amplifying device, e.g. a bipolar or field effect power transistor. The second amplifier 203 may be identical to the first amplifier 201 and the third amplifier 205 or may it be different, e.g. so that it is capable of producing a greater power output than the amplifiers 201 and 205. The first amplifier 201 and the third amplifier 205 are both main' amplifiers of the Doherty configuration which are active at all power levels of an input modulated RF signal. The second amplifier 203 is a peak' amplifier which is selectively activated, in a manner similar to the second amplifier 103 of the circuit 100, so that it is in an active state during selected periods when the power level of the input RF signal is greater than a threshold. The second ) amplifier 203 is in an inactive state during selected periods when the power level of the input RF signal is less than the threshold.

The circuit 200 thus has a high power mode when the second amplifier 203 is in its active state and a low power mode when the second amplifier 203 is in its inactive state.

An input modulated RF signal is delivered to the circuit 200 via an input connection 207 to a three way RF divider 209. The input RF signal is divided by the divider 209 into three coherent RF signals each comprising a fraction of the power of the input RF signal. A first signal which is one of the divided signals is provided to a first branch 211 providing an input path to the first amplifier 201 via a controllable attenuator 213. A second signal which is one of the divided signals is provided to a second branch 215 providing an input path to the second amplifier 203 via a controllable attenuator 217. A third signal which is one of the divided signals is provided to a third branch 219 providing an input path to the third amplifier 205 via a controllable attenuator 221.

The first signal is continuously provided to the first amplifier 201 and is amplified by the first amplifier 201. An amplified RF output signal produced by the first amplifier 201 is delivered via a path 225 from the first amplifier 201 leading to a combiner circuit 400. The combiner circuit 400 is a novel circuit to be described in more detail with reference to FIG. 4.

The second signal is provided to the second amplifier 203 when in its active state. An amplified RF output signal produced by the second amplifier 203 when in its active state is delivered via a path 227 from the second amplifier 203 leading to the combiner circuit 400.

The third signal is continuously provided to the third amplifier 205 and is amplified by the third amplifier 205. An amplified RF output signal produced by the third amplifier 205 is delivered via a path 229 from the third amplifier 205 to the combiner circuit 400.

The combiner circuit 400 combines the RF signals delivered to it via the output paths 225, 227 and 229 to provide a single, combined amplified RF output signal at an output connection 231.

In the amplifier circuit 200, as in the amplifier circuit 100, a connection 121 provides control signals generated in a manner described later. The control signals are applied to each of the controllable attenuators 213, 217 and 221 to switch a state of each of the controllable attenuators 213, 217 and 221. The control signals are issued when the second amplifier 203 is to switch between its active and inactive states.

For the inactive state of the second amplifier 203, the attenuator 217 is set to provide an attenuation which is substantially infinite, i.e. to provide a state in which the second signal from the divider 209 is switched off. The attenuators 213 and 221 are set to be in a non-attenuating state, i.e. to provide zero attenuation respectively to the first and third signals from the divider 209, during periods which coincide with the inactive state of the second amplifier 203.

For the active state of the second amplifier 203, the attenuator 217 is set to be in an attenuating state, i.e. to provide a finite attenuation, e.g. an attenuation of about 3 dB. The attenuators 213 and 221 are also set to be in an attenuating state, i.e. to provide a finite attenuation, e.g. of about 3 dB, during periods which coincide with the second amplifier 203 being in the active state.

Thus, the attenuator 217, whose state is switched by the control signals delivered via the connection 121, allows the second signal to be applied to the second amplifier 203 only during periods when the active state of the second amplifier 203 is required. Thus, the attenuator 217 operates in a manner similar to the switch in the circuit 100, but also provides an attenuation of the second signal in the high power mode of the circuit 200. The attenuation settings of the attenuators 213, 217 and 221 in the high power mode of the circuit allow a constant gain to be obtained for the circuit in both of the low power and high power modes, thereby improving gain linearity.

FIG. 3 is an illustrative form of the combiner circuit 300 of the amplifier circuit 100 of FIG. 1. The circuit 300 shown includes a channel 302 and a channel 304 leading in parallel to an output junction 319. The channel 302 includes as an input the path 113 from the first amplifier 101 (FIG. 1) . The channel 304 includes as an input the path 117 from the second amplifier 103 (FIG.

1) . The channel 302 includes a junction 301 at which the channel 304 is connected to an impedance 303, e.g. a resistor providing an impedance of 50 ohms. The channel 304 includes a switch 311 connected to the path 117 and, after the switch 311, a junction 305 at which the channel 304 is connected to an impedance 307, e.g. a resistor providing an impedance of 50 ohms. The impedances 303 and 307 are connected together to isolate the channels 302 and 304 from one another. Alternatively, the impedances 303 and 307 could be combined into a single impedance to which both of the channels 302 and 304 are connected.

The channel 302 includes, after the junction 301, a transmission line 309 in the form of a stripline (microstrip) conductor. The transmission line 309 is a quarter wave transmission line. In other words, it has an effective electrical length equal to a quarter wavelength at an operational frequency of the amplifier circuit 100, preferably at the centre of an operational frequency band. The transmission line 309 receives a continuous input RF signal via the path 113 from the amplifier 101.

The channel 304 includes a switch 313 after the junction 305. The channel 304 includes after the switch 313 a transmission line 315 in the form of a stripline (microstrip) conductor. The transmission line 315 is a quarter wave transmission line. The transmission line 315 receives an input RF signal via the path 117 from the amplifier 103 when in its active state.

The channel 302 includes an output path 321 from the transmission line 309 which leads to the junction 319.

The channel 304 includes an output path 323 from the transmission line 315 which leads via a further switch 317 to the junction 319. An output connection 325 leads from the junction 319.

The switches 311, 313 and 317 may be rectifying diodes, e.g. PIN diodes, which switch state in response to the RF power of the second signal amplified by the second amplifier 103 changing between a high level and a low level in a known manner. Alternatively, as illustrated in FIG. 3, the switches 311, 313 and 317 may be electronically operated by control signals delivered via the connection 121. The switches 311, 313 and 317 are closed during periods which coincide with the active state of the second amplifier 103, i.e. in the high power mode of the circuit 100. The switches 311, 313 and 317 are open during periods which coincide with the inactive state of the second amplifier 103, i.e. in the low power mode of the circuit 100.

In operation, an RF signal is continuously delivered to the channel 302 via the path 113 as an output from the first amplifier 101 (FIG. 1) . This RF signal is passed through the transmission line 309 and is delivered to the output junction 319 via the output path 321. An RF signal is delivered to the channel 304 via the path 117 as an output from the second amplifier 103 (FIG. 1) when the circuit 100 is in its high power mode. This RF signal is passed via the closed switches 311 and 313 through the transmission line 315 and is delivered to the output junction 319 via the output path 323 including the closed switch 317. The output junction 319 is a RF power combining junction of known form which may for example be an inverse of the divider 107. It serves to combine coherent RF signals delivered via the output path 321 from the transmission line 309 and via the output path 323 from the transmission line 315. The output junction 319 provides a single, combined RF output signal in the output connection 325.

The transmission line 309 serves as an impedance converter between (i) an input impedance of the channel 302 derived from the circuit 100; and (ii) an output impedance of the channel 302 derived from an output load (not shown) connected to the connection 325. Since the transmission line 309 has an effective electrical length equivalent to a quarter wavelength, the impedance conversion can be carried out without causing undesirable input or output reflections.

As known from transmission line theory, if an input impedance to a transmission line is Zi, an output impedance from the transmission line is Z3 and an impedance of the transmission line between the input impedance Zi and the output impedance Z3 is an impedance Z2, the optimum value of Z2 is given by Z2 = (Zi * Z3)'72 Equation 1 i.e. Z2 is the square root of the product of Zi and Z3.

Thus, the optimum value required for the impedance of the transmission line 309 can be calculated from Equation 1. However, the value of the input impedance to the channel 302 including the transmission line 309 changes between the low and high power modes of the circuit 100. Typically, the value of the input impedance Z1 is about 100 ohms for the high power mode and is about 50 ohms for the low power mode of the circuit 100.

Similarly, the transmission line 315 serves as an impedance converter, during operational periods when the circuit 100 is in its high power mode, between (i) an input impedance of the channel 304 derived from the circuit 100; and (ii) an output impedance of the channel 304 derived from an output load (not shown) connected to the connection 325. Since the transmission line 315 has an effective electrical length equivalent to a quarter wavelength, the conversion can be carried out without causing undesirable input or output reflections. An optimum value required for the impedance of the transmission line 315 during operational periods when the circuit 100 is in its high power mode can be calculated using Equation 1 above.

The switches 313 and 317 are respectively in an input path to and an output path from the transmission line 315. When no signal is delivered via the path 117 during the low power mode of the circuit 100, the switches 313 and 317 are open, thereby electrically isolating the transmission line 315 from the amplifier 103 and the junction 319. Thus, the transmission line 315 is effectively floating (unconnected) in this condition, and the transmission line 315 has little effect on the impedance of the transmission line 309. However, when a signal is delivered via the path 117 during the high power mode of the circuit 100, the switches 313 and 317 are closed, and the transmission line 315 provides an optimal impedance required to give impedance conversion between an input impedance and an output impedance of the channel 304. There is also a coupling in the high power mode between the transmission line 315 and the transmission line 309. By suitable design, the coupling can be arranged to be sufficient to increase the value of the impedance of the transmission line 309 to the optimum value needed for the higher input impedance during the high power mode of the circuit 100.

During periods when the circuit 100 is in its low power mode, the switch 311 is open and thereby prevents reverse RF power leakage back via the path 117 of the channel 304 into the second amplifier 103. The switch 313, which is closed during periods when the circuit 100 is in its high power mode, prevents RF power leakage into and loss in the isolating impedance 307 during such periods.

FIG. 4 is an illustrative form of the combiner circuit 400 for use in the Doherty circuit 200 of FIG. 2.

The circuit 400 includes a channel 402, a channel 404 and a channel 406 leading in parallel to an output junction 425. The channel 402 includes as an input the path 225 from the first amplifier 201 (FIG. 2) . The channel 404 includes as an input the path 227 from the second amplifier 203 (FIG. 2) . The channel 406 includes as an input the path 229 from the third amplifier 205 (FIG. 2) The channel 402 includes a junction 401 at which the channel 402 is connected to an impedance 403, e.g. a resistor providing an impedance of 50 ohms. The channel 406 includes a junction 409 at which the channel 406 is connected to an impedance 411, e.g. a resistor providing an impedance of 50 ohms. The channel 404 includes a switch 417 connected to the path 227 and, after the switch 417, a junction 405 at which the channel 404 is connected to an impedance 407, e.g. a resistor providing an impedance of 50 ohms. The impedances 403, 407 and 411 are isolating impedances which are connected together to isolate the channels 402, 404 and 406 from one another.

Alternatively the impedances 403, 407 and 411 could be combined into a single impedance to which the channels 402, 404 and 406 are all connected.

The channel 402 includes after the junction 401 a transmission line 413 in the form of a stripline (microstrip) . The transmission line 413 is a quarter wave transmission line, i.e. has an effective electrical length equal to a quarter wavelength at an operational frequency of the circuit 200, preferably at the centre of an operational frequency band.

The channel 406 includes after the junction 409 a transmission line 415 in the form of a stripline (microstrip) . The transmission line 415 is a quarter wave transmission line.

The channel 404 includes a switch 419 after the junction 405. The channel 404 includes after the switch 419 a transmission line 421 in the form of a stripline (microstrip) . The transmission line 421 is a quarter wave transmission line. The transmission line 421 is arranged to be positioned between the transmission lines 413 and 415. For example, the transmission lines 413, 415 and 421 may be conducting microstrips formed on a common insulating substrate, e.g. a circuit board, in a side by side symmetrical relationship about an axis passing centrally along the transmission line 421.

The channel 402 includes an output path 423 from the transmission line 413 which leads to the output junction 425. The channel 406 includes an output path 427 from the transmission line 415 which leads to the junction 425.

The channel 404 includes an output path 431 from the transmission line 421 which leads via a further switch fl 429 to the junction 425. An output connection 433 leads from the junction 425.

The switches 417, 419 and 429 may be rectifying diodes, e.g. PIN diodes, which switch state in response to the RF power of the second signal amplified by the second amplifier 203 changing between a high level and a low level in a known manner. Alternatively, as illustrated in FIG. 4, the switches 417, 419 and 429 may be electronically operated by control signals delivered via the connection 121.

The switches 417, 419 and 429 are closed during periods when the circuit 200 is in its high power mode, i.e. coinciding with the second amplifier 203 being in its active state. The switches 417, 419 and 429 are open during periods when the circuit 200 is in its low power mode, i.e. coinciding with the second amplifier 203 being in its inactive state.

In operation, an RF signal is continuously delivered to the transmission line 413 via the path 225 as an output from the first amplifier 201 (FIG. 2) . This RF signal is passed through the transmission line 413 and is delivered to the junction 425 via the output path 423. An RF signal is continuously delivered to the transmission line 415 via the path 229 as an output from the third amplifier 205 (FIG. 2) . This RF signal is passed through the transmission line 415 and is delivered to the junction 425 via the output path 427. In the high power mode of the circuit 200, an RF signal is produced as an output of the second amplifier 203 (FIG. 2), and is delivered via the path 227 and the closed switches 417 and 419 to the transmission line 421. The signal passes through the transmission line 421 and is delivered to the output junction 425 via the output path 431 including the closed switch 429. The output junction 425 is a RF power combining junction of known form which may for example be an inverse of the divider 209 (FIG. 2) . It serves to combine coherent RF signals delivered via the output path 423 from the transmission line 413, via the output path 427 from the transmission line 415 and via the output path 431 including the closed switch 429 from the transmission line 421. The output junction 425 provides a single, combined RF output signal in the output connection 433.

The transmission line 413 serves as an impedance converter between (i) an input impedance of the channel 402 derived from the circuit 200; and (ii) an output impedance of the channel 402 derived from an output load (not shown) connected to the connection 433. Since the transmission line 413 has an effective electrical length equivalent to a quarter wavelength, the impedance conversion can be carried out without causing undesirable input or output reflections. The input impedance of the channel 402changes between the low power and high power modes of the circuit 200. Optimum values of impedance for the transmission line 413 in each of the low power and high power modes can be calculated using Equation 1 given earlier.

Similarly, the transmission line 415 serves as an impedance converter between (i) an input impedance of the path 229 derived from the circuit 200; and an output impedance of the connection 433 derived from an output load (not shown) . Since the transmission line 415 has an / effective electrical length equivalent to a quarter wavelength, the impedance conversion can be carried out without causing undesirable input or output reflections.

The input impedance of the path 229 changes between the low power and high power modes of the circuit 200.

Optimum values of impedance for the transmission line 415 in each of the low power and high power modes can be calculated using Equation 1 given earlier.

The transmission lines 413 and 415 may be identical and may have equal impedances in each of the low power and high power modes.

Similarly, the transmission line 421 serves as an impedance converter during the high power mode between (i) an input impedance of the path 227 derived from the circuit 200; and an output impedance of the connection 433 derived from an output load (not shown) . Since the transmission line 421 has an effective electrical length equivalent to a quarter wavelength, the conversion can be carried out without causing undesirable input or output reflections. The optimum value of the impedance of the transmission line 421 in the high power mode may be found using Equation 1 given earlier.

The switches 419 and 429 are respectively in an input path to and an output path from the transmission line 421. When no input signal is delivered via the path 227 in the low power mode of the circuit 200, the switches 419 and 429 are open thereby electrically isolating the transmission line 421 from the amplifier 203 and the junction 425. Thus, the transmission line 421 is effectively floating in this condition, and the transmission line 421 has little effect on the impedance of the transmission lines 413 and 415. When the switches 417, 419 and 429 are closed during the high power mode of the circuit 200 and a signal is delivered via the path 227, the transmission line 421 provides a desired impedance to the signal to provide impedance conversion as described above. There is also coupling between the transmission line 421 and each of the transmission lines 413 and 415. By suitable design, the coupling can be arranged to be sufficient to increase the value r'f impedance of each of the transmission lines 413 and 415 to their optimum value needed for the higher input impedance during the high power mode. There is also a mutual coupling between the transmission lines 413 and 415 but that is less significant than the coupling provided by the transmission line 421 and does not change between the low power and high power modes.

In order to provide the required impedance and coupling, the transmission line 421 may be in the form of a stripline that is wider than the striplines of the transmission lines 413 and 415.

The following is an illustrative example. The circuit 200 may present to each channel of the combiner circuit 400 an input impedance of 100 ohms (50 ohms per amplifier) in the low power mode of the circuit 200 and an input impedance of 150 ohms in the high power mode.

The output impedance of the combiner circuit 400 may be ohms. Using Equation 1 given earlier, it can be shown that, for the low power mode, each of the transmission lines 413 and 415 desirably requires an impedance of 71 ohms to convert between the input impedance of 100 ohms and the output impedance of 50 ohms. Also using Equation 1 given earlier, it can be shown that, for the high power mode, each of the transmission lines 413, 415 and 421 desirably requires an impedance of 87 ohms to convert between the input impedance of 150 ohms and the output impedance of 50 ohms. The increase in impedance of from 71 ohms to 87 ohms required in the transmission lines 413 and 415 in the high power mode is provided by coupling from the transmission line 421.

During periods when the circuit 200 is in its low power mode, the switch 417 is open and thereby prevents reverse RF power leakage via the path 227 of the channel 404 into the second amplifier 203. The switch 419, which is closed during periods when the circuit 200 is in its high power mode, prevents RF power leakage into and loss in the isolating impedance 407 during such periods.

Beneficially, the combiner circuits 300 and 400 embodying the invention allow optimal impedance conversion to be carried out in each of the low and high power modes thereby allowing linearity of the amplifier circuits 100 and 200 to be maintained during each of the low power and high power modes.

FIG. 5 is a block schematic diagram of an RF transmitter 500 illustrating employment of the amplifier circuit 100 or the amplifier circuit 200 (and thereby either the combiner circuit 300 or the combiner circuit 400) embodying the present invention. A digital baseband processor 501 processes data from an input transducer (not shown) to produce a digital baseband signal which is a modulation signal required to modulate an RF signal to be transmitted by the transmitter 500. The digital baseband signal produced by the digital baseband processor 501 comprises as component signals an I (in phase) signal which is delivered via an I channel 505 and a corresponding Q (quadrature phase) signal which is delivered via a Q channel 507. The I signal is converted from digital form to analog form by a D/A (digital to analog) converter 503. The Q signal is converted from digital form to analog form by a D/A (digital to analog) converter 504. The D/A converter 503 delivers the I signal in analog form to an I channel processor 509 in the I channel 505 which carries out known analog processing of the I signal. For example, the I channel processor 509 may include at least one filter, at least one amplifier and at least one combiner to provide a feedback control signal from a feedback loop such as a Cartesian loop. The D/A converter 504 delivers the Q signal in analog form to a Q channel processor 511 in the Q channel 507 which carries out known analog processing of the Q signal in a similar manner to the processing by the I signal processor 509.

The I channel 505 includes, connected to the I channel processor 509, an upconverting mixer 513 which is also connected to a local oscillator (carrier frequency synthesizer) 517. The Q channel 507 includes, connected to the Q channel processor 511, an upconverting mixer 515 which is also connected to the local oscillator 517 via a ninety degrees phase shifter 519.

Output connections from the upconverting mixers 513 and 515 provide inputs to a summing junction 521 having an output connected in turn to an RFPA (radio frequency power amplifier) 523 and an antenna 525. An output from the RFPA 523 may optionally be passed through at least one further stage (not shown) between the RFPA 523 and the antenna 525 to provide further upconversion and/or amplification of a signal provided as an output by the RFPA 523. A voltage source 527 generates a DC (direct current) supply voltage which is applied via a regulator 529 to the RFPA 523.

In operation, a baseband I signal produced digitally by the digital baseband processor 501 and converted to analog form by the D/A converter 503 is processed by the I channel processor 509 and is delivered to the mixer 513 where it is mixed with a carrier frequency signal from the local oscillator 517 to upconvert the I signal from baseband to RF (radio frequency) . The RF signal produced by the mixer 513 comprises an RF carrier signal modulated with the I signal.

The baseband Q signal produced digitally by the digital baseband processor 501 and converted to analog form by the D/A converter 504 is processed by the Q channel processor 511 and is delivered to the mixer 515 where it is mixed with a carrier frequency signal from the local oscillator 517, shifted in phase by ninety degrees by the phase shifter 519. The Q signal is thereby upconverted from baseband to RF (radio frequency) . The RF signal produced by the mixer 515 comprises an RF carrier signal modulated with the Q signal.

The RF signals produced as outputs by the upconverting mixer 513 of the I channel 505 and the upconverting mixer 515 of the Q channel 507 are combined at the summing junction 521 to produce a single combined, modulated RF signal. The combined, modulated RF signal provides an input to the RFPA 523. The RFPA 523 receives an operational DC supply voltage from the voltage source 527 via the regulator 529 (which may modulate the supply voltage in a known manner) . The RFPA 523 has the form of the amplifier circuit 100 or the amplifier circuit 200 described earlier. The RFPA 523 produces an amplified RF output signal which is delivered (optionally through at least one additional stage, not shown) to the antenna 525. The RF signal reaching the antenna 525 from the RFPA 523 is transformed by the antenna 525 to a radiated signal which is sent over-the-air to a distant terminal (not shown) at which it is received. The antenna 525 may (at times when the transmitter 500 is not in operation) also receive an incoming RF signal sent over-the-air from a distant terminal (not shown) and may deliver the received signal for processing to an RF receiver (not shown) The I channel 505 and the Q channel 507 together with the summing junction 521 comprise a converter which converts an output digital baseband signal produced by the baseband digital processor 501 to a modulated RF signal for application to the RFPA 523.

The digital baseband processor 501 includes a digital processor 502. A connection 121 (which is the same as the connection 121 shown in FIGS. 1 to 4) from the digital processor 502 to the RFPA 523 allows control signals to be delivered from the digital processor 502 to the RFPA 523 to control operation of the RFPA 523, particularly for switching operations between the low power and high power modes as described earlier with reference to FIGS. 1 to 4.

The digital processor 502 determines when the control signals should be produced and delivered via the connection 121 to provide switching between the low power mode and high power mode of the circuit 100 or 200. This determination may be carried out as follows. The digital processor 502 receives data from the digital baseband processor 501 in which it is included. The data corresponds to data employed to produce the output baseband signal which is delivered to the converter comprising the I channel 505, the Q channel 507 and the summing junction 521 eventually to reach the RFPA 523 in the form of a modulated RF signal. The digital processor 502 carries out an analysis of the received data. The digital processor 502 uses the analysis to construct a power level profile of the expected modulated RF signal to be applied to RFPA 523.

The digital processor 502 uses the analysis, and particularly the constructed power level profile, to determine periods when the power level is to be greater than and less than a first power level threshold and points in time when the profile traverses the first power level threshold. The first power level threshold is used as an indicator to distinguish between the low power and high power modes. The digital processor 102 uses the determined periods to select when the switching between the high power mode and the low power mode is to take place. The switching may not be precisely when the power level profile traverses the first threshold. For example, the switching may be applied when the power level is expected to fall to a level less than a second threshold, which is at a power level lower than the first threshold, adjacent to a traversal of the first threshold by the power level profile.

There is a delay period between processing of a signal in digital baseband form by the digital baseband processor 501 and the corresponding signal in modulated RF form reaching the RFPA 523. If necessary, the delay period can be extended by applying a deliberate delay in a known manner, e.g. in the digital baseband processor 501 before issue of the digital baseband signal. The delay period can be known precisely. The digital processor 502 is able to carry out its analysis and determination relating to the constructed profile described above during the delay period. The digital processor 502 can thereby provide control signals to the RFPA 523 via the connection 121 using its knowledge of the expected profile of the RF signal. Switching between the low power and high power modes in the RFPA 523 can thereby be obtained at precise points on the profile of the modulated RF signal passing through the amplifier 523, the precise points being selected in advance by the digital processor 502.

The transmitter 500 incorporating either the amplifier circuit 100 and the combiner circuit 300 or the amplifier circuit 200 and the combiner circuit 400 is suitable for use in an RF communication terminal for use in a number of communication applications, especially those that operate in narrow bandwidths and demand a high level of linearity at high power operation. The terminal may be a base transceiver station of a mobile communication system. Of particular interest is use of the transmitter 500 in a terminal in which the transmitter operates in accordance with pre-defined industry standard operating protocols or procedures such as the TETRA (Terrestrial Trunked Radio) standard protocols as defined by ETSI (European Telecommunication Standards Institute) Although the present invention has been described in terms of the above embodiments, especially with reference to the accompanying drawings, it is not intended to be limited to the specific form described in such embodiments. Rather, the scope of the present invention is limited only by the accompanying claims. In the claims, the terms comprising' or including' do not exclude the presence of other integers or steps.

Furthermore, although individually listed, a plurality of means, elements or method steps may be implemented by, for example, a single unit or processor. Additionally, although individual features may be included in different claims, these may possibly be advantageously combined, and the inclusion in different claims does not imply that a combination of features is not feasible and/or advantageous. In addition, singular references do not exclude a plurality. Thus references to "a", "an", "first", "second" etc do not preclude a plurality.

Claims

CLPJMS

1. A combiner circuit for combining RF signals produced by a Doherty amplifier circuit having a low power mode in which a first amplifier is operable to amplify an RF signal and a high power mode in which each of the first amplifier and a second amplifier is operable to amplify an RF signal, the combiner circuit including a first channel, a second channel and an output junction operable to combine signals in the first channel and the second channel, the first channel including a first quarter wave transmission line adapted to receive an amplified RF signal from the first amplifier in both of the low power mode and the high power mode and to deliver an amplified RF signal to the output junction, the second channel including a second quarter wave transmission line adapted to receive from the second amplifier an amplified RF signal during the high power mode but not during the low power mode and to deliver an amplified RF signal, when received, to the output junction; and a switching arrangement operable to isolate the second transmission line in the low power mode mode.

2. A combiner circuit according to claim 1 including a third channel including a third quarter wave transmission line adapted to receive an amplified RF signal from a third amplifier in both of the low power mode and the high power mode and an output path operable to deliver an RF signal to the output junction.

3. A combiner circuit according to claim 2 wherein the second transmission line is located in a parallel arrangement between the first transmission line and the third transmission line.

4. A combiner circuit according to any one of claims 1 to 3, wherein the switching arrangement comprises a first electrical switch in an input path to the second transmission line and a second electrical switch in an output path from the second transmission line between the second transmission line and the output junction.

5. A combiner circuit according to claim 4 wherein at least one of the electrical switches comprises a rectifying diode.

6. A combiner circuit according to claim 4 wherein at least one of the electrical switches comprises an electronically controlled switch operable to switch state in response to receipt of a control signal.

7. A combiner circuit according to any one of the preceding claims wherein each of the transmission lines comprises a stripline conductor.

8. A combiner circuit according to any one of claims 2 to 7 wherein the first, second and third transmission lines comprise respectively first, second and third stripline conductors which are spatially arranged to be mutually parallel and the second stripline conductor is located between the first and third stripline conductors and is wider than the first and third stripline conductors.

9. A combiner circuit according to any one of the preceding claims wherein the first and second channels are connected together through at least one isolating impedance.

10. A combiner circuit according to claim 9 including a connector junction at which the second channel is connected to the at least one isolating impedance and a switch included in the second channel before the connector junction and operable to be open in the low power mode to prevent RF power leakage in a reverse direction along the second channel in the low power mode.

11. A combiner circuit according to claim 9 or claim 10 including a switch after the connector junction wherein the switch is operable to be closed in the high power mode to prevent RF power leakage from the second channel into the at least one isolating impedance.

12. A Doherty amplifier circuit having a low power mode and a high power mode, the circuit including a first amplifier operable to amplify an input RF signal in the low power mode and in the high power mode, a second amplifier in parallel with the first amplifier and having an active state in the high power mode and an inactive state in the low power mode and a combiner circuit according to any one of the preceding claims, wherein the first amplifier has an output connected to the first channel of the combiner circuit and the second amplifier has an output connected to the second channel of the combiner circuit.

13. A Doherty amplifier circuit according to claim 12 including a third RF amplifier in parallel with the first and second amplifiers and operable to amplify an input RF signal in the high power mode and the low power mode, the combiner circuit including, connected to an output of the third amplifier, a third channel including a third quarter wave transmission line having an input operable to receive an RF signal from the third amplifier and an output operable to deliver an RF signal to the output junction.

14. An RF transmitter including a Doherty amplifier circuit according to claim 12 or claim 13.

15. An RF transmitter according to claim 14 which is operable in accordance with TETRA standard operating protocols.

16. A combiner circuit according to any one of claims 1 to 11 and substantially as herein described with reference to any one or more of the accompanying drawings.

17. A Doherty amplifier circuit according to claim 12 or claim 13 and substantially as herein described with reference to any one or more of the accompanying drawings.