GB2436650A

GB2436650A - Dissipating heat in ferroelectric memories

Info

Publication number: GB2436650A
Application number: GB0606591A
Authority: GB
Inventors: Daping Chu
Original assignee: Seiko Epson Corp
Current assignee: Seiko Epson Corp
Priority date: 2006-03-31
Filing date: 2006-03-31
Publication date: 2007-10-03
Also published as: GB0606591D0

Abstract

The decrease in resistivity which results from the polarisation switching of ferroelectric memory cells can be reduced by providing means to dissipate heat from the memory device. Means suggested for dissipating heat include providing a heat sink or heat spreader, a fan, fluid cooling means and chemical cooling. The memory cells may be deposited on or under a layer of material with matching heat transfer index. The memory cells may also be disposed on different layers and interconnections between these layers provided to enhance heat dissipation. More than on via-hole interconnection connects at least two terminals with one another and two ferroelectric capacitor electrodes. A manufacturing method to reduce the decrease in resistivity is also suggested in which dopants are introduced, activated or removed from the ferromagnetic material. The dopants may be introduced into the grain boundaries of a polycrystalline ferroelectric material. Remnant polarization of the memory cells are improved.

Description

1 2436650 FeRAM fatigue improvement The present invention relates to

ferroelectric memories.

Ferroelectric random access memory (FeRAM) is a leading candidate for use in the replacement of current volatile computer memory, such as DRAM, with non-volatile memory. It has the advantages of having fast read and write properties, and of being highly re-writable, scalable and compatible with silicon technology -either in the form of a stand alone chip or embedded as part of a system on chip (SoC). Because of the huge market potential for non-volatile memory devices, FeRAM has attracted considerable interest both in terms of basic research and for commercial applications.

Cross point arrays can be used to form ferroelectric memory systems. An example of a ferroelectric memory is shown in Fig. 4, in which a plurality of rows of electrodes 1 Oa are provided under a ferroelectric film 20 and a plurality of columns of electrodes 1 Ob are provided above the ferroelectric film. In a manner well-known in the art, the rows and columns of electrodes can be addressed to polarise the ferroelectric material at the intersection between an addressed row and an addressed column, thereby writing data.

This data can subsequently be read by determining the polarisation of the ferroelectric material at the intersection between the addressed row and column.

More specifically, at each cross point, the top and bottom electrodes form a "bit" in a memory device, and can be read as a "1" or a "0" according to the spontaneous polarisation of the ferroelectric material. The spontaneous polarisation of a ferroelectric material is given by the value of the dipole moment per unit volume of material. In a ferroelectric material, the direction of the spontaneous polarisation can be switched by the electric field, and hence a polarisation hysteresis can be measured.

Thus, data storage in an FeRAM cell is realized by polarizing the ferroelectric thin film in one of two opposite polarization directions. The non-volatility is due to the non-zero remnant polarization of the ferroelectric material. Writing speed is limited fundamentally by material properties. For oxides of perovskite family, sub-nanosecond switching has been demonstrated.

However, read-out speed is usually reading method-dependent. Numerous schemes have been proposed for access of the stored data. They can be classified into two basic categories: charge approach and field approach.

Both approaches seek in some way to measure one of the electrical properties of a memory cell affected directly by the direction and value of its electrical remnant polarization.

To bring the FeRAMs into the full scale commercial market, it is necessary to fabricate them with desired reliability and performance at a reasonable cost.

A wide range of detailed studies is needed at each stage of development, from the properties of the ferroelectric materials to fabrication process integration. In contrast with some areas of microelectronics, the successful development of FeRAM is largely limited by the lack of a thorough understanding of the ferroelectric materials in use and hence by an inability to improve their properties (such as fatigue, imprint, leakage current, etc) to meet industry requirements.

In common with the general cross-point architecture described above, an FeRAM cell consists of a piece of ferroelectric material (usually in the form of thin film with a thickness in the order of 100 nm) as the central part of a ferroelectric capacitor (F-cap) or a ferroelectric field effect transistor (F-FET), depending on whether the charge or field approach is used as classified by the inventor in D. P. Chu, Ferroelectric random access memoty (FeRAM) cells and non-destructive read-out (NDRO), Proceedings of 3rd ECS International Semiconductor Technology Conference (ISTC 2004), Shanghai, China, September 2004, p. 94.

In an F-cap architecture, the ferroelectric is normally sandwiched between two metal electrodes, while in an F-EEl architecture, it is sandwiched between one metal electrode and a semiconductor acting as the other electrode. In both cases, the ferroelectric polarization in the FeRAM cell is usually switched during a write operation. In addition, when the charge approach is used the cell needs to be switched back after it has been read to maintain the original polarization (and hence information) stored in the cell. Thus, the cell has around a 50% chance of being switched to the opposite polarisation direction and back again during a read operation. An example of a standard commercial CMOS one transistor and one capacitor (iT/iC) ferroelectric memory cell is shown in Fig. 5. A bit of data can be stored in an F-cap in the form of spontaneous polarization direction by switching it to the corresponding direction. The transistor acts as a switch to allow the access of a selected memory "bit". Data readout from a selected ferroelectric F-cap in this circumstance is by the charge approach, done by examining the amount of switching charge involved when applying an external voltage to switch the spontaneous polarization to a known direction.

After a number of switching cycles, the value of remnant polarization will decrease. This phenomenon is called fatigue, which is usually an irreversible process. Clearly, it is vitally important to the reliability of the memory that the degree of fatigue -that is, the reduction of remnant polarization -is as small as possible after a given number of switching cycles. In other words, the fatigue cycle, which is the number of switching cycles before a device fails, should be as large as possible. For standard commercial FeRAM products, it is desirable for fatigue cycles to be in the range of 1010 to 1012 cycles. In order to support lifetime unlimited operation, a fatigue cycle as high as 1015 cycles is expected.

Lead Zirconate Titanate (PZT) is a well-known ferroelectric material and has a high degree of remnant polarisation compared with other known ferroelectric materials suitable for use in FeRAM. However, it tends to fatigue after only 106 switching cycles. Strontium Bismuth Titanate (SBT) has been developed as a ferroelectric material with improved fatigue properties -it tends to fatigue after 1012 switching cycles at room temperature. However, it has a degree of remnant polarisation 2 to 4 times lower than PZT, hence a 2 to 4 times larger F-cap is needed to provide a switching charge of the same level as PZT. This can be a significant disadvantage for high density memory devices. Therefore, alternative materials to SBT are required by industry in general.

Various approaches have been developed to lessen the reduction of remnant polarization reduction and increase fatigue cycles. There are two main approaches, both focused on the materials in use. One is to find a ferroelectric material with better fatigue properties, as evidenced by the development of Strontium Bismuth Titanate (SBT) and La-substituted Bismuth Titanate (BLT) as well as Nb-doped PZT, to replace the popular Lead Zirconate Titanate (PZT). The other is to use an electrode material of some different kind, such metallic oxides, e.g. LSCO instead of Pt, or a two-step deposited Pt electrode instead of a one-step deposited Pt electrode. Using the two approaches, the combination of ferroelectric and electrode materials will be optimized at the same time and the fatigue cycles at room temperature can be extended into a region of 1010 to 1012 cycles and above. However, it is strongly desired to further improve the fatigue property of an FeRAM cell and at the same time provide a high degree of remnant polarisation, preferably using alternative materials to SBT.

It is known that ferroelectric memories placed in an oven and operated at elevated temperatures have worse fatigue properties than those driven at ambient temperature. However, since commercial ferroelectric memories, such as in mobile phones and other hand held devices, are operated at ambient temperatures, this is not considered significant to the practical implementation of ferroelectric memories.

It is also known that CPUs heat up during operation. Consequently, fans and heat sinks are provided as a matter of routine in laptop and other computers to cool the CPU. However, neither conventional semiconductor memories nor FeRAM memories are known to heat up through operation and these components of computer systems are not cooled.

An object of the present invention is to improve the fatigue cycle of an FeRAM cell.

According to a first aspect of the present invention, there is provided a method of manufacturing a ferroelectric memory including a ferroelectric material, the method comprising: altering the ferroelectric material to reduce a decrease in resistivity of the ferroelectric material that results from at least one of polarization switching and temperature increase.

The step of altering may comprise one or more of introducing dopants into the ferroelectric material; activating dopants existing inside the ferroelectric material; removing dopants from the ferroelectric material; and introducing dopants into the grain boundaries of a polycrystalline ferroelectric material.

According to a further aspect of the present invention, there is provided a ferroelectric memory device comprising: a plurality of memory cells, each including a ferroelectric material; and means for dissipating heat generated by the ferroelectric material as a result of polarization switching.

According to another aspect of the present invention, there is provided a semiconductor device comprising a ferroelectric memory, the ferroelectric memory comprising a plurality of memory cells, each including a ferroelectric material; and the semiconductor device comprising means for dissipating heat generated by the ferroelectric material as a result of polarization switching.

According to a yet further aspect of the present invention, there is provided a ferroelectric material comprising dopants having the effect of reducing a decrease in resistivity of the ferroelectric material that results from polarization switching.

According to a yet further aspect of the present invention, there is provided a ferroelectric memory comprising a ferroelectric material as described above.

Thus, in one aspect the present invention seeks to improve the fatigue cycle, among other things, through fast heat dissipation or cooling in order to keep the temperature of the FeRAM cell at ambient or lower.

The present invention will now be described by way of example only, and with reference to the accompanying drawings, in which: Fig. 1 is a graph showing how the remnant polarisation and resistivity of a PZT ferroelectric thin film device vary with the number of switching cycles; Fig. 2 is a graph showing how the remnant polarisation and the temperature of a PZT ferroelectric thin film device vary with the number of switching cycles; Fig. 3 is a graph showing how the remnant polarisation of a cooled PZT ferroelectric film varies with the number of switching cycles; Fig. 4 is a schematic representation of a cross-point ferroelectric memory; and Fig. 5 is a schematic representation of a standard CMOS 11/ic ferroelectric memory of stacked capacitor architecture.

The inventor and his co-workers have previously developed a method to measure the bulk resistivity of a ferroelectric thin film sandwiched between two electrodes, as explained in D P Chu, et al, Temperature dependence of the ohmic conductivity and activation energy of Pbi+(Zro 3Ti0 7)03 thin films, Appi Phys Letts 79(4), 518-520 (2001).

The present invention is predicated on the subsequent discovery that there is a correlation between the film's bulk resistivity and the onset of a decrease in the remnant polarization during fatigue cycling. In particular, it has been found that the bulk resistivity rapidly drops several orders at a certain point before the polarization begins to decrease noticeably. An example measured on a PZT-type thin film with Pt top and bottom electrodes as a function of switching cycles under accelerated voltage is shown in Fig. 1.

More specifically, Fig. 1 shows the behaviour of the remnant polarisation and the bulk resistance of the cell under accelerated fatiguing conditions.

Typically, under normal use at ambient temperature a ferroelectric memory could be expected to be written and read at a rate of 1000 cycles per second (1kHz) using writing/reading pulses of approximately 2V. However, for accelerated fatiguing the memory cell used in Fig. 1 was cycled at ambient temperature at 1 0kHz using pulses of 4V. The number of switching cycles is shown in a logarithmic scale along the abscissa; the degree of remnant polarisation is shown in a linear scale along the left-hand ordinate; and the resistivity is shown in a logarithmic scale along the right-hand ordinate. The circles with arrows attached indicate which ordinate the respective lines should be read against. As can be seen from Fig. 1, the behaviour of the resistivity is closely tied to that of the remnant polarisation, with both beginning to drop at about 106 to 1 ü switching cycles, and tailing off sharply thereafter.

During read and write access to an FeRAM cell, the voltage and duty cycle of applied switching pulse are fixed. Therefore, the abrupt huge reduction of bulk resistivity will lead to significant increase in the generation of Joule heat during operation, resulting in a considerable rise of the device temperature.

An estimation of the temperature increase based on the resistance data in Fig. 1 and the specific heat of a PZT thin film element of the same size is shown in Fig. 2.

More specifically, Fig. 2 shows the number of switching cycles in a logarithmic scale along the abscissa; the degree of remnant polarisation in a linear scale along the left-hand ordinate; and the temperature in a logarithmic scale along the right-hand ordinate. Again, the circles with arrows attached indicate which ordinate the respective lines should be read against. For consistency, the modelling assumes accelerated fatiguing of the memory cell, with cycling at ambient temperature at 10kHz using pulses of 4V. Thus, the remnant polarisation shown in Fig. 2 is the same as that in Fig. 1.

Fig. 2 provides a clear indication of possible scenarios. The high temperature shown here is consistent with the observation of the delamination and blackening of the corresponding top Pt electrodes and surrounding areas after fatigue. Consequently, the fatigue process will be accelerated by this heating up effect due to the well-known fact of a smaller fatigue cycle when operating at a higher temperature.

It should be noted that the heating effect of cycling of a ferroelectric memory device on its fatigue behaviour has not been clearly addressed so far. In particular, contrary to the heating of CPUs through their operation, no heating of commercial ferroelectrjc memory devices solely through operation has previously been noted. This tallies with the horizontal portion of the temperature curve at below 1010 cycles shown in Fig. 2. However, the discovery underpinning the present invention demonstrates that although no heating effects occur for most of the operation of the device, after a predetermined number of switching cycles, the resistance of the ferroelectric material rapidly decreases by several orders and a correspondingly rapid heating effect is observed, this heating being inversely proportional to the resistance (P = V2/R, with a constant voltage).

It should be noted that this effect is entirely different to the effect observed in the heating of CPUs or other semiconductor chips, in which a voltage is applied across a substantially finite resistance of semiconductor silicon or metallic components and interconnections, which causes heating. As a doped semiconductor silicon or metallic component heats, the increase in temperature causes an increase in its resistivity.

The present invention is predicated on the discovery of a new factor contributing to the overall fatigue of a FeRAM cell through the self-heating effect as a result of the reduction of the resistivity of the ferroelectric element.

The present invention involves three new ways of improving the fatigue property of FeRAM.

The first is to use physical mechanisms in order to dissipate the heat generated in an FeRAM cell and keep its temperature as close as to the ambient temperature as possible, thus counteracting the self-heating effect that occurs as a result of the drop in resistivity. Exemplary mechanisms include heat sinks, enlarged metal plates at the side of or on a different level to the ferroelectric memory, and connections to such components using an increased number of metal or other heat conductive plugs from the top or bottom electrode. Since the F-cap type arrangement is normally fabricated by a back end process and positioned just underneath the surface passivation layer on a semiconductor chip, external attached heat dissipation elements, such as metal fingers and fans, can easily be employed.

The second way is to use physical mechanisms to keep the temperature of an FeRAM cell at a temperature lower than the ambient temperature, again counteracting the self-heating effect that occurs as a result of the drop in resistivity. Different cooling mechanisms, from internal semiconductor cooling elements to an external cooler, can be used.

In other words, based on the new understanding of the behaviour of ferroelectrjc materials gained by the present inventor, the present invention seeks to improve the fatigue performance of an FeRAM cell by facilitating fast heat dissipation from the device or keeping it at a constant ambient temperature or lower. Preliminary results are illustrated in Fig. 3, which shows the decrease in remnant polarisation of a PZT-type ferroelectric thin film device both with and without additional airflow cooling during fatiguing by cycling at ambient temperature at 100kHz using pulses of 6V. More specifically, noting that the abscissa uses a logarithmic scale, Fig. 3 confirms that the fatigue cycle (defined as 90% of the initial remnant polarization) can be increased by at least a factor of 5 by simply increasing the air circulation in a testing probe station. Such a result would be unexpected based on the conventional understanding of the behaviour of ferroelectric devices.

The third way of improving the fatigue property of FeRAM is to use microscopic mechanisms to counterbalance or slow down the decrease of the ferroelectric thin film resistivity when being fatigued. The introduction of new dopants through diffusion, the activation of existing dopants in the ferroelectric material, or the removal of dopants from the ferroelectric material can all be used to lessen or counterbalance the reduction in the resistivity of the ferroelectric material. The types of the dopant, either acceptors or donors, will depend on the sign of the majority charge carriers. The purpose is to limit the increase of the density of the thermal excited charge carriers when temperature increases and to reduce the mobility of the charge carriers, in order to prevent the rapid decrease in the resistance.

Furthermore, in the case of polycrystalline ferroelectric thin films, there are band gap states existing at the grain boundaries, which contribute to the increase of leakage current and hence the apparent reduction of resistivity.

The corresponding contribution can be significant at high temperature.

Dopant can also be introduced to passivate these band gap states and stabilise the total resistance.

There are a number of ways in which heat can be dissipated from ferroelectric memory such as FeRAM in order to keep its temperature at or close to ambient, or to cool it below ambient temperature. These include laying out the ferroelectric memory to enhance the heat dissipation or slow down the temperature increase. For example, the spacing between the memory cells can be increased, memory cells can be put on different layers, and extended electrodes can be used. Moreover, metal tracks to act as heat paths or heat sinks can be provided in the memory, between layers of the memory or between cells in individual layers.

In addition, the interconnections between different layers can be used as a means to enhance heat dissipation. In this context, more than one via-hole interconnection can be used to connect the same two terminals.

Furthermore, physical components can be embedded inside a ferroelectric memory, for the purpose of enhancing the dissipation of heat generated in the ferroelectric memory. For example, a component made of metal or a heat conductive non-metal could be used to act as a heat spreader, a heat sink or a radiator, or a micro-fluidic component can use liquid flow to carry away the heat generated.

Similarly, components attached to a semiconductor device containing ferroelectric memory can also be used for the purpose of enhancing the dissipation of heat generated in the ferroelectric memory. Preferably, such components are provided in the semiconductor device at a location adjacent the ferroelectric memory. Such components include fin structures, stacked fin structures, and heat sink lid structures. These components can be made of metal material or non-metal material with high heat conductance, such as AISiC material. In addition, device packaging and liquid flow components can be used to radiate, carry away or dissipate heat generated in the ferroelectric memory.

The above-mentioned components may be attached by surface mount technology (SMT).

The foregoing components have as their aim the dissipation of heat from a ferroelectric memory in order to keep the memory at as close as possible to ambient temperature. However, physical components can also be embedded inside a semiconductor device containing ferroelectric memory for the purpose of lowering the temperature of the ferroelectric memory below ambient. These include any component embedded in a semiconductor device containing ferroelectric memory which has a function of providing a path for heat flow from the ferroelectric memory to a heat sink at a temperature lower than that of the ferroelectric memory; a semiconductor cooling device embedded in the proximity of a ferroelectric memory; and a micro-fluidic component using liquid flow to lower the temperature of the said ferroelectric memory.

Physical components can also be attached to a semiconductor device containing ferroelectric memory, for the purpose of lowering the temperature of a ferroelectric memory cell or cells. These include any component attached to a semiconductor device containing ferroelectric memory which has a function of providing a path for heat flow from the ferroelectric memory to a heat sink at a temperature lower than that of the ferroelectric memory; a semiconductor cooling device attached to a semiconductor device containing ferroelectric memory; any component using liquid flow to lower the temperature of the said ferroelectric memory; any packaging which has a function of lowering the temperature.

Physical components not attached to a semiconductor device containing ferroelectric memory but having a function of enhancing the dissipation of heat generated in the ferroelectric memory can also be used. These include a fan for the purpose of increasing ambient airflow, as in Fig. 3, as well as a directed airflow. The ambient temperature can also be lowered, for example using air conditioning.

Chemical means can also be used to consume the heat generated in a semiconductor device containing ferroelectric memory. This could include liquid evaporation or the use of endothermic chemical reactions to absorb the heat generated by the ferroelectric memory.

The foregoing description has been given by way of example only. However, it will be appreciated by a person skilled in the art that modifications can be made within the scope of the present invention.

Claims

Claims 1. A method of manufacturing a ferroelectric memory including a

ferroelectric material, the method comprising: altering the ferroelectric material to reduce a decrease in resistivity of the ferroelectric material that results from at least one of polarization switching and temperature increase.

2. A method according to claim 1, wherein the step of altering comprises introducing dopants into the ferroelectric material.

3. A method according to claim 1, wherein the step of altering comprises activating dopants existing inside the ferroelectric material.

4. A method according to claim 1, wherein the step of altering comprises removing dopants from the ferroelectric material.

5. A method according to claim 1, wherein the step of altering comprises introducing dopants into the grain boundaries of a polycrystalline ferroelectric material.

6. A ferroelectric memory device comprising: a plurality of memory cells, each including a ferroelectric material; and means for dissipating heat generated by the ferroelectric material as a resu It of polarization switching.

7. A semiconductor device comprising a ferroelectric memory, the ferroelectric memory comprising a plurality of memory cells, each including a ferroelectric material; and the semiconductor device comprising means for dissipating heat generated by the ferroelectric material as a result of polarization switching.

8. A device according to claim 6 or claim 7, wherein the memory cells are deposited on a layer of material with matching heat transfer index.

9. A device according to any one of claims 6 to 8, wherein a layer of material with matching heat transfer index is deposited on the memory cells.

10. A device according to any one of claims 6 to 9, wherein the memory cells are disposed on different layers.

11. A device according to any one of claims 6 to 10, wherein interconnections between the different layers enhance heat dissipation.

12. A device according to any one of claims 6 to 11, wherein more than one via-hole interconnection connects at least one of two terminals with one another and two ferroelectric capacitor electrodes with one another.

13. A device according to any one of claims 6 to 12, wherein the means for dissipating heat comprises a component acting as at least one of a heat spreader and a heat sink.

14. A device according to any one of claims 6 to 13, wherein the means for dissipating heat comprises at least one of a fluidic and a micro-fluidic component using liquid flow to carry away the heat generated.

15. A device according to any one of claims 6 to 14, wherein the means for dissipating heat comprises a means for lowering the temperature of the ferroelectric memory below ambient.

16. A device according to any one of claims 6 to 15, wherein the means for dissipating heat comprises a path for heat flow from the ferroelectric memory to a heat sink at a temperature lower than that of the ferroelectric memory.

17. A device according to any one of claims 6 to 16, wherein the means for dissipating heat comprises a fan for the purpose of increasing ambient airflow.

18. A device according to any one of claims 6 to 17, wherein the means for dissipating heat comprises a chemical means.

19. A ferroelectric material comprising dopants having the effect of reducing a decrease in resistivity of the ferroelectric material that results from polarization switching.

20. A ferroelectric material according to claim 19, wherein the dopants are activated.

21. A ferroelectric material according to claim 19 or claim 20, wherein the ferroelectric material comprises at least one of PZT, SBT and BLT.

22. A ferroelectric memory comprising a ferroelectric material according to any one of claims 19 to 21.