GB2436169A - Creation of copper filled blind vias using laser ablation in a double sided PCB - Google Patents
Creation of copper filled blind vias using laser ablation in a double sided PCB Download PDFInfo
- Publication number
- GB2436169A GB2436169A GB0604588A GB0604588A GB2436169A GB 2436169 A GB2436169 A GB 2436169A GB 0604588 A GB0604588 A GB 0604588A GB 0604588 A GB0604588 A GB 0604588A GB 2436169 A GB2436169 A GB 2436169A
- Authority
- GB
- United Kingdom
- Prior art keywords
- copper
- printed circuit
- double sided
- circuit board
- creation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000010949 copper Substances 0.000 title claims abstract description 28
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 21
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 21
- 238000000608 laser ablation Methods 0.000 title abstract description 5
- 230000017525 heat dissipation Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000004593 Epoxy Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 abstract description 2
- 238000007747 plating Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 3
- 239000000945 filler Substances 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 208000013201 Stress fracture Diseases 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Laser ablation of copper and epoxy/glass on a double sided laminate is performed from one side and stopped with high accuracy at the base of the bottom copper thus creating a blind hole. When metallised and electroplated, this connects the top copper to bottom copper but leaves a flat surface on one side of the printed circuit board. This is then advanced further by filling the blind hole with copper using a specially developed plating solution hence making the interconnect from top to bottom and leaving both surfaces flat.
Description
<p>cREATION OF COPPER FILLED BLIND VIAS</p>
<p>USING LASER ABLATION IN A DOUBLE SIDED PCB</p>
<p>This invention relates to a method and process of producing a copper filled blind via within a double sided printed circuit board using laser ablation.</p>
<p>As electronics become greater in density and the use of fine pitch components push the boundaries of conventional design and layout techniques the use of laser and microvia (laser ablated hole) are becoming standard on HDI (high density interconnect) printed circuit boards.</p>
<p>The invention described is a method and process to enable laser ablation of copper and epoxy/glass on a double sided laminate from one side and stopping with high accuracy at the base of the bottom copper thus creating a blind hole and when metallised and electroplated connects the top copper to bottom copper but leaves a flat surface one side of the printed circuit board, this is then advanced further by filling the blind hole with copper using a specially developed plating solution hence making the interconnect from top to bottom and leaving both surfaces flat.</p>
<p>This invention gives a starting point for Increased development of microvia tower (microvia's placed on top of each other within a multilayer construction) but using copper as the filler at each stage as apposed to other non conductive or conductive matter. The advantage of using copper as the filler material is that other material has a different coefficient of thermal expansion that would cause stress fractures during printed circuit board assembly.</p>
<p>The invention will now be described solely by way of examples and with reference to the accompanying drawings in which: Figure 1) Shows the selection of the base material that's using a 0.1mm thick central core clad with 1 2im (top) /1 7im (bottom) Cu.</p>
<p>Figure 2) Shows the laser ablating from the 1 2iim Cu depth and controlled to stop at the base of the 1 Cu.</p>
<p>Figure 3) Shows the first pass of metallization of electroless Cu and panel plate.</p>
<p>Figure 4) Shows the flat pad on one side completed by imaging pattern and standard pattern plate of laser ablated holes followed by etching.</p>
<p>Figure 5) Shows the creation of the flat pad on the top and bottom of a double sided printed circuit board, the laser ablated holes are imaged with a button plate image followed by via filled Cu plate. To complete this process the double sided printed circuit board will undergo process 3) as highlighted above with the button plate image on selective vias only followed by Cu fill. Planerisation then takes place to remove excess Cu on surface layers to enable an even flat finish on both sides.</p>
<p>Figure 6) Shows the final process that's completed by imaging the pattern followed by standard pattern plate and etch.</p>
Claims (2)
- <p>CLAIMS</p><p>1. A creation of a copper filled blind via within a double sided printed circuit board allows printed circuit board designers to use via in pad for fine pitch and micro BGA's (Ball grid array)
- 2. A creation of a copper filled blind via within a double sided printed circuit board allows EMS (electronic manufacturing service) providers to use via in pad for fine pitch and micro BGA's without the added concern of air voids within the via in pad during printed circuit board assembly.</p><p>3. A creation of a copper filled blind via within a double sided printed circuit board allows greater product reliability due to copper density and conductivity.</p><p>4. A creation of a copper filled blind via within a double sided printed circuit board allows heat dissipation from the BGA component through a copper medium to base layer.</p>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0604588A GB2436169A (en) | 2006-03-07 | 2006-03-07 | Creation of copper filled blind vias using laser ablation in a double sided PCB |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0604588A GB2436169A (en) | 2006-03-07 | 2006-03-07 | Creation of copper filled blind vias using laser ablation in a double sided PCB |
Publications (2)
Publication Number | Publication Date |
---|---|
GB0604588D0 GB0604588D0 (en) | 2006-04-19 |
GB2436169A true GB2436169A (en) | 2007-09-19 |
Family
ID=36241139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0604588A Withdrawn GB2436169A (en) | 2006-03-07 | 2006-03-07 | Creation of copper filled blind vias using laser ablation in a double sided PCB |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2436169A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111447758A (en) * | 2020-03-10 | 2020-07-24 | 深南电路股份有限公司 | Circuit board hole filling method and circuit board |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6518182B1 (en) * | 1999-11-12 | 2003-02-11 | Ebara-Udylite Co., Ltd. | Via-filling process |
US20030106802A1 (en) * | 2001-05-09 | 2003-06-12 | Hideki Hagiwara | Copper plating bath and plating method for substrate using the copper plating bath |
WO2004057061A1 (en) * | 2002-12-20 | 2004-07-08 | Atotech Deutschland Gmbh | Mixture of oligomeric phenazinium compounds and acid bath for electrolytically depositing a copper deposit |
US20050037608A1 (en) * | 2003-08-13 | 2005-02-17 | Ibm | Deep filled vias |
-
2006
- 2006-03-07 GB GB0604588A patent/GB2436169A/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6518182B1 (en) * | 1999-11-12 | 2003-02-11 | Ebara-Udylite Co., Ltd. | Via-filling process |
US20030106802A1 (en) * | 2001-05-09 | 2003-06-12 | Hideki Hagiwara | Copper plating bath and plating method for substrate using the copper plating bath |
WO2004057061A1 (en) * | 2002-12-20 | 2004-07-08 | Atotech Deutschland Gmbh | Mixture of oligomeric phenazinium compounds and acid bath for electrolytically depositing a copper deposit |
US20050037608A1 (en) * | 2003-08-13 | 2005-02-17 | Ibm | Deep filled vias |
Non-Patent Citations (2)
Title |
---|
Atotech Global: "Via Filling- Technologies for Acid Copper Via filling" * |
Dow et al; "Interactions between brightener and chlorine ions on copper electroplating for laser-drilled via-hole filling" * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111447758A (en) * | 2020-03-10 | 2020-07-24 | 深南电路股份有限公司 | Circuit board hole filling method and circuit board |
CN111447758B (en) * | 2020-03-10 | 2021-08-03 | 深南电路股份有限公司 | Circuit board hole filling method and circuit board |
Also Published As
Publication number | Publication date |
---|---|
GB0604588D0 (en) | 2006-04-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |