GB2425895A

GB2425895A - Registration structure for aligning components on a substrate

Info

Publication number: GB2425895A
Application number: GB0504577A
Authority: GB
Inventors: Terry Bricheno
Original assignee: Afonics Fibreoptics Ltd
Current assignee: Afonics Fibreoptics Ltd
Priority date: 2005-03-04
Filing date: 2005-03-04
Publication date: 2006-11-08
Also published as: GB0504577D0

Abstract

Components such as optical components are accurately aligned on a substrate by engagement with alignment features formed on the substrate. Substrate 1 is coated with a layer of SU-8 2000 (RTM) photoresist 26 by e.g. spin coating. The photoresist is then baked, a negative mask 28 is applied, and the photoresist is irradiated with UV light. The photoresist is then developed and unwanted portions are removed. The portions of photoresist remaining have sufficient size and strength to act as registration features for the alignment of circuit components on the substrate. The alignment structures are particularly useful for hybrid optical circuits.

Description

I

LAYOUT ASSEMBLY AND METHOD

The present invention relates to a layout assembly and method of forming a layout assembly for locating circuit components on a substrate. In particular, but not exclusively, to locating optical components onto a silicon optical bench providing a silicon opto-hybrid circuit module.

Silicon opto-hybrid photonic modules comprise optical and active components distributed across and supported by a silicon substrate which acts as an optical bench.

The optical components are generally mounted on the substrate using surface mount technologies such as flip-chip bonding and re-flow soldering. Components may also be fixed to the substrate using an epoxy. Active components may be built into the silicon substrate itself, or more commonly mounted onto the silicon substrate or mounted onto silicon daughterboards that are then mounted onto the silicon substrate motherboard.

The optical and active components need to be carefully aligned and precisely located. However, flip-chip bonding techniques and re-flow soldering often results in movement of the components during the soldering process after their having been accurately located on the substrate. Consequently, the components become misaligned to the detriment of the optical circuit functionality. . Position alignment trenches may be cut into the silicon substrate, but is difficult to accurately locate, align and form a suitable profile for the cuts with a cutting tool, for example a saw. Although it may be possible to etch position features into the silicon substrate itself, such features would be recessed in the silicon substrate and would require complementary protrusions from the component in order to accurately locate them. This increases the complexity of the circuit and component design, and therefore increases the complexity and consequently the cost of manufacturing the module. 2 -

Aspects and embodiments of the present invention were devised with the foregoing in mind.

Viewed from a first aspect the present invention provides a layout assembly for a silicon opto-hybrid circuit comprising a substrate for supporting components in a circuit configuration. The assembly further comprises one or more photo-resist features having sufficient postprocessed mechanical stability and strength to provide position registration features for said circuit components, the photo-resist features being arranged to locate the components in a circuit configuration.

The photo-resist position registration features may be created using photo- lithographic techniques which enables sub-micron position accuracy. In addition, photo- lithographic techniques for creating photo-resist patterns on substrates are an industrially scalable technique which makes it suitable for volume production of hybrid circuits.

Furthermore, the processing of photo-resist is a relatively simple process of forming a photo-resist layer, exposing the layer and dissolving away the unwanted photo-resist.

Sufficient mechanical strength for the position registration may be achieved by ensuring that the photo-resist features have a suitable aspect ratio. That is to say their width to height ratio is such that they provide firm mechanically stable features. This provides for flexibility in the inherent post-processed mechanical strength of the chosen photo-resist since an appropriate aspect ratio and feature size may be chosen depending upon the inherent mechanical strength of the photo-resist being used.

Typically the photo-resist is of a type which has sufficient postprocessed mechanical strength to be self-supporting to a height which is sufficient to provide position registration of the components, for example sufficiently strong to form features which protrude tens or hundreds of micrometres from the substrate surface. Such a photo-resist may of a type which is suitable for the deep etch applications generally required for Micro-Engineered Mechanical Systems (MEMS), and which may form an epoxy-like substance post-processing.

A particularly suitable photo-resist is of a type known as the SU-8 family of photo-resist, which is a commercially available deep etch photo- resist material. t

Viewed from a second aspect the present invention comprises a hybrid circuit including a layout assembly such as described above and circuit components which abut one or more post-processed photo-resist feature for position registration. In particular, a hybrid circuit may comprise an optical component where the hybrid circuit is a silicon opto-hybrid circuit.

Further aspects, embodiments and advantages of the present invention will become apparent from the following specific description.

Specific embodiments in accordance with the present invention will now be described, by way of example only, and with reference to the drawings, in which:- FIG. 1 is a schematic illustration of an optical triplexer silicon opto- hybrid circuit; FIG. 2 illustrates the processing steps for forming photo- resist position registration features in accordance with an aspect of the present invention; FIG. 3 is a schematic illustration of a substrate having a photo-lithographic mask placed over a negative resist for creating position registration features in accordance with an embodiment of the present invention; FIG. 4 schematically illustrates photo-resist position registration features on a substrate; FIG. 5 schematically illustrates a triplexer arrangement in which circuit components are abutted against position registration features in accordance with an embodiment of the present invention; FIG. 6 is a perspective view showing a partial circuit configuration having circuit components abutting position registration features in accordance with an embodiment of the present invention; FIG. 7(a) is a table of thickness versus spin speed data for selected SU-8 2000 resist; FIG. 7(b) is a graph of spin speed versus thickness curves for selected SU-8 2000 resist; FIG. 8(a) is a table of recommended soft bake parameters for selected SU-8 2000 resist; FIG. 8(b) is a graph of SU-8 2000 exposures times against field thickness; FIG. 9(a) is a table illustrating recommended post exposure bake parameters; and FIG. 9(b) is a table of recommended development times for selected SU-8 resist.

In accordance with an embodiment of the present invention SU-8 2000 photoresist is used to form position registration features. SU-8 2000 is available from Microchem Corporation of Newton, Massachusetts, USA. SU-8 2000 is an epoxy-based negative resist which can form a single film thickness in a range less than 1 micron to greater than 200 microns. It is sensitive to near UV radiation, is capable of forming images with straight sidewalls and is thermally stable.

An embodiment in accordance with the present invention will now be described with reference to an optical triplexer arrangement as an illustrative example of a silicon opto-hybrid circuit. The layout of the triplexer is illustrated in FIG. 1. The triplexer arrangement illustrated in FIG. 1 relates to a novel and inventive triplexer arrangement disclosed in a copending GB patent application filed on even date herewith by the applicant. Full details and description of this novel and inventive triplexer arrangement are not required for the purposes of illustrating this embodiment of the present invention.

The triplexer comprises a silicon optical bench I upon which is mounted a daughterboard 2 supporting photo- diodes 8 and 10, and having a groove etched to support an optical fibre cable 4 which is terminated in a lens 6. A typical lens is of the type known as an Opti-focusTM lens fibre available from Coming, Inc. Partial reflector elements 12 and 14 are located along an optical axis of the triplexer and arranged to reflect light emitted from lens 6. A second daughterboard 16 supports a further support structure 18 for a collimating means 20 which receives light from laser 22 and radiates it along the optical axis such that it passes through the partially transmitting mirrors 14 and 12 and into lens 6 for transmission along an optical network via optical fibre 4.

Embodiments in accordance with the present invention are suitable for providing position registration features on the silicon substrate 1 for accurate registration and alignment of the components.

A process for forming position registration features in accordance with an embodiment of the present invention will now be described with reference to FIG. 2. The material used for the position registration features in the present embodiment is one of the SU-8 2000 family of negative photo-resist available from Microchem Corporation of Newton, Massachusetts, USA. Substrate 1 is pretreated in order to maximize the process reliability, and is cleaned and dried prior to applying the SU-8 2000 photo-resist.

Substrate I is cleaned by using a solvent for rinsing with a dilute acid followed by a de- ionised water (DI) water rinse. For optimum pretreatment the substrates may be subjected to a so-called piranha etch - clean (H2S04 and H202). The surface of the substrate I is dehydrated by baking at 200 C for 5 minutes on a contact hot plate or 30 minutes in a convection oven.

The SU-8 2000 resist 26 is deposited on substrate 1 by spin coating. The film thickness depends upon the viscosity of the SU-8 2000 resist and spin speed. FIG 7(a) illustrates a table showing thickness versus spin speed for selected SU-8 2000 resists, and FIG. 7(b) illustrates a graph of spin speed versus thickness curve for those selected SU-8 2000 resists.

After the resist has been applied it is soft baked in order to evaporate the solvent and to densify the film. It is normally baked on a level hot plate although convection ovens may be used.

If a film thickness thicker than that generally achievable by the selected SU-8 2000 photo-resist is desired then the spin coating process can be repeated until the desired film thickness is achieved. Typically, thicknesses in the range of tens to hundreds of micrometres are formed.

FIG. 8(a) illustrates a table of the parameters for the soft bake step. As will be seen from FIG. 8(a) a lower initial pre-baked temperature is used in order to allow solvent to evaporate out of the film at a more controlled rate than would be the case for a hotter temperature, thereby resulting in better coating fidelity, reduced etch bleeding, and better resist-to-substrate adhesion. The parameters illustrated in the table of FIG. 8(a) are for a contact hot plate process.

The next step is to expose the resist. A negative mask 28 is placed over the resist 26 and UV (350-400 nanometres) light is radiated onto the mask. For optimal performance, wavelengths shorter than 350 nanometres should be filtered out. FIG. 8(b) illustrates a graph of SU-8 2000 exposure against film thickness. Once the required exposure time has expired the mask 28 may be removed and a post-exposed bake (PEB) is performed in order to selectively cross-link the exposed portion of the film. Again, the bake can be performed either on a hot plate or in a convection oven. The bake recommendations are illustrated in the table of FIG. 9(a). Again, a twostep bake process is used, with a lower temperature as the initial phase in order to minimize stress, wafer bowing, and resist cracking. It is also advisable to avoid rapid cooling after the PEB.

The SU-8 2000 resist is then developed either by immersion, spray or spray- puddle process. A particularly suitable developer is Microchem's SU-8 developer although other solvent based developers such as ethyl lactate and diacetone alcohol may also be used. For high aspect ratio andlor thick film structures the developer should be strongly agitated. Recommended developer times are illustrated in FIG. 9(b) for the selected SU-8 2000 resist.

After exposure the substrate is rinse, for example in isopropyl alcohol (IPA), and then dried in a gentle stream of air or nitrogen.

In order to further improve the mechanical properties of the SU-8 2000 resist a hard bake at between 150 to 200 C on a hot plate or in a convection oven may be carried out. Removal may be further effected by the use Microchem's Omni CoatTM. Other removal processes include immersion in oxidizing acid solutions such as piranha etch/clean, plasma ash, RIE, laser ablation and pyrolysis. Typically, the removal solvent is placed in a bath heated to between 50 to 80 C and the substrate is immersed in the solvent for 30 to 90 minutes. The actual time required for stripping the unexposed photo- resist depends upon the resist thickness and its cross link density. Once the unexposed photo-resist has been removed a substrate such as illustrated in FIG. 2(c) should be formed having mechanically strong and thermally stable photo-resist features 26 formed on the substrate 1.

FIG. 3 illustrates the process step illustrated in FIG. 2(b) performing position registration features in accordance with one embodiment of the present invention. FIG. 3 is a plan view of a substrate having photoresist film deposited on it and a negative mask 28 overlaying the photo-resist film. The portions of the photo-resist which are to form the position registration features are visible as diagonally hatched regions 30, 32, 34, 36, 38, 40 and 42. The arrangement illustrated in FIG. 3 is irradiated with UV radiation, typically in the 350 nanometre to 400 nanometre range, and the registration feature formation processes described with reference to FIG. 2 above are continued until a substrate I is formed with photo- resist position registration features formed on it as illustrated in FIG. 4.

Each of the photo-resist position registration features 30, 32, 34, 36, 38, 40 and 42 now formed on substrate 1 are used to locate and align components for the silicon opto- hybrid triplexer module formed using an embodiment of the present invention. The various components are placed on substrate 1 against their position registration features as illustrated in FIG. 5. The daughterboard 2 carrying the optical fibre 4 and lens 6, together with photo diodes 8 and 10 is placed against position registration features 40 and 42. Mirrors 12 and 14 are abutted against registration features 34, 36 and 38, whilst the daughterboard 16 abuts registration features 30 and 32. In the described embodiment the laser diode 22 does not utilize position registration features since its precise position is non-critical, and conventional techniques such as epoxy-bonding or solder bonding may be used without having to use fixed position registration features to compensate for any movement during fixation. The position registration features allow bonding techniques such as epoxy-bonding or solder bonding to be used for mounting components having critical positioning, since movement during fixation is inhibited thereby maintaining the position and alignment of the components.

A perspective view of a triplexer in accordance with embodiments of the present invention is illustrated in FIG. 6 in order to further illustrate the inventive concept. For clarity not all components are illustrated in the perspective view. Generally the position registration features are lower than the components which allows, for example, the lens 6 to protrude out of the daughterboard support 2 without interference from position registration feature 40. Likewise the position registration features 32, 34, 36 and 38 which are generally along the optical axis of the triplexer are at a height below the propagation of the optical signal in order to avoid any interference therewith.

9 - - -. -- It will be evident to a person of ordinary skill in the art that various modifications and variants may be made in the described embodiments. For example, although embodiments of the present invention have been illustrated by way of the SU-8 2000 resist family other suitable photo- resists and photo-sensitive materials may be used to create the position registration features. A key requirement is that such material has good mechanical strength and thermal stability, and may be accurately located. It should be noted that there is a margin of tolerance on the side walls of the registration features which do not necessarily have to be absolutely straight. For example, it is common for deep-etch photo-resist materials, such as SU-8 2000 resist, to be broader at their base than their top due to the attrition of the upper resist during the resist removal process. Thus, the registration features are formed such that it is the lower part of the registration features which provide the accurate alignment. If it is known how the material used for the registration features is formed then the broadest part, be it the bottom, around the middle or at the top can be used to provide the appropriate registration and alignment.

Furthermore, although the specific embodiment described herein relates to a silicon opto- hybrid triplexer, and it will be evident to the skilled person that other forms of opto- hybrid circuit may be formed and that the techniques described herein are not limited to opto-hybrid circuitry but to other forms of circuitry which require position registration of components.

The scope of the present disclosure includes any novel feature or combination of features disclosed therein either explicitly or implicitly or any generalisation thereof irrespective of whether or not it relates to the claimed invention or mitigates any or all of the problems addressed by the present invention. The applicant hereby gives notice that new claims may be formulated to such features during the prosecution of this application or of any such further application derived therefrom. In particular, with reference to the appended claims, features from dependent claims may be combined with those of the independent claims and features from respective independent claims may be combined in any appropriate manner and not merely in the specific combinations enumerated in the claims.

Claims

CLAIMS: I. A layout assembly for a hybrid circuit comprising; a substrate

for supporting components in a circuit configuration; one or more photoresist features having sufficient post-processed mechanical stability and strength to provide position registration features for said circuit components and arranged for locating said components in said circuit configuration.
2. A layout assembly according to claim 1, wherein said photo-resist features have an aspect ratio which provides said sufficient mechanical strength for said position registration.
3. A hybrid circuit layout assembly according to claim 1 or 2, wherein said photo-resist is of a type having sufficient post-processed mechanical strength to be self- supporting to a height sufficient to provide said position registration.
4. A layout assembly according to any preceding claim, wherein said photoresist is of a type for deep etch applications.
5. A layout assembly according to any preceding claim, wherein said photoresist is of a type which forms an epoxy-like substance post-processing.
6. A layout assembly according to any preceding claim, wherein said photoresist is of a type known as SU8TM.
7. A hybrid circuit comprising a layout assembly according to any preceding claims and a circuit component in position registration abutting a photo-resist feature. 12 -
8. A hybrid circuit according to claim 7, wherein said circuit component is an optical component.
9. A hybrid circuit according to claim 8, wherein said hybrid circuit is a silicon opto-hybrid circuit.
10. A layout assembly substantially as hereinbefore described and with reference to the drawings.
11. A hybrid circuit substantially as hereinbefore described and with reference to the drawings.
12. A method for forming position registration features for a hybrid circuit, comprising: forming a photo-resist film on a substrate; placing a mask having an image corresponding to one or more position registration features in front of said photo-resist film; exposing said photo-resist through said mask; developing exposed photo-resist; and removing unwanted photo-resist thereby forming said position registration features on said substrate.
13. A method for forming position registration features for a hybrid circuit substantially as hereinbefore described and with reference to the drawings.