GB2420458A

GB2420458A - Envelope detector circuit for an automatic gain control

Info

Publication number: GB2420458A
Application number: GB0425566A
Authority: GB
Inventors: David Murdoch
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 2004-11-19
Filing date: 2004-11-19
Publication date: 2006-05-24
Anticipated expiration: 2024-11-19
Also published as: GB0425566D0; GB2420458B

Abstract

An envelope detector circuit has an input C1 and an output capacitor C2 whose values are chosen so that sensitivity to transients is controlled by charge transfer from the input capacitor to the output capacitor. Sensitivity resistor R2 (which formed a filter with C2 in prior art) is then no longer necessary (fig.3), saving component and placement costs.

Description

ENVELOPE DETECTOR CIRCUIT

This invention relates to a circuit for use in dynamic gain control. Typically in such a circuit, a fluctuating signal, eg audio, is applied to the circuit input and the circuit output is applied to the control input of a gain control circuit to control the gain of an amplifier. Such circuits are commonly referred to as "envelope detectors". Specific types are also called "peak detectors" In the present context the expression "envelope detector" is intended to encompass "peak detector".

The purpose of an envelope detector in the application described above is to vary the gain of the amplifier according to amplitude variations in the input signal whilst avoiding sensitivity to transient signals or spikes. Thus, such circuits often act as filters, rejecting high frequency components.

Figure 1 illustrates an envelope detector in use in a gain control circuit for a loudspeaker. Here, an audio signal output from source 1 is output to amplifier 2, amplified and applied to speaker 3. The source 1 may be a music integrated circuit or digital signal processing system providing a music or noise file output. The gain of amplifier 2 is controlled by an analogue IC 4. The analogue IC 4 receives an ADC control input from envelope detector 5. Envelope detector 5 is connected in a feed back loop from the amplifier 2 and hence its input is taken from the amplifier output.

A typical envelope detector circuit is illustrated in Figure 2. As shown, the input voltage is applied across input capacitor C2 and biasing resistor Ri. The voltage across biasing resistor Ri is applied to sensitivity resistor R2 and storage capacitor C2. Current is conducted to storage capacitor C2 via diode Dl. The voltage across C2 is applied to load Z which represents the input impedance of the analogue IC 4 of Figure 1. In this arrangement, storage capacitor C2 and resistor R2 form a filter whereby high frequency transients in the input signal do not affect the gain control.

The present invention has been devised as a discrete component circuit for a mobile telephone device. Hitherto dynamic gain control has not generally been used.

However, it has been found to be desirable in order to accommodate unknown input signals such as ringtones downloaded from external sources.

C

In the design of hand-held electronic devices the constant pressure to reduce the size and weight of the devices has resulted in the removal of many standard components.

Where components are sacrificed to achieve reductions of cost, weight or volume, however, unacceptable loss of performance can sometimes occur. It is an object of the present invention to achieve a component reduction and increasing reliability without loss of performance.

The present invention provides an envelope detector circuit having input terminal and output terminals, input capacitance and biasing resistance in series across the input terminals, output capacitance across the output terminals for applying an output voltage to a load connected across the output terminals and means arranged between the input and output capacitance to conduct charge from the input capacitance to the output capacitance only, in which the input capacitance is smaller than the output capacitance and the sensitivity of the circuit to high frequency input signals is controlled by transfer of charge from the input capacitance to the output capacitance.

As a result of the effect of charge transfer a sensitivity resistor is no longer required and can be omitted altogether, enabling direct transfer of charge from the input capacitor to the output capacitor.

The circuit of the invention may be incorporated in a chip but where cost, availability or size dictate, discrete components may be used. It is here that the invention is most beneficial since it reduces component count as well as placement cost and space.

Other preferred features of the invention are described in the attached subsidiary claims.

An embodiment of the invention will now be described by way of example only and with reference to the accompanying drawings in which: Figure 1 shows a typical application of an envelope detector in speaker gain control; Figure 2 is a circuit diagram of a prior art envelope detector circuit; Figure 3 is a circuit diagram of a gain control circuit according to the invention; and Figures 4 to 7 are graphs showing responses of different envelope detector circuits in order to illustrate the advantages of the invention.

C

The circuit diagram of Figure 3 is identical to that of Figure 2 except that the sensitivity resistor R2 has been removed. As the following explanation will show, the relative values of the capacitors Cl and C2 can be selected to reject high frequency components without the need for this resistor.

Consider firstly the graphs of Figures 4 to 7. In each graph, the upper light gray trace is an input test signal and the lower darker gray trace is the output.

Figure 4 shows the response of the circuit of Figure 3 with component values Cl = lOOnF, C2 = luF, Ri = IM Ohm and R2 = 20k Ohms.

The dark gray traces show the transient response of the peak detector with a resistor in series with the storage capacitor. As can be seen, there is a distinct slope on the rising edge which is caused by the resistor. This resistor is used to reject high frequency components such as spikes to ensure the peak detector provides a nice average level.

Figure 5 shows the response of the same circuit with the sensitivity resistor R2 removed and the remaining component values unchanged. Here, the slope of the detector response has increased dramatically, showing a greater sensitivity to spikes and sudden changes in amplitude. This is undesired.

Figure 6 shows the response of a circuit with component values Cl = 1 OnF, C2 = luF, Ri = 1M Ohm and R2 = 0 Ohms (ie sensitivity resistor R2 removed). In other words, the input capacitor has been reduced to 1/100 of the storage capacitor value, whereby it can transfer only 1/100 of the maximum charge of the storage capacitor per cycle of waveform. This has the effect of slowly building the voltage on the storage capacitor and the result is a reduced slope of the detector response and hence less sensitivity to transients. This represents improved performance even over the circuit of Figure 4.

Figure 7 shows the results obtained with component values Cl = 470nF, C2 = I uF, RI = 1M Ohm and R2 = 0 Ohms. This shows that if the input capacitor is increased to 470nF as opposed to lOnF, the transient response becomes very fast once more. This is evident from a comparison of the rising edges of the output signals in Figures 6 and 7.

With Cl having only half the value of C2, only two cycles of waveform will transfer the complete charge to C2.

The charge transfer idea works as follows. Assume Cl = 1 OnF and C2 = I uF and resistor R2 is removed as in the circuit of Figure 3.

A fixed peak voltage is applied for one cycle to Cl. The A charge on the plates of Cm can be found from the equation Q=CV (1).

So, for lOnF capacitor and lVrms applied we have Q = lOnF x lVrms lOnC.

This AQ is transferred through Dl and onto the positive plate of Cout. If we neglect the effects of the diode forward voltage for simplicity, we see that from (1) the AV on C2 is: V=Q/C Therefore, the voltage on C2 rises by V - lOnC/luF = 0.0 1V.

So, for a cycle of lVrms, we have increased the C2 plate potential by just 0.O1V.

It will therefore take 100 cycles of input voltage for the output voltage to reach 1V.

It can therefore be seen that by adjusting the ratio of Cl to C2, we can adjust the sensitivity of the detector to transients and high frequencies without the need for an RC network. In other words, the ratio can be chosen to emulate the effect of the sensitivity resistor in terms of rejection of transients. In an audio circuit the aim would be to reject components above 20 kiloHertz. However, in contrast to the prior art circuit, with R2 removed there is no filtering effect and high frequency steady state signals are not completely excluded.

The principle described above can be used in any system requiring gain control and the sensitivity of the circuit to high frequency components is controlled by the transfer of charge from the input capacitance to the output capacitance.

Claims

CLAIMS: I. An envelope detector circuit having input terminals and output

terminals, input capacitance and biasing resistance in series across the input terminals, output capacitance across the output terminals for applying an output voltage to a load connected across the output terminals and means arranged between the input and output capacitance to conduct charge from the input capacitance to the output capacitance only, in which the input capacitance is smaller than the output capacitance and the sensitivity of the circuit to high frequency input signals is controlled by transfer of charge from the input capacitance to the output capacitance.
2. A circuit as claimed in claim 1 having a single input capacitor between the input terminals.
3. A circuit as claimed in claim I or 2 having a single biasing resistor connected between the input terminals.
4. A circuit as claimed in claim 1, 2 or 3 including a single output capacitor connected between the output terminals.
5. A circuit as claimed in any preceding claim in which charge is conducted directly from the input capacitor to the output capacitor.
6. A circuit as claimed in any preceding claim in which the ratio of input to output capacitance is less than or equal to 0.1.
7. A circuit as claimed in claim 6, in which the ratio of input to output capacitance is less than or equal to 0.01.
8. A circuit substantially as hereinbefore described with reference to the accompanying drawings.
9. A circuit for controlling the audio output of an electronic device comprising a signal source and an amplifier coimected to the audio source in which the gain of the amplifier is dynamically controlled by a envelope detector as claimed in any preceding claim.
10. A mobile communication device having an audio output controlled by a circuit as claimed in claim 9.

10. A mobile communication device having an audio output controlled by a circuit as claimed in claim 9.

Amendments to the claims have been filed as follows CLAIMS: I. An envelope detector circuit having Input terminals and output terminals, input capacitance and biasing resistance in series across the input terminals, output capacitance across the output terminals for applying an output voltage to a load connected across the output terminals and means arranged between the input and output capacitance to conduct charge from the input capacitance to the output capacitance only, in which the input capacitance is smaller than the output capacitance and the sensitivity of the circuit to high frequency input signals is controlled by transfer of charge from the input capacitance to the output capacitance.

2. A circuit as claimed in claim I in which the number of capacitors connected between the input terminals is one.

3. A circuit as claimed in claim I or 2 in which the number of biasing resistors connected between the input terminals is one.

4. A circuit as claimed in claim 1, 2 or 3 in which the number of capacitors connected between the output terminals is one.

5. A circuit as claimed in any preceding claim in which there is no resistor between the input capacitor and the output capacitor.

6. A circuit as claimed in any preceding claim in which the ratio of input to output capacitance is less than or equal to 0. I. 7. A circuit as claimed in claim 6, in which the ratio of input to output capacitance is less than or equal to 0.01.

8. A circuit substantially as hereinbefore described with reference to the accompanying drawings.

9. A circuit for controlling the audio output of an electronic device comprising a signal source and an amplifier connected to the audio source in which the gain of the amplifier is dynamically controlled by an envelope detector as claimed in any preceding claim.