GB2418118A - Digital transmission repeater employing a number of different decoding-encoding paths and selecting a path according to number of errors in signal. - Google Patents

Abstract

A Variable Depth Regenerative Repeater 40 is disclosed employing a number of different decoding-encoding paths. In each path the extent or depth to which the received signal is decoded and subsequently encoded is different. As a result quicker decoding-encoding paths are provided through the repeater at the expense of the coding gain given by the decoding-encoding process. The quicker paths result in a smaller delay of the signal as it passes through the repeater, and can be selected when the number of errors in the digital signal is below a predetermined number. When the number of errors rise above a predetermined level however, a more rigorous decoding-encoding path or depth can be selected, resulting in correction of at least some of the errors that have arisen, but a longer delay. By monitoring the number of errors and choosing the decoding-encoding path appropriately, the overall transmission delay through one or more repeaters can be reduced.

Description

Digital Transmission Repeater This invention relates to an apparatus and

method for reducing the delay in a digital transmission regenerative repeater or a chain of digital transmission regenerative repeaters, in particular those used to transmit video and audio signals such as are used in Digital Terrestrial Television (DTT).

A transmission repeater is used to extend the transmission range of a signal, by boosting the signal at a series of intermediate repeater points. The boosted signal is then received at a final location, which would originally have been out of range.

There are two main styles of transmission repeaters. A simple analogue repeater amplifies and frequency converts the received signal before sending the signal on to its final destination. This offers an improvement in the received signal level at the final destination.

The more complex digital regenerative repeater receives and decodes the signal down to payload data, re-codes the payload data and re-transmits the signal. This offers the maximum amount of signal improvement. Regenerative repeaters are used to extend the coverage of any digital transmission system where the transmission characteristics are too hostile to use a simple analogue repeater, such as when the signal loss is too high, there is too much noise interference or limitations on transit power. Regenerative repeaters can be used in chains, over long transmission distances, or can be used to provide improved coverage in a small location at low transmission powers.

The decoding process in the regenerative repeater consists of a chain of physical layer blocks, each performing a specific function such as frequency downconversion, demodulation, de-randomisation, de-interleaving, error correction decoding etc. The re-coding process consists of a chain of complementary physical layer blocks connected in the reverse order, such as forward error correction coding, interleaving, randomization, modulation and frequency upconversion.

Each physical layer block in the decoding or re-coding chains will delay the signal by a certain amount. As a result, the signal will be significantly delayed compared to a simple analogue repeater. Added delays are extremely significant, particularly if the digital communications system is bi-directional, as it is common for bi- directional transmissions to be synchronized.

For example, in bi-directional point to multi-point communication systems that use any form of TDMA (Time Division Mulitiple Access) for the return path signal, the 'time slots' of the return path signal have to be synchronised with the broadcast signal so that burst transmissions from multiple users do not collide.

In order to allow for propagation and decoding delays in the system, there is always an offset between the return path and broadcast signals. The timing offset is to allow for the roundtrip delay of messages that control the communication system. The larger the propagation and processing delays, the larger the offset between signals.

Large upstream and downstream timing offsets increase the synchronization and reaction time of the communications system, making it more difficult to run real time services over the system. We have therefore appreciated that it would be desirable to provide an apparatus and method to reduce the amount of delay in a regenerative repeater while still offering a significant signal improvement.

The invention is defined by the independent claims to which reference should now be made. Advantageous features are set forth in the appendent claims.

The preferred embodiment of the invention provides a variable depth regenerative repeater employing a number of different decoding-encoding paths.

In each path the extent or depth to which the received signal is decoded and subsequently encoded is different. As a result quicker decodingencoding paths are provided through the repeater at the expense of the coding gain given by the decoding-encoding process. The quicker paths result in a smaller delay of the signal as it passes through the repeater, and can be selected when the number of errors in the digital signal is below a predetermined number. When the number of errors rise above a predetermined level however, a more rigorous decoding- encoding path or depth can be selected, resulting in correction of at least some of the errors that have arisen, but a longer delay. By monitoring the number of errors and choosing the decoding-encoding path appropriately, the overall transmission delay through one or more repeaters can be reduced.

Preferred embodiments of the invention will now be described in more detail, by way of example, and with reference to the drawings in which: Figure 1 illustrates a known regenerative repeater; Figure 2 is a table showing the estimated time delays caused by the various process blocks of the repeater of Figure 1; Figure 3 illustrates a preferred embodiment of the invention; Figure 4 is a graph illustrating the improvement in BitError-Ratio (BER) following Viterbi decoding; Figure 5 illustrates an alternative embodiment of the invention; Figure 6 illustrates an alternative embodiment of the invention using a diversity receiver; Figure 7 illustrates a first set of example repeater chains; Figure 8 illustrates a second set of example repeater chains; and Figure 9 illustrates a simplified implementation of the preferred embodiment in hardware.

In order to understand the function and various advantages of preferred embodiments of the invention, a description will first be given of a known prior art system.

The transmission system that will be discussed is Digital Terrestrial Television (OTT), as it is one of the more complex digital transmission systems, comprising a wide variety of physical layer blocks in its decoding and recoding chains. The operation of a DTT coder/decoder is described in detail in the present applicant's European patent application EP 1,221,793 to which reference should be made.

The regenerative repeater uses a coding and decoding process to receive a transmitted MPEG encoded signal en route, decode the signal, simultaneously performing error correction, re-code the error-corrected signal, and transmit this on to a final receiver location or subsequent regenerative repeater.

Each physical layer block in both the decode chain and re-code chain has an associated delay, determined either by the number of bits required to load the block or by the time taken to process those bits. The delay associated with a decoder physical layer block is often substantially the same as the delay associated with its complimentary re-coder physical layer block.

The DTT specification allows for some transmission system parameters to be programmable, so that the transmissions can be adapted to the environment in which the signal is being sent. Some of the physical layer block delays are therefore directly dependent on the programmable parameters.

Figure 1, to which reference should now be made, shows a regenerative repeater 2, as used in digital transmission schemes. In Figure 1, the physical layer blocks for a regenerative repeater for DTT are grouped as high level functions that do not show some of the finer detail of the DTT transmission system such as symbol mapping, frame adaptation and pilot/TPS signal insertion.

For a more detailed discussion reference should be made to the European patent application mentioned above.

The regenerative repeater comprises a decoding section 4 and a recoding section 6 connected together in series. In the decoding section 4, a DTT signal is received at antenna 8, while a corresponding signal is transmitted by antenna 10 in the recoding section.

In the decode chain 6, the RF front end 12 filters and converts the received signal down to an intermediate frequency (IF) or baseband for demodulation. The re-coder RF front end 14 accordingly converts, filters and amplifies an IF or baseband signal to the required RF frequency for transmission.

Both blocks act on the signal in the analogue domain. The most significant contribution to delay in this processing block is due to SAW filters (typically 1.5 to 2,us per SAW filter). There can be one or two SAW filters in the decoder RF Front End and either one or no SAW filters in the re-code RF Front End. Delay contribution from the RF Front Ends is not usually significant when compared to other physical layer blocks.

The OFDM demodulator 16 samples the IF or baseband signal received from the RF Front End 12 and extracts data simultaneously from the multiple carriers. The OFDM modulator 18 performs the opposite process, creating a multicarrier modulated signal from the data input. Each OFDM symbol contains multiple carriers modulated with QPSK or QAM symbols. The delay in the demodulator has a duration of 6 OFDM symbols, consisting of 2 symbols delay for the Fast Fourrier Transform (FFT) and 4 symbols delay for channel equalization. The delay in the modulator has a duration of only 2 symbols as there is no channel equalization.

Inner de-interleaver 20, in the decode chain 4, receives the signal from OFDM demodulator 16, whereas in the re-coding chain 6, the OFDM modulator 18 is supplied with a signal by Inner Interleaver 22. The inner interleaving process consists of two parts, namely bit interleaving and symbol interleaving.

Bit interleaving involves re-ordering the bits of a symbol before transmission; the bit interleaving delay is dependent on the number of bits in a carrier symbol and so is directly dependent on the modulation scheme used.

Symbol interleaving re-orders the symbols in an OFDM symbol frame.

Hence one OFDM symbol frame of data is required. The time needed for this process, and therefore the resulting delay caused, will be dependent on how data is transferred to the OFDM modulator 18, although for simplicity a delay of one OFDM symbol frame may be assumed.

In the de-interleaver 20 the reverse processes occur. On reception, a bit interleaved symbol is re-ordered into its original form, and the interleaved symbols within the frame are put back into their original order. Again, the delay is dependent on the modulation scheme used and on how data is received from the demodulator 16. The de-interleaved signal is passed from the Inner De- lnterleaver 20 to the Inner FEC (Forward Error Correction) Decoder 24.

In DTT schemes, the Inner FEC 24 uses a Viterbi based Convolutional FEC decoder. Convolutional decoders, such as a Viterbi decoder, employ hard and soft decision correction, variable traceback depths and other programmable features to get the best error correction performance. The dominant contributor to processing delay is the traceback depth. This varies from implementation to implementation, but a typical depth is 144 bits. In this case the process delay would be determined by the time taken to load 144 bits of data.

In the re-coding chain 6, a corresponding Inner FEC Convolutional Coder 26 is used to Viterbi encode the signal for transmission. The Convolutional coder used in the DTT specification has a depth of 6 bits and a code puncturing mechanism, hence the processing delay is the time taken to load 7 bits of data from the previous block.

Following the Inner FEC decode process 24, the signal is passed to Outer De-lnterleaver 28, and subsequently to Outer FEC decoder 32. In the recoding chain on the other hand, the outer Interleaver 30 receives a signal from Outer FEC decoder 34 and passes this to Inner FEC Coder 26. The Outer Interleaving process separates bytes from the same outer FEC frame to improve burst noise performance. An Interleaver consists of a 'barrel' of shift register branches of incremental depth, with each barrel being loaded in turn by 1 byte. A De- lnterleaver is the exact mirror image of this, hence both the Interleaver and De- lnterleaver will have the same delay.

The DTT specification uses an I =12 Interleaver, hence the delay is determined by the longest branch in the Interleaver, which contains 11 FIFO (First In First Out) registers of 17 bytes depth. This branch is loaded once every 12 'barrel rotations.' The Outer FEC Coder 34 encodes a 188 byte MPEG frame to give a 204 byte FEC frame. The Outer FEC decoder 32 decodes a 204 byte FEC frame to give an 188 byte MPEG frame. When measured relative to Raw Bit Rate time periods, that is the data rate obtained directly from the demodulator before removal of FEC framing and other overheads, these take effectively the same amount of time.

Following Outer FEC decoder 32, the signal is passed to SYNC detect and de-randomise block 36, and then to SYNC inversion and randomise block 38. The same hardware is used to perform both randomization and derandomisation. A frame synchronised feedback shift register is used to XOR a Pseudo Random Binary Sequence' with the MPEG frame payload.

The data is randomised/de-randomised serially, acting on each bit as it passes through the physical layer block. The block must wait for a sync word to find the start of a MPEG frame. There are always an integer number of MPEG frames in an OFDM symbol, so this would only occur during the initial signal tuning and acquisition phase.

Each of these processing blocks takes a finite period of time and can therefore be thought of as resulting in a delay in the processing chain at the repeater station.

Figure 2 summarises the delays for the different processing blocks, assuming a 16 CAM modulation scheme, an inner convolutional FEC rate of 3/4, and a guard interval of 1/32. Further parameters describing the transmission scheme are given at the top of the table in Figure 2.

The delays are estimated considering each physical layer block as a stand alone item, with data being input and output by the block at the symbol or bit rate of the transmission service. The delays are given in terms of a received symbol duration in,us, as well as the number of bits delay at the Raw Bit Rate.

The Raw Bit Rate is the data rate obtained directly from the demodulator before removal of FEC framing and other overheads.

In the decode chain, during the Convolutional Decode process, the FEC bits are discarded post correction, and the overall bit rate therefore drops after the Convolutional Error Correction. Bit loading delays become more significant when related to the Raw Bit Rate or the arrival rate of OFDM symbols at the demodulator.

Initial tuning and synchronization times are not included, as this does not contribute to the process delay once synchronization is achieved. Data during the tuning and synchronization phase is normally lost or is partially corrupted.

Programmable variables in the OTT specification and some aspects that are implementation dependent are highlighted as bold text.

From Figure 2 it can be seen that the most significant contributor to the process delay is the OFDM demodulator 16, and modulator 18; outer interleaver 20 makes a significant contribution to the delay, followed by inner symbol Interleaver 22 and Outer FEC 34. In particular, the Outer Interleaver and De- lnterleaver make up between a third and a half of the total process delay.

For the OFDM demodulator and modulator, the Raw Bit Rate is dependent on several parameters: i) Number of carriers = 2K (1512 carriers modulated with data) or 8K (6048 carriers modulated with data); ii) Useful Symbol Time, Tu = 224'us (2K carriers) and 896'us (8K carriers); iii) Guard Interval (relative time between successive symbols) =1/4,1/8,1/16,1/32 of symbol duration; iv) Modulation Scheme = QPSK (2 bits per carrier symbol), 16QAM (4 bits), 64QAM (6 bits); The Raw Bit Rate can also be expressed as = Number of data carrier x bits per symbol x 1/ (Tu x (1 + Guard Interval)) Thus, although a full regenerative repeater offers the most significant improvement in signal quality, as errors are corrected and the signal is reproduced with a high signal to noise ratio, the disadvantage is that the signal delay through the repeater is large. The above estimations show that the delay would be somewhere between 4 and 5ms. This is very significant for bi directional point to multi-point communication systems that use any form of TDMA (Time Division Mulitiple Access) for the return path signal, as discussed above.

A preferred embodiment of the invention will now be described with reference to Figure 3. Figure 3 shows a variable depth regenerative repeater 40 according to a first aspect of the invention. The repeater comprises a decoding chain 42 and re-coding chain 44 connected in series, similar to that shown in Figure 1.

The decode chain 42 similarly comprises an antenna 46, an RF front end 48, an OFDM modulator 50, an Inner De-lnterleaver 52, and Inner FEC decoder 54, an Outer De-interleaver 56, an Outer FEC decoder 58 and a SYNC Detector and De-randomiser 60.

The re-code chain 44 similarly comprises a SYNC Inverter and Randomiser 62 connected to SYNC detector and de-randomiser 60, an Outer FEC Coder 64, an Outer Interleaver 66, an Inner FEC coder 68, an Inner Intelreaver 70, an OFDM modulator 72, an RF front end 74 and an antenna 76.

The operation of these blocks is identical to the operation of those described above with reference to Figure 1.

Additionally, the preferred embodiment shown in Figure 3 comprises a 'depth switch' 78 connected between the Outer Interleaver 66 and the Inner FEC coder 68 in the recode chain 44. The depth switch receives an input from the Outer Interleaver 66, as well as from the Inner FEC decoder 54 in the decode chain 42. Depending on the switch position one or the other of these inputs is passed to the Inner FEC coder 68.

Depth switch 78 in turn receives a control signal from 'Variable Depth Control' circuit 80, which receives inputs from Inner FEC decoder 54, Outer FEC decoder 58, and OFDM demodulator 50. In particular, the Control circuit is arranged to monitor the Inner and Outer Bit Error Ratios received from the Inner and Outer Decoders, the demodulator lock status from the OFDM demodulator and the Uncorrectable Error Count (UCE) received from the Outer Decoder.

The operation of the preferred embodiment shown in Figure 3 will now be described in more detail.

In Additive White Gaussian Noise (AWGN) environments, the Bit-Error- Ratio (BER) is determined by the Signal to Noise Ratio (S/N) at the demodulator input. For OTT, provided that the BER after Viterbi decoding in the Inner FEC decoder does not increase beyond 0.0002 (2 E-04), the Reed-Solomon Outer FEC 58 can correct the errors to within a Quasi Error Free (QEF) state. QEF is defined as a BER of less than 1 E-11, or less than 1 uncorrected error event in 1 hour.

The Viterbi decoding process in the Inner FEC decoder 54 provides a significant amount of error correction and coding gain to the decoded signal.

Figure 4 is a graph illustrating the improvement in the BER following Viterbi decoding for various convolution FEC rates. For example, for a convolution FEC rate of 1/2, the BER of a signal, which before Viterbi decoding has a BER of 0.1, is 0.0003 after Viterbi decoding. Similarly, a signal which has a pre-Viterbi decoding BER of 0.01, is shown to have a post-Viterbi decoding BER of 0.00009 for a convolutional coding FEC rate of 5/6 and 0.0008 for a convolutional coding FEC rate of 7/8. Depending on the convolutional rate used, improvements in BER of 10 to 10000 times are achievable.

As noted above, the Outer Interleaver and De-interleaver account for a large proportion of the delay associated with the decoding/encoding process.

Accordingly we have appreciated that it would be desirable to omit these elements of the decoding/re-coding chains where possible, and rely solely on the error correction provided by the Viterbi decoding process in the Inner FEC decoder 54. Thus, depth switch 78 is arranged to receive an input directly from Inner FEC decoder 54 in the decode chain 42. This input bypasses the Outer De-interleaver/lnterleaver 54 and 66, the Outer FEC decoder/coder 58 and 64, and the SYNC Detect and de-randomize, and SYNC Inversion and randomize circuits 60 and 62, and provides a decoding/coding path which is significantly shorter than the full path. Thus, the delay inherent in the decoding/recoding process is reduced at the cost of the rigor of the error correction.

When employing this path in the decoding/recoding process, the regenerative repeaters may be thought of as operating at half depth, in comparison to full depth where all of the processing blocks of the longer path are utilized. Hence, the use of the terms depth switch and variable depth controller.

The Inner FEC block 54 in each half depth repeater stage will correct a significant number of errors in the received signal, and therefore provide good coding gain. However, this block is not as effective in removing errors as the Outer FEC block 58 used in the full depth repeater configuration. Furthermore, the Inner FEC re-coding blocks, offer poor protection against burst noise.

Any errors that the Inner decoder 54 fails to correct will also be passed to the Inner encoder 66 in the present stage and encoded as data. Thus, as the signal passes through several half depth repeater stages, and in particular where the environment is very noisy, errors in the signal will accumulate. If the accumulation of errors is left unchecked, FEC frames of the signal may ultimately be lost completely, and reproduction of the signal affected.

In the preferred embodiment, the Viterbi decoder in the Inner FEC decode block 54 therefore measures the BER, based on the convolutional encoding in the Inner FEC code block 66 of a previous repeater. The measured BER is then passed to the Variable Depth Controller so that some measure of accumulating errors can be made. As noted above, the BER will not however reflect errors encoded as data in the previous repeater stage.

Unlike Viterbi error correction, the Reed-Solomon decoder used in the Outer FEC decoder block 58, can detect and correct the accumulated errors, providing the number of errors has not become too large. In practice for Additive While Gaussian Noise (AWGN), if the cumulative BER at the outer decoder is less than 0.0002, the errors can be corrected to QEF by the Reed-Solomon decoder. The Variable Depth controller 80 therefore additionally monitors the BER from the Outer FEC decoder. A threshold of 0.0002 or just under 0.0002 is set for the BER, and if this threshold is exceeded then the variable depth controller 80 switches in the path containing the Reed Solomon outer decoder.

Thus, even when the repeater is operating at half depth, the data received at the antenna 46 of the decoding chain is decoded and passed to the Outer Decoder 58. It is also necessary to monitor the OFDM demodulator lock status and uncorrectable error count, as the Reed Solomon outer decoder BER is only valid when there is an FEC lock and there are no uncorrectable errors.

In order to measure the lower error rates after Viterbi decoding, the Reed Solomon decoder must measure the BER over a larger number of MPEG packets than is necessary at the Inner decoder. For example, at the Outer decoder, at least 1000 bits must be processed to measure a BER of 0.001, while a minimum of 1,000,000 bits must be processed to measure a BER of 0. 000001. Since the BER measured by the Viterbi decoder is typically larger, fewer bits need to be processed. The processing delay between the actual errors and the error measurement is therefore less for the Viterbi decoder than for the Reed-Solomon decoder.

Thus, although the Outer BER is essentially the limiting BER for the system, and it is not therefore necessary to always monitor the FEC received from the Inner FEC decoder 54, monitoring both BERs is preferred as it provides more reliability. In particular, by monitoring the error rate at the Viterbi decoder, any change in error rate can be detected more rapidly. Also, the Viterbi BER is valid when there are uncorrectable errors, which is not true of the BER at the Outer decoder.

Depending on the BERs received from the Inner FEC decoder 54 and the Outer Decoder 58, the variable depth controller 80 sends a control signal to depth switch 78 to select one of the two inputs. Whenever the BER is low, that is under the threshold at which it can correct errors to within QEF, the input from the Inner FEC decoder is used to take advantage of the quicker processing time. Should the BER rise to a level where the errors are likely to affect the signal however, the full depth path comprising the Outer Interleaver /De-interleaver, Coder/Decoder blocks and SYNC blocks 56 to 66 is switched in so that the accumulated errors in the signal can be corrected. Following correction at the Outer FEC decoder 58, the signal may once again be thought of as Quasi Error Free.

The BERs are continuously monitored and should they improve, such as if full depth processing has been selected further down the repeater chain resulting in a QEF received signal, half depth processing may again be selected in order to reduce processing delays.

An alternative embodiment of the invention involving three depths of regeneration, will now be described with reference to Figure 5.

The regenerative repeater shown in Figure 5, is substantially identical to that shown in Figure 3. To the extent that it is the same, the same reference numerals have been used to label the processing blocks in Figure 5. The alternative regenerative repeater shown, also has full and half depth capabilities, and therefore has a depth switch 78 connected to a variable depth controller 80 receiving inputs from Inner FEC decoder 54 and Outer decoder 58. In the alternative embodiment however the variable depth controller 80 provided, also controls an additional depth switch 82, located between the Inner Interleaver 70 and the OFDM modulator 72 in the encoding chain. The second depth switch 82 receives an input from the OFDM demodulator 50 in the decoding chain 42, as well as from the Inner Interleaver 70 in the encoding chain.

Thus a third signal path or "zero depth" is provided through the regenerative repeater, giving a minimum delay time, but minimum error correction. In the zero-delay path, the signal output from the OFDM demodulator is passed directly, via the depth switch, to the OFDM modulator 70 for modulation and re-transmission. The amount of coding gain will be small resulting principally from re-modulation and transmission of the signal. Apart from any noise which erroneously appears as data, re-modulation of the signal produces a signal free of noise picked up in the previous transmission stages. Although the coding gain is small, where the numbers of errors arising in the signal is low, this coding path has been found to be adequate for at least some periods of time. The channel state information provided by the OFDM modulator 50 can be used in this case to give an indication of the amount of error correction occurring.

Again the variable depth controller monitors the accumulating errors in the signal at the Outer FEC, and the BER received from the Inner FEC decoder and switches to full depth regeneration when the BER is approaching a level that threatens the signal quality. The half depth path may be used in addition to provide an intermediate level of correction, where delays allow and the Inner decoder BER indicates that more rigorous error correction is necessary. As will be recalled from above, the Viterbi decoder in the Inner FEC decoder block 58 will be able to correct much of the signal on the basis of the previous convolutional coding in the last regenerative repeater stage where full or half depth regeneration was used. Thus, by monitoring the Inner FEC BER at the Variable Depth Controller, the processing may be switched from 'zero depth' regeneration to 'half depth' regeneration as appropriate The error correction threshold at which the half depth path is elected over the zero depth path will be dependent on the FEC rate and the Viterbi decoder implementation. It will however be less than the threshold of 0.0002 for the full depth path. In this way, the need to rely on the Outer FEC blocks, may occur lessfrequently, resulting in less overall processing delay along the chain.

Additionally the half depth capability could be omitted altogether from the alternative regenerative repeater shown in Figure 5, thereby providing for only zero and full depth paths. However the three paths are preferred for reason of flexibility in the processing chain.

Clearly, the robustness of the signal to errors when propagated through one or more zero depth regenerative repeaters will be poor in comparison to half or full depth processing. We have therefore appreciated that it may be desirable to employ additional reception techniques at the repeater in order to reduce the likelihood of errors occurring. One such technique is spatial diversity, employing a diversity receiver in the repeater. As is well known in the art, the diversity receiver comprises a number of different antennae arranged to receive the same signal.

The diversity technique is generally used to counter multipath reception problems, but in the case of maximum ratio combination diversity, it also provides signal gain in the presence of AWGN. This is due to the fact that the signal received at the antennae is coherent, whereas the unwanted noise is not. As a result, the signals can be combined coherently, unlike the noise, improving the signal to noise ratio.

An embodiment employing a diversity receiver will next be described with reference to Figure 6. The regenerative repeater shown in Figure 6 is identical to that shown in Figure 5, except that the decoding chain 42 comprises a second antenna 46' and RF Front End 48', connected to second OFDM demodulator 50'.

The output of the two OFDM demodulators 50 and 50' is combined in the Maximum Ratio combination block 84, before being passed to Inner deinterleaver 50 for processing. Second depth switch 82 is then arranged to receive the output from the Maximum Ratio combination block 84. Of course, more than two antenna and RF Front End sections may be provided if desired.

The demodulated data bits from each antenna are represented as a series of soft decisions, where each soft decision indicates the certainty that each bit is a logical' or a logic '0'. In the maximum ratio combination block the soft decision values output from each of the demodulator are combined, thereby increasing or decreasing the certainty level. The certainty levels are then used to weight the soft decision Viterbi decoder algorithm in the Inner FEC, improving the effectiveness of the error correction.

In a stand alone dual antenna diversity receiver, maximum ratio combination of the demodulator soft decisions has been shown to give a 3 to 5dB coding gain over a non-diversity receiver. In the zero depth mode, the combined soft decisions are directly converted to hard decisions (logic values of 0 or 1) in the OFDM modulator, so the coding gain from the diversity reception will not be as significant as in the half depth and full depth modes.

As in the embodiments described above, the BERs received from the Inner and Outer FEC decoders 54 and 58 are monitored by the Variable Depth Controller.

It will be appreciated that a diversity receiver stores demodulated signals from the separate receivers in memory, and then combines the signal information to improve the quality of the signal. If a Diversity Receiver is used in a network with Variable Depth Repeaters, relative delays through different repeater paths would increase slightly. Extra memory may be required in the Diversity Receiver to cope with the larger time offsets between the two signals.

Thus a regenerative repeater system has been described which is able to operate at different depths in order to balance error correction rigour with delay in the signal chain.

Full depth processing employs both Inner and Outer decoding and coding and therefore offers the most favourable error correction, but the longest delay time.

Half depth processing employs only the Inner decoding and encoding and therefore offers a time saving at the cost of some of the BER.

Lastly, zero depth processing provides the minimum delay, by-passing both the Inner and Outer decoders and encoders, relying instead on the slight coding gain in the OFDM demodulation and modulation process.

It will be appreciated that each of the decoding/encoding paths is symmetric. That is to say that in any one path, the same amount of decoding must be applied as encoding.

Diversity reception may be used with any of the processing schemes described above, but offers the most significant improvement for the half and full depth paths.

It will be appreciated that switching from one depth of decoding and encoding to another should be managed intelligently. Preferably, switching between the different depths in the regenerative repeater should be timed to occur after the entirety of the present frame has been decoded. Otherwise, if the switch occurs mid frame, information may be lost. The variable depth controller 80 preferably therefore monitors frame synchronization to ensure that the switches are correctly timed such that whole frames of the signal can pass through the present decoding/coding path before the switch is made.

Nevertheless, when the regenerative repeater is switched from a longer processing path to a shorter path, it is necessary to discard the frames that are being processed in the longer path to realise the reduction in delay. Referring to Figure 2, it will be appreciated that switching from full depth to half depth and by- passing the outer interleaver/deinterleaver, outer coder/decoder, and de- randomisation and randomization blocks, leads to a reduction in path length of 2ms. Thus, 2ms of frames will be dropped. It is therefore preferable, if an MPEG decoder capable of dealing with changes in packet delay, and sufficiently robust to handle dropped packets, is used with the variable regenerative repeater.

Where the switchover is occurring between a shorter path to a longer path however, frames arriving at the depth switch 78 or 82 will be delayed compared to the packets already re-coded and transmitted. In this situation, the regenerative re-coder preferably transmits the repeated packets or inserts null packets.

Switching depths will however add some jitter to the system, and in the case of an MPEG transmission for example, may require adjustment of the Program clock Reference in the MPEG packets.

As mentioned earlier, the regenerative repeater is preferably part of a chain of repeaters or network. The actual control of depth switching across a regenerative repeater network can occur in a number of ways. Each of the regenerative repeaters may be self adjusting, as described above, relying on the local BER measured by the Inner and Outer FEC decoders. In this case, for example a first and a second threshold are programmed within the repeater at levels below the Reed-Solomon BER for QEF, and the repeater is initially set to operate at either zero or half depth. If a threshold is reached, however then the repeater switches to a higher depth of decoding and coding. Preferably, the previous measurements of the Inner and Outer BERs, and UCE are stored in memory for the repeater, and based on these, hysteresis figures for switching depths are set. Thus, constant switching of the repeater backwards and forwards is prevented.

The disadvantage with this arrangement is that each repeater switches based upon the quality of the signal at its input only, rather than the signal quality over the whole repeater chain. This may not give the optimum delay though the chain of repeaters. It also may be necessary to set different thresholds in each repeater so that several repeaters do not switch at the same time.

Alternatively, or in addition, the depth of the regenerative repeaters may be adjusted by an overall transmission system controller. Preferably, the system controller receives the measurements of BER remotely from each of the regenerative repeaters. Control of repeaters can then be achieved through signalling either in band or out of band. This would allow the set up of the repeaters to be optimised taking the whole network into account. Weak points in the repeater chain could be identified and the error correction increased by increasing the repeater depth. Preferably, control of the repeaters is based on the direct measurements made at each repeater. Where this is not possible however, the repeater chain could be set up using an iterative process. The controller would then cycle through the variable depth settings of each repeater in the chain to determine the optimum delay /coding gain performance.

The disadvantage of this arrangement is the delay in response time to changes in the transmission environment. If there is a sudden drastic increase in noise, the central control may not respond quickly enough. It may therefore be preferable to use a combination of the two mechanisms, so that each repeater may have partial autonomous control of the depth settings.

In establishing the initial settings of a chain of repeaters, the noise performance and delay requirements would be used to establish a particular link budget with margins for both delay and noise interference. The thresholds for the repeaters would then be set, such that at least some of the repeaters can switch to a more rigorous decoding-encoding path to give more error correction, without the required minimum time delay of the chain being exceeded. As switching to a less rigorous encoding/decoding chain results in some loss of the signal, this switching may be restricted to times when no transmission of data is occurring.

In bi-directional systems, which require repeaters in both directions, the forward and reverse transmission paths may need to be adjusted at the same time.

Figures 7 and 8 illustrate configurations of simple repeater chains by way of example. Figure 7 shows schematically three repeater chains having an initial transmitter Tx, a final receiver Rx, and one or two intermediate repeaters. More than two repeaters could of course be provided. At each repeater, and transmitter or receiver stage, the local Signal to Noise ratio S/N and BER are indicated, as well as the delay caused to the signal chain by any necessary processing. Each repeater station indicates the depth of regeneration being carried out, and between each repeater a typical value for the degradation occurring to the signal is given in decibels.

As can be seen in Figure 7, providing two repeaters operating at half depth (top diagram) gives the optimum transmission parameters for the chain.

Although, the BER after each repeater is 0.00001 at the end of the transmission chain circuitry in the Receiver RX can restore the signal to QEF. The total delay in the chain is only 8.99ms.

For the same transmission environment, a single repeater operating at full depth (middle diagram) produces a slightly quicker transmission time of 8.65ms, but results in the signal quality being degraded to such an extent that it can no longer be received. Providing two repeaters operating at full depth (bottom diagram) however, results in the longest transmission time of 12.97ms, but offers no improvement in final signal quality over the two half depth stages.

Figure 8 shows a similar comparison for repeaters set to zero depth. The middle and bottom diagrams are identical to those of Figure 7. In the top diagram, the half depth repeaters have been changed to operate at zero depth. Despite the minimum of error correction being carried out in this transmission chain, a signal at QEF quality is recovered at the Receiver, for the shortest transmission time of 8.03ms. Depending on the number of repeaters present, and the transmission environment itself, it is clear that the depths of the different repeaters can be adjusted to provide the optimum balance between delay and signal quality.

Variable Depth Regeneration is applicable to any digital transmission system with tight signal delay requirements, working in an environment where analogue repeaters offer insufficient improvement in signal quality. There are two main applications that require tight delay management, point to multi-point bi directional transmission systems and transmission systems carrying real time data.

The multi-point to point transmission path in a point to multi-point bi directional system is generally Time Division Multiple Access (TDMA) based. The TDMA slots must be time synchronized to prevent interference from the different multi-point transmitters. Such systems are generally prevented from using regenerative repeaters because of the timing alignment constraints of the overall system. The variable depth regenerative repeater described above would allow the delay through a repeater or repeater chain to be minimised. An example of this type of application would be using repeaters in a wireless LAN system.

Examples of such applications are, extending the coverage of a digital radio camera using low delay video encoding/decoding to minimise the delay between live action and receiving a picture on a video monitor; extending the coverage of a radio mike system/digital personal address system; extending the coverage of digital TV reception on hand held devices (eg DVB-H), and in-home video senders for delivery of DTT to portable TVs in other rooms within the home without roof-top aerial feeds. The system may therefore be advantageously applied to mobile telephone systems for the transmission of voice or data signals, or for the streaming of digital TV, or video to mobile phone handsets.

Although the variable depth regenerative receiver has been described above in terms of the necessary processing blocks, it will be appreciated that it would be straightforward for the skilled man to implement the functionality of these blocks in both hardware or software.

In a hardware implementation for example, a demodulator board would be required having a demodulator chip capable of outputting signal data after Viterbi error correction. Both the standard transport stream data and post Viterbi signal data must be accessible by a programmable logic device to allow depth switching. The regenerative repeater also requires a modulator where the signal information can be input in the normal manner and before the Viterbi encoding, by-passing the Reed-Solomon encoding and outer interleaver.

Figure 9 illustrates a simplified implementation 100 of the first preferred embodiment in hardware. A DTT signal UHF l/P1 is received at tuner 102 and converted to an Intermediate Frequency. It is then passed to a demodulator 104, such as the LSI 64782, which is configured to provide the BERs, UCE and lock status signals required. Although the LSI 64782 is capable of demodulating and decoding the DTT signal, the signal taken from the LSI 64782 is the soft decision signal obtained before the Inner and Outer decoders. This is then passed to the FPGA (Field Programmable Gate Array) 106 which is configured to perform the Inner and Outer decoding and encoding. Relying on the decoding circuitry provided in the FPGA allows much smoother depth switching than if the LSI 64782 decoders had been used, as the decoding and encoding depths can be switched over together relatively easily. If the LSI 64782 decoders were used instead, it is more difficult to change over the repeater depths in the Demodulator and the modulator at the same time. Hence the decoding, depth switching, coding and OFDM generation are all performed in the FPGA.

The FPGA produces an output IQ signal which drives a direct IQ modulator 108, modulating a OTT signal directly at the UHF output frequency.

The UHF signal is received from UHF synthesiser 110. The modulated signal is then amplified with a Power Amplifier 112 prior to transmission of the output signal UHF O/P. Micro-controller 114 monitors the tuner and demodulator via the 12C bus and provides the function of the depth switch controller. The Micro controller also controls the decoding, depth switching, coding and OFDM performed by the FPGA.

In the embodiment where diversity reception is utilised, an additional Tuner 102 and Demodulator 104 are provided. The LSI 64782 has a diversity interface so that the demodulators can be directly connected.

Although the preferred embodiments are applied to a system utilising OFDM, it could also be applied to any digital transmission system using the inner and outer coding/decoding pattern, where different levels of encoding/decoding are available. Such systems can be found in Satellite broadcast systems, and the American Cable Broadcast standard.

Although the preferred embodiments have been described with reference to a OTT system, the techniques described above are not limited to such and may be employed in any digital regenerative repeater system or other system which utilizes digital decoding and coding, and in which it may be desirable to minimize the propagation delays.

Claims (32)

1. Claims 1. A digital transmission repeater comprising: a receiver for

   receiving a digital signal; a decoder for decoding the digital signal received at the receiver; an encoder for receiving the decoded digital signal, and for re encoding it for transmission; a transmitter for transmitting the encoded digital signal; an error detector for detecting errors in the digital signal; and a controller, coupled to the error detector, for selecting the decoding and encoding to apply to the digital signal by the decoder and the encoder such that the amount of time required for decoding and encoding are dependent on the amount of errors detected in the signal by the error detector.
2. 2. A digital transmission repeater according to claim 1, wherein the decoder and encoder are operable together to apply at least a first and a second decoding-encoding process to the digital signal, the first decoding-encoding process taking longer than the second decoding-encoding process but correcting more errors, and wherein the controller is operable to select the second decoding-encoding process while the errors detected by the error detector remain below a first predetermined threshold, and the first decoding-encoding process when the errors rise above the first predetermined threshold.
3. 3. A digital transmission repeater according to claim 2, wherein the first predetermined threshold is less than the number of errors that can be corrected in the first decoding-encoding process.
4. 4. A digital transmission repeater according to claim 2 or 3, comprising a third decoding-encoding process in which the decoder-encoder is disabled such that no decoding of the digital signal is carried out, wherein the controller is operable to select the third decoding-encoding process while the errors detected by the error detector remain below the first predetermined threshold.
5. 5. A digital transmission repeater according to any of claims 2 to 4, wherein the controller is operable to select the first decoding-encoding process while the errors are above the first predetermined threshold, the second decoding encoding process while the errors are above a second predetermined threshold but below the first predetermined threshold, the second predetermined threshold being lower than the first, and the third decoding-encoding process while the errors are below the second predetermined threshold.
6. 6. A digital transmission repeater according to claim 4 or 5, wherein the third decoding-encoding process relies on demodulation and remodulation of the signal in the repeater.
7. 7. A digital transmission repeater according to any of claims 1 to 6, wherein the receiver comprises a diversity receiver.
8. 8. A digital transmission repeater according to any preceding claim, wherein the decoder comprises an inner de-interleaver and FEC decoder, and an outer de-interleaver and FEC decoder, and the encoder comprises an inner interleaver and FEC encoder, and an outer interleaver and FEC encoder; and wherein the inner de-interleaver and FEC decoder, and inner interleaver and FEC encoder are arranged to provide the first decodingencoding process; and the inner de-interleaver and FEC decoder, outer deinterleaver and FEC decoder, outer interleaver and FEC encoder, and inner interleaver and FEC encoder are arranged to provide the second decodingencoding process.
9. 9. A digital transmission repeater according to claim 8, wherein the error detector is arranged to receive the Bit Error Ratio (BER) from at least the Outer FEC decoder.
10. 10. A digital transmission repeater according to claim 9, wherein the digital signal is passed to the Outer FEC decoder regardless of the encoding or decoding applied to the signal, such that the BER from the Outer FEC decoder can be received at all times.
11. 1 1. A digital transmission repeater according to claim 9, 10 or 11, wherein the error detector is arranged to receive the BER from the Inner FEC decoder.
12. 12. A digital transmission repeater according to any preceding claim, wherein the receiver includes an OFDM demodulator, and the transmitter includes an OFDM modulator.
13. 13. A digital transmission repeater system, comprising: one or more digital transmission repeaters according to any preceding 1 0 claim; a master controller, for remotely controlling the controller of the repeater to select the decoding and encoding applied to the digital signal.
14. 14. A digital transmission repeater system according to claim 13, wherein the master controller is operable to monitor an overall transmission delay and overall transmitted signal quality for the chain as a whole.
15. 15. A digital transmission repeater system according to any of claims 13 and 14, wherein the master controller controls the controllers of the repeaters such that at least one repeater can apply more rigorous decoding and encoding than applied by the other repeaters without the overall transmission delay for the repeaters exceeding a predetermined value.
16. 16. A method of processing a signal in a regenerative repeater, comprising: receiving a digital signal; detecting errors in the digital signal; selecting the decoding and encoding applied to the digital signal in the regenerative repeater such that the amount of time required for decoding and encoding are dependent on the amount of errors detected in the signal by the error detector; and applying the selected decoding and encoding to the digital signal.
17. 17. A method according to claim 16, wherein the selecting step includes selecting from at least a first and a second decoding-encoding process, the first decoding-encoding process taking longer than the second decoding-encoding process but correcting more errors; and wherein the method comprises selecting the second decoding-encoding process while the errors detected in the digital signal remain below a first predetermined threshold, and the first decoding-encoding process when the errors rise above the first predetermined threshold.
18. 18. A method according to claim 17, wherein the first predetermined threshold is less than the number of errors that can be corrected in the first decoding encoding process.
19. 19. A method according to claim 18 or 19, wherein the selecting step includes selecting from at least a third decoding-encoding process comprising disabling the decoder-encoder such that no decoding of the digital signal is carried out, and the method comprises selecting the third decoding-encoding process while the errors detected in the signal remain below the first predetermined threshold.
20. 20. A method according to any of claims 17 to 19, comprising selecting the first decoding-encoding process while the errors detected are above the first predetermined threshold, the second decoding-encoding process while the errors detected are above a second predetermined threshold but below the first predetermined threshold, the second predetermined threshold being lower than the first, and the third decoding-encoding process while the errors detected are below the second predetermined threshold.
21. 21. A method according to claim 19 or 20, wherein the third decoding encoding process comprises demodulation and remodulation of the signal.
22. 22. A method according to any of claims 16 to 21, wherein the receiving step comprises employing diversity reception.
23. 23. A method according to any of claims 16 to 22, wherein in the applying the decoding and encoding process step, an inner de-interleaver and FEC decoder, and an outer de-interleaver and FEC decoder are employed as a decoder, and an inner interleaver and FEC encoder, and an outer interleaver and FEC encoder; are employed as an encoder; and wherein the inner de-interleaver and FEC decoder, and inner interleaver and FEC encoder are arranged to provide the first decoding-encoding process; and the inner de-interleaver and FEC decoder, outer de-interleaver and FEC decoder, outer interleaver and FEC encoder, and inner interleaver and FEC encoder are arranged to provide the second decoding-encoding process.
24. 24. A method according to claim 23, wherein in the error detection step comprises monitoring the Bit Error Ratio (BER) from at least the Outer FEC decoder.
25. 25. A method according to claim 23 or 24, wherein the digital signal is passed to the Outer FEC decoder regardless of the encoding or decoding applied to the signal, such that the BER from the Outer FEC decoder can be received at all times.
26. 26. A method according to claim 23, 24, or 25, wherein the error detection step comprises monitoring the BER from the Inner FEC decoder.
27. 27. A digital transmission repeater according to any preceding claim, wherein the receiving step includes OFDM demodulating the received signal.
28. 28. A method of controlling a digital transmission repeater system comprising one or more digital transmission repeaters according to any of claims 1 to 12, the method comprising: remotely controlling the controller of the repeater to select the decoding and encoding applied to the digital signal.
29. 29. A method according to claim 28, comprising monitoring an overall transmission delay and overall transmitted signal quality for the chain as a whole.
30. 30. A method according to any of claims 30 and 31, comprising controlling the controllers of the repeaters such that at least one repeater can apply more rigorous decoding and encoding than applied by the other repeaters without the overall transmission delay for the repeaters exceeding a predetermined value.
31. 31. A digital transmission repeater substantially as described herein and with reference to the drawings.
32. 32. A method of processing a signal in a digital transmission repeater substantially as described herein and with reference to the drawings.