GB2410832A - Porous dielectric films with a non-porous surface - Google Patents
Porous dielectric films with a non-porous surface Download PDFInfo
- Publication number
- GB2410832A GB2410832A GB0419112A GB0419112A GB2410832A GB 2410832 A GB2410832 A GB 2410832A GB 0419112 A GB0419112 A GB 0419112A GB 0419112 A GB0419112 A GB 0419112A GB 2410832 A GB2410832 A GB 2410832A
- Authority
- GB
- United Kingdom
- Prior art keywords
- porous
- dielectric films
- porous surface
- porous dielectric
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000280 densification Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 101001019455 Homo sapiens ICOS ligand Proteins 0.000 description 1
- 102100034980 ICOS ligand Human genes 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Separation Using Semi-Permeable Membranes (AREA)
- Manufacture Of Porous Articles, And Recovery And Treatment Of Waste Products (AREA)
- Laminated Bodies (AREA)
Abstract
A low k porous dielectric film is described wherein the exposed surface or surfaces of the film are substantially non-porous. A densification method is described for treating such exposed surfaces to render porous surfaces non-porous.
Description
GB 2410832 A continuation (72) Inventor(s): Keith Edward Buchanan
Joon-Chai Yeah (74) Agent and/or Address for Service: Wynne-Jones, Laine & James 22 Rodney Road, CHELTENHAM, Gloucestershire, GL50 1JJ, United Kingdom
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0213708A GB0213708D0 (en) | 2002-06-14 | 2002-06-14 | Dielectric films |
GB0213888A GB0213888D0 (en) | 2002-06-18 | 2002-06-18 | Dielectric films |
US39205702P | 2002-06-28 | 2002-06-28 | |
PCT/GB2003/002494 WO2003107411A2 (en) | 2002-06-14 | 2003-06-10 | Dielectric film |
Publications (2)
Publication Number | Publication Date |
---|---|
GB0419112D0 GB0419112D0 (en) | 2004-09-29 |
GB2410832A true GB2410832A (en) | 2005-08-10 |
Family
ID=29740467
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0419112A Withdrawn GB2410832A (en) | 2002-06-14 | 2003-06-10 | Porous dielectric films with a non-porous surface |
GBGB0422825.0A Pending GB0422825D0 (en) | 2002-06-14 | 2004-10-14 | Porous dielectric films with a non-porous surface |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GBGB0422825.0A Pending GB0422825D0 (en) | 2002-06-14 | 2004-10-14 | Porous dielectric films with a non-porous surface |
Country Status (4)
Country | Link |
---|---|
AU (1) | AU2003236897A1 (en) |
DE (1) | DE10392480T5 (en) |
GB (2) | GB2410832A (en) |
WO (1) | WO2003107411A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6914014B2 (en) * | 2003-01-13 | 2005-07-05 | Applied Materials, Inc. | Method for curing low dielectric constant film using direct current bias |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6114259A (en) * | 1999-07-27 | 2000-09-05 | Lsi Logic Corporation | Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage |
US20010038889A1 (en) * | 1999-01-15 | 2001-11-08 | Suzette K. Pangrle | Method and system for modifying and densifying a porous film |
WO2002001621A2 (en) * | 2000-06-23 | 2002-01-03 | Honeywell International, Inc. | Method to restore hydrophobicity in dielectric films and materials |
US6351039B1 (en) * | 1997-05-28 | 2002-02-26 | Texas Instruments Incorporated | Integrated circuit dielectric and method |
EP1195801A2 (en) * | 2000-09-29 | 2002-04-10 | Interuniversitair Micro-Elektronica Centrum | Process for plasma treating an isolation layer with low permittivity |
-
2003
- 2003-06-10 WO PCT/GB2003/002494 patent/WO2003107411A2/en not_active Application Discontinuation
- 2003-06-10 AU AU2003236897A patent/AU2003236897A1/en not_active Abandoned
- 2003-06-10 GB GB0419112A patent/GB2410832A/en not_active Withdrawn
- 2003-06-10 DE DE10392480T patent/DE10392480T5/en not_active Withdrawn
-
2004
- 2004-10-14 GB GBGB0422825.0A patent/GB0422825D0/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6351039B1 (en) * | 1997-05-28 | 2002-02-26 | Texas Instruments Incorporated | Integrated circuit dielectric and method |
US20010038889A1 (en) * | 1999-01-15 | 2001-11-08 | Suzette K. Pangrle | Method and system for modifying and densifying a porous film |
US6114259A (en) * | 1999-07-27 | 2000-09-05 | Lsi Logic Corporation | Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage |
WO2002001621A2 (en) * | 2000-06-23 | 2002-01-03 | Honeywell International, Inc. | Method to restore hydrophobicity in dielectric films and materials |
EP1195801A2 (en) * | 2000-09-29 | 2002-04-10 | Interuniversitair Micro-Elektronica Centrum | Process for plasma treating an isolation layer with low permittivity |
Also Published As
Publication number | Publication date |
---|---|
GB0419112D0 (en) | 2004-09-29 |
WO2003107411A2 (en) | 2003-12-24 |
AU2003236897A1 (en) | 2003-12-31 |
AU2003236897A8 (en) | 2003-12-31 |
DE10392480T5 (en) | 2005-09-01 |
WO2003107411A3 (en) | 2004-03-04 |
GB0422825D0 (en) | 2004-11-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |