GB2409612A - Method and Apparatus for recovering timing in Packet based Wireless Networks. - Google Patents

Method and Apparatus for recovering timing in Packet based Wireless Networks. Download PDF

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Publication number
GB2409612A
GB2409612A GB0502378A GB0502378A GB2409612A GB 2409612 A GB2409612 A GB 2409612A GB 0502378 A GB0502378 A GB 0502378A GB 0502378 A GB0502378 A GB 0502378A GB 2409612 A GB2409612 A GB 2409612A
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Prior art keywords
timing
receiver
channel
signal
channel response
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GB2409612B (en
GB0502378D0 (en
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Michael Philip Fitton
Siew Chung Leong
Douglas John Gargin
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Toshiba Europe Ltd
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Toshiba Research Europe Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20Modulator circuits; Transmitter circuits
    • H04L27/2032Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
    • H04L27/2053Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases
    • H04L27/206Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers
    • H04L27/2067Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers with more than two phase states
    • H04L27/2075Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers with more than two phase states in which the data are represented by the change in carrier phase
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/0212Channel estimation of impulse response
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals

Abstract

A method for recovering timing uncertainty in a receiver (10, 20) of a wireless packet based communications system, in which a packet comprises a header sequence (102, 122) including a synchronisation word (108, 128) and a payload sequence (104, 124) encoded using a phase shift keying protocol. The method comprises the steps of: determining an initial channel estimate using a wideband technique for controlling sampling and equalising said payload sequence to extract data therefrom; tracking channel response from said channel estimate using a narrowband technique, and; calculating an overall channel response estimate on the basis of said initial channel estimate and said tracked channel response.

Description

1 24096 12 Method and apparatus for recovering timing in packet based
wireless networks This invention relates to a method and apparatus for recovering timing in a packet based wireless network. More particularly, it relates to a method and apparatus for allowing timing uncertainty to be recovered at the receiver of a Differential Phase Shift Keying System.
Wireless communication between electronic devices is becoming increasingly in demand, particularly due to the growth of multimedia communication, which has motivated the development of high-speed transmission of digital data.
Several different encoding methods are used to encode digital data signals in wireless networks. Differential Phase Shift Keying (DPSK) is used when a signal's phase shift is measured relative to a previous signal and is a particular type of Phase Shift Keying (PSK), also known as phase modulation. Where a DPSK encoding scheme has been established with 2" possible phase shifts (n being a non-negative integer), n bits can be encoded. Thus, each signal encoded according to this DPSK encoding scheme represents n bits and so the bit rate of the encoding scheme is n times the symbol rate, where the symbol, or baud, rate is the number of variations in a data signal per second.
While it is appreciated that the term 'DPSK' used in an unqualified manner can imply, in certain circumstances, binary DPSK (a DPSK scheme in which two phase shifts are used to encode data), for the avoidance of doubt the following description can relate to any order of DPSK, i.e. Multiple Differential Phase Shift Keying (MDPSK or M-ary DPSK).
It is desirable that a wireless network should be capable of effecting high-speed transmission of packets of digital data from a transmitter of the network to a receiver of the network, and also of processing the digital data at high speeds without significant levels of errors. Errors in received data packets can occur when timing drift or wideband fading between the transmitter and receiver leads to slips; i.e., where the receiving equipment drops or requires the repeat of an entire packet of data. It is therefore desirable that the transmitter and receiver clocks should remain substantially synchronised, and that timing drift and phase movement between these clocks should be determined and monitored so that their effects can be reduced. In order to avoid errors in the received digital data, a clock timing recovery circuit is provided in the receiver of the wireless network, which is able to recover timing synchronization using a clock timing recovery signal added to a packet of data. Usually, the clock timing recovery signal is inserted in a header sequence (the earliest part) of a packet of data.
For the purpose of clarity, figure 9 illustrates a timing diagram of a packet of data in a commonly used format that could be transmitted and received in a communications system within the field of the invention. By using this format, predictable receipt and interpretation by a receiver in a wireless communication system can be effected.
Referring to Figure 9, a packet 100 comprises a header sequence 102 and a payload 104.
The header sequence 102 comprises a preamble 106, a synchronization sequence 108 for separate timing point and drift recovery, and then packet specific header information (e.g. address, message number etc) 110. The payload 104 follows the packet specific header information 1 10.
In accordance with the above discussion of the various DPSK schemes, it is often the case that the header sequence 12 of such a packet will be encoded using binary DPSK, to provide low error rate but sacrificing potential compression, while the payload 104 can then be encoded using a higher order DPSK scheme, such as using 8 or 16 phase shifts. The latter scheme will provide enhanced data compression, but at the increased risk of errors during transmission and detection - timing drift effects become more significant if a higher order DPSK scheme is used.
It will be appreciated that, in common with several packet based communications formats, the preamble 106 is optional, and is set to have good autocorrelation properties that are sufficient to perform matched filtering and training, and there is minimal cross \ correlation between the synchronization sequence 108 and the preceding preamble 106, if present.
Conventionally one of two approaches has been used for clock timing recovery in wireless systems. These can be distinguished by the terms "narrowband" and "wideband" for reasons which will become evident from the following description.
A narrowband approach assumes that the communication channel between transmitter and receiver does not significantly spread, over time, the energy of an impulse passed through it; i.e., the channel is time nondispersive. In this case, a number of techniques can be adopted. One of the most common techniques involves passing the received signal through a non-linearity to take advantage of the predictability of the temporal position of symbols defined on the waveform and to extract a tone at the symbol rate, which includes timing information. The advantage of this approach is that it recovers timing from the desired data signal and therefore no additional overhead is required.
In the case of a pilot-tone aided coherent system, where a reference signal is generated in the frequency domain, the timing information is obtained implicitly from the pilot tone.
On the other hand, a wideband approach to timing recovery involves making no assumption as to the time dispersive nature of the communications channel along which a received signal has travelled. In this case, it is necessary to determine both the timing drift between the transmitter and receiver, and the time dispersion introduced into the signal by the channel. If the unit does not accurately recover the timing offset caused by the time-dispersive channel, performance can be severely degraded due to imperfect symbol sampling. Imperfect symbol sampling can arise when the sample timings set by an analogue to digital converter in the receiver are such that samples 'miss' the peaks in energy levels in the received signal, with potential for deterioration in the accuracy and quality of the processed received data.
Several techniques are available for determining timing in such instances. In particular, if a synchronization sequence is present in the transmitted sequence, timing can be determined using a matched filter (MF) technique or an iterative scheme that is "trained" on the sequence. A matched filter is a filter where the frequency response is designed to exactly match the frequency spectrum of the input signal and the matched filter approach involves multiplying the received signal by a locally generated copy of the synchronization sequence.
However, both narrowband and wideband approaches exhibit problems. On the one hand, a narrowband approach will not accurately reflect the effect of time dispersion in the wireless channel. This results in a non-ideal sampling for each symbol, which can have a deleterious effect on performance and quality.
Further, in wideband timing estimation, for a communications protocol using a synchronization sequence, an iterative sequence needs to be inserted sufficiently often to allow tracking of both channel variability and timing drift between the transmitter and the receiver. This can impose a significant overhead in terms of data throughput, which leads to degradation of data throughput in the system, especially when, for adequate function of the data detection functionality of a receiver, timing drift is the only relevant criterion and channel variability is not a significant factor.
Accordingly, it is desirable to provide a receiver in a wireless communications system employing Differential Phase Shift Keying, with means for recovering timing from a received signal in which timing uncertainty is exhibited, addressing the effect of time dispersion while reducing the requirement for insertion of synchronization sequences in the received signal when channel variability need not be considered.
According to one aspect of the invention a receiver for receiving a signal modulated through Differential Phase Shift Keying, comprises a detector for demodulating the received signal, and a timer unit for controlling timing of demodulation in said detector, the timing unit including sampling point determination means configured to determine an initial ideal sampling point of the received signal taking account of time dispersion in the received signal, and timing drift tracking means for determining timing drift away from the initial ideal sampling point on the basis of an absence of time dispersion in said received signal from said initial ideal sampling point.
By separating the functionality of determining an initial ideal sampling point using wideband assumptions, and tracking subsequent timing drift on the basis of narrowband assumptions, it is possible to perform sample timing recovery on a single short synchronization sequence at the start of a packet of data received on said signal, and to track timing variation due to different timing references in the transmitted and received signals, without recourse to insertion of pluralities of synchronization sequences in the signal.
The sampling point determination means may be operable to determine the initial l O sampling point using a wideband technique, such as a matched filter approach.
Adoption of a narrowband technique for determining timing drift is then possible because it is reasonable to assume that the channel is stable over the duration of one packet, so one synchronization sequence will be sufficient to permit calculation of an ideal timing point. This assumption is valid if the packet duration is small relative to the channel coherence time. The coherence time can be calculated from the inverse of the Doppler spread. Packet duration may be considered small if it is less than 10% of channel coherence time.
In the case of a pedestrian user of a receiver in a system operating in the ISM band at 2.4 GHz, a Doppler frequency of 6 Hz is realistic; this results in a coherence time of the order of hundreds of milliseconds. Therefore, provided the packet length is of the order of tens of milliseconds, the assumption of correlated channel over the packet is valid.
As, in the receiver of the present invention, the timing drift is calculated separately from the initial sample point, the need for regularly inserted synchronization sequences is removed. Merely a single sequence is required at the start of each packet. A further advantage of the receiver according to the invention is that it also allows relatively inaccurate and cheap frequency references in the transmitter and receiver. For example, if a system is assumed to operate at 4 million symbols per second and data is transmitted in packets of length of 8 ms then, in order for the timing drift to be less than, say, 10% of one symbol, the required accuracy of oscillator crystals in the transmitter and receiver would be approximately 1.5 parts per million (ppm) if only one synchronization sequence were provided. Conversely, if the transmitter and receiver are assumed to be, more realistically and achievably, 20 ppm, this equates to a drift of approximately l.5 symbols over the period of one packet. Therefore, with a single synchronization sequence at the start of a packet it is vital to track the drift of an ideal sample point as otherwise by the end of a packet, the receiver will be critically out of synchronization.
In another aspect of the invention, a method for recovering timing uncertainty of a signal in a packet based wireless network, comprises the steps of determining an ideal l O sample point for a received signal in a time dispersive environment, tracking timing drift for the received signal and, from the sample point and the tracked timing drift, determining an overall timing estimate. The ideal sample point is determined taking account of the time dispersive environment and the timing drift is tracked assuming that time dispersion relative to the determined ideal sample point can be disregarded.
In the method described above, the timing uncertainty may be recovered in a receiver of a wireless communications system employing Differential Phase Shift Keying.
In a preferred embodiment of the invention, the overall timing estimate determined by the method may be used as a sample period at which a received data signal is sampled.
Preferably, the step of determining the ideal sample point includes using a matched filter.
In a further aspect of the invention, the step of tracking the timing drift comprises applying a non-linearity technique to the received signal.
The method of this aspect of the invention is capable of communicating packets of data wherein only a single synchronization sequence is required to be inserted at the start of each data packet, obviating the need to insert further synchronization sequences through the remainder of the data packet. \
Preferably, the step of determining the ideal timing point comprises applying a wideband timing point estimation algorithm. This step may include applying a half power point of an instantaneous channel impulse response.
The method according to this aspect of the invention may include the step of passing the received signal through a squaring complex operation and through a phase locked loop to track changes.
A further aspect of the invention comprises the abovedescribed method for recovering timing in packet based wireless networks in conjunction with an equalisation technique, where knowledge of the channel is required. The complex channel impulse response is calculated at the start of a data packet and timing drift throughout the remainder of the packet is calculated separately. This reduces the overhead on remaining the equaliser or recalculating the channel impulse response.
A further aspect of the invention is a system for recovering timing uncertainty in received signals in packet based wireless networks, comprising a wideband unit for determining an ideal sample point, a narrowband unit for tracking timing drift and a unit for estimating overall timing.
The wideband unit may comprise a synchronization word generator and a wideband timing point estimation unit. The narrowband unit may comprise a unit for performing a non-linear operation on the received signal, a unit to track changes in the received signal, a unit for detecting the narrowband timing point, and a unit for storing an initial value of the timing point calculated during the header sequence 102. The output from the abovedescribed system may be configured to provide an input to an equaliser.
Thus the present invention provides the advantages of ensuring good performance in a time-dispersive (wideband) channel and tracking timing drift due to relatively poor, low-cost frequency references in the transmitter and receiver; i.e., this technique can be used in a system with cheap, relatively inaccurate transmitters and receivers. al
Also, the system can operate with a single synchronization sequence per packet, therefore reducing the overhead of non-data traffic. Used in conjunction with an equalisation technique, the present invention also makes possible the advantage of reducing the overhead on retraining the equaliser or recalculating the channel impulse response.
These and other aspects of the invention will now be further described, by way of example only, with reference to the accompanying figures in which: Figure 1 is a diagram illustrating a wireless communications system in accordance with a first specific embodiment of the invention, including a transmitter and a receiver, in particular illustrating internal structure of the receiver; Figure 2 is a diagram of a timing signal shift determination unit of the receiver of Figure 1; Figure 3 is a diagram of a sampler of the receiver of Figure 1; Figure 4 is a diagram of a timing point estimator of the timing signal shift determination unit illustrated in Figure 2; Figure 5 is a diagram of a timing drift estimator of the timing signal shift determination unit illustrated in Figure 2; Figure 6 is a diagram illustrating a wireless communications system in accordance with a second specific embodiment of the invention, including a transmitter and a receiver, in particular illustrating internal structure of the receiver; Figure 7 is a diagram of a timing signal shift determination unit of the receiver illustrated in Figure 6; Figure 8 is a diagram of a sampler of the receiver of Figure 6; Figure 9 is a timing diagram of a packet of data to be received and processed by the receiver in the system illustrated in Figure 1; Figure 10 is a timing diagram of a packet of data to be received and processed by the receiver in the system illustrated in Figure 6; and Figure 11 illustrates a flow diagram setting out a process of operation of the channel response determination unit illustrated in Figure 7.
Referring to Figure 1, a wireless communications system 10 comprises a transmitter 12 comprising an antenna 14 which, in operation, transmits a signal Tx. The signal Tx is encoded using Differential Phase Shift Keying, of known format. The system further comprises a receiver 16, having an antenna 18, on which is received, in use, a received signal Rx. It will be appreciated that the form of signal Rx is dependent upon the form of signal Tx, but modified by a function determined by the transmission medium through which the signal Tx is transmitted to the aerial 18 of the receiver 16. Thus, received signal Rx will not be equal to the transmitted signal Tx, nor is it likely to be linearly related to transmitted signal Tx, as non-linear effects such as noise and attenuation are likely to affect the quality of the received signal Rx.
The receiver 16 includes a sampler 20 which is operable to receive the received signal Rx, and a timing signal shift determination unit 26, which receives the sampled header signal and the sampled signal from the sampler 20. The timing signal shift determination unit 26 is operable to determine a suitable sampling point for a detector 28, processing the received signal Rx, for an output unit 30 on which user output functionality is performed. The sampling point is encoded as an integer representing one of the defined sampling positions within the differential phase shift keying protocol adopted by the system. The detector 28 and output unit 30 are of conventional form.
The sampler 20 is described in further detail with respect to Figure 3. The sampler operates to convert the received analogue signal into pulses that can be interpreted by further parts of the receiver 16. The sampler 20 is configured to output a signal, bearing a stream of sample pulses corresponding with instantaneous 'captures' of the received signal Rx. The sampler is set at a sampling rate defined by a sample period ts which is determined by the following equation: t = YYmb
M
where tSymbo, is the symbol period, i.e. the period of time representing a unit of data in a Differential Phase Shift Keying signal; and M is an oversampling factor.
As illustrated in Figure 3, the sampler 20 comprises a sampling unit 22 configured to sample at the sample period ts as described above. This sampled signal is output from the sampler 20 for use in determining timing signal shift. Further, the sample signal is passed to a header masking unit 24, which selectively masks the sampled signal over the timing of the header sequence 102 so as to output a sampled header, corresponding to the header sequence 102 of packets of data in accordance with the format illustrated in Figure 9, received on the received signal Rx. The masked sampled signal, hereinafter referred to as the sampled header signal, is used by the timing signal shift determination unit 26 to determine an initial timing point from which a relative drift in timing can be monitored, and thereby an overall timing estimate.
The timing signal shift determination unit 26 will now be described in further detail with reference to Figure 2. The timing signal shift determination unit 26 comprises a timing point estimator 32, which receives the sampled header signal, and a timing drift estimator 34, which receives the sampled signal, both from the sampler 20. The timing point estimator 32 determines an initial timing point estimate on the basis of the sampled header, and the timing drift estimator 34 determines, through the passage of a packet of data on the received signal Rx, the timing drift that can be estimated on the basis of received data. These determined timings are then passed to an adder 36, which adds the timings together to generate an overall timing estimate for supply to the detector 28. The detector 28 is then configured to sample the received signal Rx at a time corresponding to the overall timing estimate determined by the timing signal shift
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determination unit 26 to ensure effective capture of data carried on the received signal Rx.
The timing point estimator 32 is described in further detail in Figure 4. The timing point estimator comprises a synchronization sequence generator 40 and a multiplication unit 42. The multiplication unit 42 is configured to multiply the sampled header by a synchronization sequence generated by the synchronization sequence generator 40, and output the product to a wideband timing point estimator 44. This is a matched filter approach the synchronization sequence generated by the synchronization sequence generator 40 is the same as that included in the packet received in the signal. By focusing in on a known piece of the received data, it is possible to determine the timing associated with the received data.
In a non-dispersive environment, this would give a peak corresponding to the position of the ideal timing point. However, in the present case, in which time dispersion is assumed to be evident, the ideal value for the timing is determined using the wideband timing point estimator 44. This wideband timing point estimator 44 generates a wideband timing point estimate t which is output from the timing point estimator 32.
The wideband timing point estimator 44 is of known type, applying an algorithm employing a half power point of the instantaneous channel impulse response. Half power algorithms are well known in the field of the invention (e.g. "Characterisation of Randomly Time-Variant Linear Channels", Bello, P.A., IEEE Transactions on Communications Systems, Vol. CS-11, pp.360-393, December 1963).
The structure and function of the timing drift estimator 34 is illustrated in Figure 5. The timing drift estimator 34 calculates the initial value of narrowband timing for the received packet, which is then used as a reference for determining the extent to which the timing varies from the beginning to the end of the packet. The timing drift estimator 34 comprises a complex squaring unit 50 which receives the sampled signal from the sampler 20 and applies a complex square function to the received sampled signal.
The squared signal is then passed to a digital phase-locked loop 52 which tracks changes in the squared sampled signal. A timing point detector 54 determines a narrowband estimate of initial timing drift ATo defined during the header sequence period of the packet of data received on the received signal Rx, a switch 56 throws across to enable ATo to be passed to an initial value store 58. For the remainder of the duration of the packet of data through the system, the switch 56 throws back across to pass ATn to an adding unit 60, where ATo, stored in the initial value store 58, is subtracted from ATn, thereby determining a narrowband timing drift difference ATn - ATo. This is then finally passed through a module function unit 62, which applies a module M function to the difference, where M is the oversampling factor noted above, and outputs a narrowband timing drift estimate lATn - ATol.
The module function is desirable as it ensures that the drift estimate is constrained to be less than one symbol equivalent in time, thus avoiding any anomalies that could arise from allowing adjustments of more than a symbol duration to be made to the timing of the detector 28.
It will be appreciated that wideband timing point estimators of other types, but performing the same overall function, could be used instead of the wideband timing point estimator 44 described in this embodiment.
Figure 6 illustrates a second specific embodiment of the invention in which a wireless communications system 200 is composed of a transmitter 212 comprising an antenna 214 transmitting a transmitted signal Tx to a receiver 216 comprising an antenna 218 receiving a received signal Rx. In this embodiment, the data detection function of the receiver is performed on the assumption that the communications channel on which the received signal Rx has been carried is variable, and thus equalisation is required. In those circumstances, the signal-carrying characteristic (attenuation, etc.) should be calculated so that equalisation can be applied to the received signal Rx.
For the purpose of this embodiment, the format of the transmitted signal is that it is encoded by differential phase shift keying (DPSK) and bears data in a packet format as illustrated in Figure 10. A timing diagram in Figure 10 sets out how sequential data in a packet, in accordance with this embodiment, is allocated. This allows for predictable
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receipt and interpretation by the receiver 216. The packet 120 comprises a header sequence 122 followed by a payload 124. The header sequence 122 comprises a preamble 126, a synchronization word 128, and packet specific header information 130 (e.g. address, message number, etc.). The payload 124 follows the packet specific header information 130, and comprises a plurality of segments 132, each being followed by a cyclic redundancy checking (CRC) sequence 134.
As noted earlier in relation to the packet sequence illustrated in Figure 9, the header sequence 122 is encoded using a binary DPSK scheme, while the payload 124 is encoded using a higher order DPSK scheme, such as quaternary (four possible phase differences) or octal (eight possible phase differences). Binary DPSK provides accurate transmission of the header sequence, keeping error rates at a minimum while sacrificing transmission rate for a relatively small part of the overall packet duration; in contrast higher order DPSK can provide enhanced data compression though there can be a corresponding increase in rate of transmission and detection errors.
It should be noted that the length of the payload 124 is likely, in general, to be substantially larger than the header sequence 122 in practice, perhaps as great as 1000 times as long. The relative length of the header sequence in the example illustrated in Figure 10, and indeed in Figure 9, is exaggerated to allow the features of the header sequence to be illustrated with enhanced clarity.
The receiver 216 comprises a sampler 220, which receives the received signal Rx from the antenna 218, and is operable to provide a sampled header signal and a sampled payload signal to a channel response determination unit 226. A detector 228, of conventional form, receives signals from the sampler 220 and the channel response determination unit 226, to provide an output signal bearing data extracted from the received signal Rx to an output unit 230. This output signal of the detector 228 is fed back to the channel response determination unit 226 in order to configure further the function of the latter unit.
As illustrated in Figure 8, the sampler 220 comprises a sampling unit 222 operable to take samples at a sample rate defined by a sample period tS which is defined in the same way as the sample period tS in the first embodiment described above. The sampler 220 comprises a switch timed to separate the header sequence 122 from the payload 124, directing the header sequence 122 to an output sample header signal and the payload 124 to a sampled payload signal. As illustrated in Figure 7, the channel response determination unit 226
receives a sampled header signal and a sampled payload signal from the sampler 220. The sampled header signal is received in a wideband channel estimator 240 of the timing signal determination unit 226, the wideband channel estimator 240 further receiving an input from a synchronization word generator 242 which generates a synchronization word corresponding with the synchronization word 128 inserted in the packet structure illustrated in Figure 10. The wideband channel estimator 240 processes the header sequence 122 carried on the sampled header signal, with reference to the local copy of the synchronization word generated by the synchronization word generator 242, to provide an initial estimate of the channel input response for the communications channel between the antenna 214 of the transmitter 212 and the antenna 215 of the receiver 216. The wideband channel estimator 240 outputs this initial estimate of channel response to the detector 228.
The channel response determination unit 226 receives the sampled payload sequence 124 from the sampler 220. The payload sequence is stored in a payload memory 244, and passed to a narrowband channel estimator 246. The narrowband channel estimator 246 determines for each segment 132 in the payload sequence 124 an up-to- date channel response estimate for the communications channel. This is calculated on the basis of a reference received from detector 228 which is provided dependent on successful cyclic redundancy checking by detector 228. The detector 228 indicates the success (or otherwise) of the CRC check on a CRC check signal sent to the channel response determination unit 226. If this check is successful, then the detector output is passed to the narrowband channel estimator 246 as a reference from which estimation of the channel response can be made.
Figure 11 illustrates a flow diagram process performed by the channel response determination unit 226, in use. The process is cyclical in nature; it will be appreciated that, as an initial step, the process should be initialised, by any suitable initialization procedure.
In a first step S2, the channel response determination unit 226 waits to receive a new packet of information from the sampler 220. On receipt of a packet, the channel response determination unit 226, in step S4, calculates channel response from the synchronization word 128 received in the header sequence 122. Then, in step S6, the channel response determination unit 226 detects segment data 132 in the payload 124.
In step S8, the channel response determination unit 226 then checks whether the segment detected in step S6 is the last segment of the packet 120. If so, the channel response determination unit 226 restarts the process by waiting to receive a new packet of data 120 in step S2. Step S6 accounts for the fact that the channel response estimate for the last segment in the packet will have little or no bearing on the channel response encountered by segments of the next packet to be received, which may arrive in the equivalent of several packet lengths in time later.
For any other segment of the packet, the channel response determination unit 226 proceeds from step S8 to step S10 in which the cyclic redundancy checking result from the detector 228 is noted by the channel response determination unit 226. If the CRC check has returned a fail, then in conditional step S 10, the process is returned to step S6 and further segment data is detected. Otherwise, if the CRC check has passed, then step S 10 is followed by step S 12 in which the most recently detected segment is used to perform decision direct training to form a new channel estimate to be output to the detector 228. Then, the process reverts to step S6, and further segment data is detected.
By checking for cyclic redundancy in the CRC check, the process ensures that data that contains errors is not used for training the channel estimate algorithm. While this is clearly advisable and desirable, it is possible that this process is at risk from failure should a long sequence of packets of data, all containing errors, be received. With the abovedescribed approach, the channel estimate would not, in such circumstances, be tracked or updated during the receipt of such a sequence. If the channel response were to change considerably during this period, or the ideal timing for it, as calculated by the channel response determination unit 226 from the received synchronization word, has a \ large drift during this period, then the channel estimate may be substantially divergent from the real channel response, and so the receiver 216 could have difficulty in recovering synchronization from this situation. Segment errors would then continue until the end of the packet concerned.
To avoid this problem, it would be possible to determine a timing point drift as described in relation to the first embodiment, or to perform retraining of the channel, even on segments that are received in error. While it is not desirable to use segments contain errors, this provides better estimation than not performing any retraining at all.
Segments containing errors could be used in conditions where the time since the last retraining step exceeds a certain number of segments.
For example, step S 10 could be followed by a further step setting a counter. The counter is used to count the number of consecutive segments of data for which the detector 228 returns a signal that the CRC check has failed. Should the count stored by the counter exceed a predetermined number (such as, for example, five) then the next segment, whether or not it had corresponded with a failure of the CRC check performed by the detector 228, would be passed to step S 12 for training of the channel estimate; the process would then return to step S6 for detection of further segment data.
It will be appreciated that in both of the formats described in connection with the described embodiments of the invention, in common with several packet based communications formats, the preamble is optional, and is set to have good autocorrelation properties that are sufficient to perform matched filtering and training, and there is minimal cross correlation between the synchronization sequence and the preceding preamble, if present.
While not limiting the applicability of the invention in any way, the invention is particularly suited to short range, wireless communications systems, such as operable to communicate in distances of approximately 10 metros. Such a system employs the communications protocol established under the Bluetooth trade mark (Bluetooth is a registered trade mark of Bluetooth SIG, Inc.), details of which are publicly available from that organization. \
The skilled person will further recognise that the invention may be implemented by a combination of dedicated hardware and functions implemented in software.
Such a method and system for recovering timing uncertainty in packet based wireless networks are particularly useful since it is possible to reduce the cost of the frequency references in the transmitter and receiver, as relatively inaccurate frequency references can be used.
It will be appreciated that the system and method described above are capable of being implemented on commonplace hardware components configured by a suitable software product. For example, the hardware components could comprise general purpose computing apparatus. The software product can be supplied as stored on a storage medium, such as an optically or magnetically readable storage medium, or by means of a signal transmitting a file executable by hardware to cause the hardware to become configured in accordance with an embodiment of the invention. The signal could be generated as part of a download operation making use of internet functionality, causing retrieval of a file stored at a remote server location, the file being suitably executed as a program at a general purpose computer.
Though the specific embodiments described herein show particular implementations of the invention and demonstrate its advantages, other embodiments will be apparent from the description and the scope of protection sought herein is defined by the claims appended hereto with reference to the description and the drawings; no statement in this description should be interpreted as a specific limitation on the generality expressed in the claims.

Claims (6)

  1. CLAIMS: 1. A receiver for use in a wireless communication system employing
    phase shift keying, in which a packets of data are communicated that comprise a header sequence including a synchronization word and a payload sequence encoded using a phase shift keying protocol, the receiver including means for recovering channel response and timing uncertainty, and further comprising: initial channel estimation means for determining an initial channel estimate using a wideband technique for controlling sampling and equalising said payload sequence to extract data therefrom; tracking means for tracking channel response from said channel estimate using a narrowband technique; and overall channel response determining means for calculating an overall channel response estimate on the basis of said initial channel estimate and said tracked channel response.
  2. 2. A method for recovering timing uncertainty in a receiver of a wireless packets based communication system in which a packet comprises a header sequence including a synchronization word and a payload sequence encoded using a phase shift keying protocol, the method comprising the steps of: determining an initial channel estimate using a wideband technique for controlling sampling and equalising said payload sequence to extract data therefrom; tracking channel response from said channel estimate using a narrowband technique, and, calculating an overall channel response estimate on the basis of said initial channel estimate and said tracked channel response.
  3. 3. A computer software product, stored on a computer readable storage medium, operable to configure a computer to operate as a receiver in accordance with claim 1.
  4. 4. A computer software product, carried on a computer receivable signal, operable to cause a computer to operate as a receiver in accordance with claim 1.
  5. 5. A method for recovering timing uncertainty in packet based wireless networks substantially as hereinbefore described with reference to Figures 6 to 8 of the accompanying drawings.
  6. 6. A system for recovering timing uncertainty at the receiver of a packet based wireless network substantially as hereinbefore described with reference to Figures 6 to 8 of the accompanying drawings.
GB0502378A 2003-12-22 2003-12-22 Method and apparatus for recovering timing in packet based wireless networks Expired - Fee Related GB2409612B (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687198A (en) * 1996-01-04 1997-11-11 Motorola, Inc. Channel estimation in a communication system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2045338C (en) * 1990-06-26 1995-07-04 Shousei Yoshida Clock recovery circuit with open-loop phase estimator and wideband phase tracking loop

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5687198A (en) * 1996-01-04 1997-11-11 Motorola, Inc. Channel estimation in a communication system

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GB2409604B (en) 2006-02-08
GB0329685D0 (en) 2004-01-28
GB2409604A (en) 2005-06-29
GB0502378D0 (en) 2005-03-16

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