GB2394815A9 - Scheduling instruction streams in a SIMD array wherein a determination is made as to which stream has priority and that stream is transferred to the array - Google Patents

Scheduling instruction streams in a SIMD array wherein a determination is made as to which stream has priority and that stream is transferred to the array

Info

Publication number
GB2394815A9
GB2394815A9 GB0400893A GB0400893A GB2394815A9 GB 2394815 A9 GB2394815 A9 GB 2394815A9 GB 0400893 A GB0400893 A GB 0400893A GB 0400893 A GB0400893 A GB 0400893A GB 2394815 A9 GB2394815 A9 GB 2394815A9
Authority
GB
United Kingdom
Prior art keywords
stream
array
priority
determination
transferred
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0400893A
Other versions
GB2394815B (en
GB0400893D0 (en
GB2394815A (en
Inventor
John Rhodes
Ken Cameron
David Stuttard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ClearSpeed Technology Ltd
Original Assignee
ClearSpeed Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ClearSpeed Technology Ltd filed Critical ClearSpeed Technology Ltd
Publication of GB0400893D0 publication Critical patent/GB0400893D0/en
Publication of GB2394815A publication Critical patent/GB2394815A/en
Publication of GB2394815A9 publication Critical patent/GB2394815A9/en
Application granted granted Critical
Publication of GB2394815B publication Critical patent/GB2394815B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
GB0400893A 1999-04-09 1999-04-09 Parallel data processing systems Expired - Fee Related GB2394815B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9908230A GB2348984B (en) 1999-04-09 1999-04-09 Parallel data processing systems

Publications (4)

Publication Number Publication Date
GB0400893D0 GB0400893D0 (en) 2004-02-18
GB2394815A GB2394815A (en) 2004-05-05
GB2394815A9 true GB2394815A9 (en) 2004-06-07
GB2394815B GB2394815B (en) 2004-08-25

Family

ID=10851303

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0400893A Expired - Fee Related GB2394815B (en) 1999-04-09 1999-04-09 Parallel data processing systems
GB9908230A Expired - Fee Related GB2348984B (en) 1999-04-09 1999-04-09 Parallel data processing systems

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB9908230A Expired - Fee Related GB2348984B (en) 1999-04-09 1999-04-09 Parallel data processing systems

Country Status (1)

Country Link
GB (2) GB2394815B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6968445B2 (en) * 2001-12-20 2005-11-22 Sandbridge Technologies, Inc. Multithreaded processor with efficient processing for convergence device applications
GB2417105B (en) 2004-08-13 2008-04-09 Clearspeed Technology Plc Processor memory system

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56127266A (en) * 1980-03-10 1981-10-05 Ibm Method of executing and controlling command stream
US4435758A (en) * 1980-03-10 1984-03-06 International Business Machines Corporation Method for conditional branch execution in SIMD vector processors
US4484273A (en) * 1982-09-03 1984-11-20 Sequoia Systems, Inc. Modular computer system
US4985832A (en) * 1986-09-18 1991-01-15 Digital Equipment Corporation SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors
US5127104A (en) * 1986-12-29 1992-06-30 Dataflow Computer Corporation Method and product involving translation and execution of programs by automatic partitioning and data structure allocation
US4939638A (en) * 1988-02-23 1990-07-03 Stellar Computer Inc. Time sliced vector processing
US5212777A (en) * 1989-11-17 1993-05-18 Texas Instruments Incorporated Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation
JPH04219859A (en) * 1990-03-12 1992-08-10 Hewlett Packard Co <Hp> Harware distributor which distributes series-instruction-stream data to parallel processors
WO1992007335A1 (en) * 1990-10-19 1992-04-30 Cray Research, Inc. A scalable parallel vector computer system
US5590345A (en) * 1990-11-13 1996-12-31 International Business Machines Corporation Advanced parallel array processor(APAP)
US5828894A (en) * 1990-11-13 1998-10-27 International Business Machines Corporation Array processor having grouping of SIMD pickets
CA2073516A1 (en) * 1991-11-27 1993-05-28 Peter Michael Kogge Dynamic multi-mode parallel processor array architecture computer system
US5437045A (en) * 1992-12-18 1995-07-25 Xerox Corporation Parallel processing with subsampling/spreading circuitry and data transfer circuitry to and from any processing unit
CA2129882A1 (en) * 1993-08-12 1995-02-13 Soheil Shams Dynamically reconfigurable interprocessor communication network for simd multiprocessors and apparatus implementing same
JP3199205B2 (en) * 1993-11-19 2001-08-13 株式会社日立製作所 Parallel processing unit
US6167502A (en) * 1997-10-10 2000-12-26 Billions Of Operations Per Second, Inc. Method and apparatus for manifold array processing
US6366998B1 (en) * 1998-10-14 2002-04-02 Conexant Systems, Inc. Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model

Also Published As

Publication number Publication date
GB2348984A (en) 2000-10-18
GB9908230D0 (en) 1999-06-02
GB2394815B (en) 2004-08-25
GB0400893D0 (en) 2004-02-18
GB2348984B (en) 2004-05-12
GB2394815A (en) 2004-05-05

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20101111 AND 20101117

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20180409