GB2373934A

GB2373934A - Detecting an unacceptable state of load in a power circuit and providing power to the load only if detected voltage is below a predetermined threshold

Info

Publication number: GB2373934A
Application number: GB0128666A
Authority: GB
Inventors: Frank Schackmann
Original assignee: Automotive Lighting Reutlingen GmbH
Current assignee: Marelli Automotive Lighting Reutlingen Germany GmbH
Priority date: 2001-03-30
Filing date: 2001-11-30
Publication date: 2002-10-02
Anticipated expiration: 2021-11-30
Also published as: GB2373934B; DE10115869B4; DE10115869A1; GB0128666D0; FR2823034A1

Abstract

A power circuit having a load 13,14 which can be connected by a power switch 22 and a diagnostic switch 21 connected in parallel with the power switch 22, has a signal processing means 15 which detects a switching signal 16,17 and turns on the diagnostic switch 21 for a predetermined period. The voltage UT at the power switch 22 is compared with a predetermined threshold voltage US and if the voltage UT is below the threshold voltage US the power switch 22 is turned on via a control signal Ugate.

Description

Device for diagnosing a power circuit The invention is based on a device for diagnosing a power circuit according to the preamble of the independent claim.

From DE-A 43 16 185 a power circuit has become known in which the control voltage of the power transistor is reduced or, if applicable, completely turned off as a function of a voltage which can be tapped at a break of a power transistor, in order to protect the power transistor from thermal overload.

From DE-A 198 54 821 a power circuit has become known which contains a power transistor to which a diagnostic transistor is connected in parallel, which has an integrated overload protection and an integrated overload diagnostic output. The diagnostic transistor is triggered via the, if applicable, inductive voltage peaks when the power transistor is connected. Frequent connecting of the diagnostic transistor leads to heating up of the diagnostic transistor, which is reported after an internal threshold has been exceeded to a signal-processing arrangement via the diagnostic output.

The object of the invention is to provide a device for diagnosing a power circuit which allows protection of a power transistor from overloading using economical means. The device according to the invention for diagnosing a power circuit contains a power switch, for example a transistor, for connecting a load. A diagnostic switch, for example a transistor, is connected parallel to the power switch. A signal-processing arrangement establishes that a switch signal is present, which is to lead to connecting of the power transistor and thus to switching on of the load.

Once the switch signal is present the signal-processing arrangement provides a first control signal for switching on the diagnostic switch. A comparator compares the voltage or at least one measurement for the voltage at the power switch with a predetermined threshold value. As a function of the result of the comparison a second control signal for switching on the power switch is provided or suppressed.

The device according to the invention allows detection of an unacceptable state of the load, such as, for example, a short circuit. A substantial advantage of the device according to the invention is its economical implementation, which gives rise to cost advantages particularly in mass production.

Advantageous configurations and developments of the device according to the invention for diagnosing a power circuit emerge from dependent claims.

A first advantageous configuration provides that the switch signal, which triggers the diagnosis, is tapped by the power switch. As the voltage at the power switch can be detected anyway, economical implementation arises. Another advantageous configuration provides that the switch signal occurring at a switch which can be actuated by an operator is used.

An advantageous configuration provides that the first control signal, which switches on the diagnostic switch, is limited to a predetermined first period of time. With this measure, overloading of the diagnostic switch in the event of a fault in the load, for example a short circuit, is prevented.

Advantageously the diagnostic switch is constructed as a bipolar transistor, so limiting of current can be provided by a basic resistor and/or a negative feedback resistor in the emitter-to-collector circuit.

An advantageous further development provides that an analogue signal memory is present, which stores the voltage occurring at the power switch for a later comparison. According to an advantageous configuration the analogue signal memory contains a capacitor, which is preferably discharged via a transistor during the first time period.

An advantageous configuration provides that the load contains two load parts connected in series and that the power switch is connected to a central tap of the two load parts. The load parts are, for example, electromagnets, arranged in an adjustment drive. When the power switch is switched off in this configuration the two load parts are connected in series and when the power switch is connected one load part is bypassed. The power circuit can then be designed in such a way that the electromagnetic force can be increased for a predetermined period, during which an adjustment process should occur. The adjustment drive should subsequently have a holding function. One possibility for use is shown in a headlight of a motor vehicle, in which the adjustment drive performs a switch over between driving light and main beam.

The invention will now be described further by way of example with reference to the accompanying drawings in which : Fig. 1 shows a wiring diagram of a device according to the invention for diagnosing a power circuit, and Figs. 2a to 2e show signal courses as a function of time, occurring in the device according to the invention according to Fig. 1.

Fig. 1 shows a power source 10, connected to an electrical circuit earth 11. The power source 10, which as an operating voltage UBat, can be connected via a switch 12 to a first load 13, connected in series to a second load 14, wherein the second load 14 is applied to the circuit earth 11.

A signal-processing arrangement 15 is provided, to which a first switch signal 16, which occurs at the switch 12, is supplied. The signal-processing arrangement 15 further contains a second switch signal 17 supplied by a first comparator 18 and a third switch signal 19 supplied by a second comparator 20.

The signal-processing arrangement 15 emits a first control signal Ubasis to a diagnostic switch 21 and a second switch signal Ugate to a power switch 22.

The power switch 22 connects a central tap 23 of the loads 13, 14, connected to one another, to the circuit earth 11. The voltage UT occurs at the central tap 23. The central tap 23 is further connected to the first comparator 18, a first break connection 24 of the diagnostic switch 21 and to the control connection 25 of a switch transistor 26.

A first control signal UBasis arrives via a current limiting resistor 27 at a control connection 28 of the diagnostic switch 21, the second break connection 29 of which is connected to the circuit earth 11 via a negative feedback resistor 30.

A first break connection 31 of the switch transistor 26 is connected to a memory capacitor C, to the second comparator 20 and to a charging resistor R. A second break connection 32 of the switch transistor 26 is connected, as is the memory capacitor C, to the circuit earth 11.

The first comparator 18 compares the voltage UT at the power switch 22 with a predetermined threshold voltage US and emits the second switch signal 17 as a function of the result of the comparison, while the second comparator 20 compares a capacitor voltage UC occurring at the memory capacitor C with the threshold voltage US and emits the third switch signal 19 as a function of the result of the comparison.

Fig. 2a shows the first switch signal 16 as a function of time t. The first switch signal 16 occurs at a first time Tl and ends at a fifth time T5. Fig. 2b shows the first control signal UBasis as a function of time t. The firs-c control signal UBasis occurs at a second time T2 and ends at a third time T3.

Fig. 2c shows the second control signal UGate as a function of time t. The second control signal UGate occurs at the third time T3 and ends at a fourth time T4.

Fig. 2d shows the voltage UT at the power switch 22 as a function of time t. At the first time Tl the voltage UT jumps to a first amount UM which occurs when the power switch 21 is switched off, in other words the two loads 13,14 are connected in series. At the second time T2 the voltage UT jumps to a residual voltage UCES, which occurs between the first break connection 24 and the second break connection 29 of the diagnostic switch 21. At the third time T3 the voltage UT jumps to a residual voltage UDSS. At time T4 the voltage UT jumps back to the first amount UM and stays there until the fifth time T5, at which it falls back to the amount zero.

Fig. 2e shows the voltage UT at the power switch 22 in the case of a fault. The voltage UT jumps at the first time Tl to the operating voltage UBat and stays there until the fifth time T5, at which the voltage UT falls back to the amount zero again. In the case of a fault the power switch 22 is not switched on between T3 and T4.

In Fig. 2d and 2e is further entered the threshold voltage US, which is supplied to the two comparators 18,20.

The device according to the invention for diagnosing a power circuit operates as follows: The operating voltage UBat of the power source 10 is applied with the switch 12 to the two loads 13,14, connected in series. After the switch 12 has been actuated at the first time T1 the first switch signal 16 shown in Fig. 2a occurs. Opening of the switch 12 to switch off the loads 13,14 occurs at the fifth time T5.

The two loads 13,14 are, for example, electromagnets, arranged in an adjustment drive, not shown in greater detail.

Division of the load into a first and second load 13,14 allows predetermining of two different forces, wherein the greater force can serve during the adjustment process and the smaller force for holding the adjustment drive at a predetermined position. The smaller force occurs when the first and second load 13,14 are connected in series with the power switch 22 switched off. An advantageous configuration provides that the force provided by the first load 13 is greater than that of the second load 14. When the power switch 22 is switched on the second load 14 is bypassed and the first load 13 is connected directly to the circuit earth 11. In this operating state a greater force is made available for, for example, an adjustment process.

The power switch 22 is preferably a transistor, preferably an MOS field effect transistor. A short circuit in the first load 13 or an event which would otherwise lead to an increased current can destroy the power switch 22, in particular an MOS field effect transistor.

The device according to the invention provides a diagnosis in which the voltage UT occurring at the power switch 22 or a measurement for the voltage UT when the power switch 22 is switched off is compared with a predetermined threshold value US.

The signal-processing arrangement 15 contains the information that the power switch 22 should be switched on, for example by the occurrence of the first switch signal 16, which occurs when the switch 12 is actuated at the first time T1. Another possibility of recognising the desire to switch on consists of evaluating the voltage UT at the power switch 22 by means of the first comparator 18.

Firstly the case is described in which the first load 13 is operating correctly. After the first time Tl the first switch signal 16 occurs and simultaneously the voltage UT at the power switch 22 according to Fig. 2d jumps to the first amount UM. The first amount UM emerges through division of the voltage at the inner resistors of the two loads 13,14, which occurs at the central tap 23 to which the power switch 22 is connected. Provision of the switch-on state of the power switch 22 at the first time Tl is accordingly detected by occurrence of the first switch signal 16 or with the voltage UT, which exceeds the threshold voltage US. The first comparator 18 thereupon outputs the second switch signal 17.

Both the signal-processing arrangement 15 and the comparators 18,20 are preferably constructed as a microprocessor circuit. The function of the two comparators 18,19 is taken on in each case by an input port of the microprocessor, wherein the threshold voltage US corresponds to the threshold voltage of the port of the microprocessor. In the embodiment shown the same threshold voltage US is therefore provided for both comparators 18,20.

The signal-processing arrangement 15 according to Fig. 2b subsequently emits the first control signal UBasis to the diagnostic switch 21. The diagnostic switch 21 is advantageously a transistor, preferably a bipolar transistor.

The substantial advantage of this measure is that with the current limiting resistor 27 at the control connection 28 the current flowing through the transistor 21 can be limited to a predetermined value, which at least approximately emerges from the current flowing in the control connection 28 multiplied by the current reinforcement factor of the transistor. A further measure to limit the current is offered by the negative feedback resistor 30, located between the second break connection 29 and the circuit earth 11. The negative feedback resistor 30 stabilises the operational point of the transistor 21 by reducing the current flowing in the control connection 28 to the second break connection 29 owing to the increase in the voltage drop at the negative feedback resistor 30 with increasing current.

With a correct first load 13 as the basis, at the second time T2 according to Fig. 2d the voltage at the diagnostic switch 21 drops to the residual voltage UCSS, corresponding to the residual voltage of the switched on diagnostic switch 21. The first comparator 18 detects the fall in voltage UT below the threshold voltage US and provides the second switch signal 17.

Owing to the correct fall below the threshold voltage US at the third time T3 the signal-processing arrangement 15 emits to the power switch 22 the second control signal UGate, which fully switches on the power switch 22 and thus the first load 13. The second load 14 is at this time bypassed by the switched on power switch 22. While the second control signal UGate is present according to Fig. 2c the power switch 22 draws the voltage UT down to the residual voltage UDSS shown in Fig. 2d, which occurs at the power switch 22 in the switched-on state. An advantageous configuration provides that the second control signal UGate is time-limited and is present only during a second period corresponding to the time difference between the third and fourth time T4-T3. In so far as the loads 13,14 are arranged in the already described adjustment drive, overloading of the drive can be prevented with this measure. A further advantage is the additional protection of the power switch 22 with respect to longer-term heating up. At the fourth time T4 the signal-processing arrangement 15 therefore ends the switched-on state of the power switch 22 by switching off the second control voltage UGate. At the fourth time T4 the voltage UT jumps back to the first amount UM. This operating state is ended at time T5 when the switch 12 is opened.

Behaviour in the case of a fault in the first load 13 is described below: A fault in the first load 13 is understood to be, for example, low impedance or a short circuit in the first load 13. If a power switch 22 was switched on an occurring excess current could lead to destruction of the power switch 22. After the switch 12 has been actuated the signal-processing arrangement again detects, either because of the occurrence of the first switch signal 16 or because of the occurrence of the second switch signal 17, that switching on of the power switch 22 should take place. The voltage UT jumps at the first time Tl in the case of a short circuit in the first load 13 to the operating voltage UBat of the power source 10. In so far as there is no short circuit, but a state of slightly low impedance in the first load 13, the voltage UT is at a correspondingly lower value, but which is always higher than the first amount UM occurring with a correct first load 13. At the second time T2 the signal-processing arrangement 15 thereupon causes output of the first control signal UBasis for switching on the diagnostic switch 21. In the case of a fault the diagnostic switch 21 is not able to draw the voltage UT below the predetermined threshold voltage US. Destruction of the bipolar transistor, provided as diagnostic switch 21, by an unacceptably high current is avoided on the one hand by the current limiting resistor 27 and/or by the optionally provided negative feedback resistor 30.

The first comparator 18 does not provide a second switch signal 17 after the second time T2, so the signal-processing arrangement 15 detects that there is a fault. Providing the second control signal UGate for switching on the power switch 22 is omitted in this case of operation. Destruction of the power switch 22 is effectively prevented with this measure. The operating state now existing is retained until the fifth time T5, in which the switch 12 is opened.

The first period of time, corresponding to the difference between the times T3-T2, during which the first control signal UBasis is provided is expediently kept short and is, for example, in the range of microseconds. With this measure on the one hand an increase in temperature in the diagnostic switch 21 is avoided if a fault is present. On the other hand the necessary time expenditure for the diagnosis is reduced.

In so far as the signal-processing arrangement 15 is implemented as a microprocessor circuit, in which the input ports take on the function of the comparators 18,20, owing to the operational loading of the signal-processing arrangement 15 the case can occur owing to further tasks, not described in greater detail, that during the short period of time between the second and third times T2, T3 the corresponding input port is not scanned. According to a further development the further switch transistor 26, the memory capacitor C, the charging resistor R and the second comparator are therefore provided.

The switch transistor 26, the capacitor C and the charging resistor R together form an analogue signal memory which also makes available the voltage UT or a measurement for the voltage UT as capacitor voltage UC after the third time T3.

The control connection 25 of the switch transistor 26 is connected to the central tap 23, at which the voltage UT occurs. When the switch transistor 26 is turned off the memory capacitor C is loaded to the operating voltage UBat via the charging resistor R with the switch 12 closed. Switching on the diagnostic switch 21 takes place after the occurrence of the first switch signal 16. In so far as the diagnostic switch 21 draws down the voltage UT below the threshold voltage US, the switch transistor 26 is switched on and thus the memory capacitor C is abruptly discharged. The voltage UC at the charging capacitor C is thus also below the threshold voltage US, so the second comparator 20 provides the third switch signal 19. Owing to the memory effect of the memory capacitor C the capacitor voltage UC is also below the threshold voltage US even after the third time T3 with a correct state of the first load 13, so the signal-processing arrangement 15 even after the third time T3 still has the opportunity to establish this correct state by means of the third switch signal 19 of the second comparator 20. When the switch transistor 26 is switched off after the third time T3 the capacitor voltage UC increases, wherein the resulting time constant can be fixed by the charging resistor R. The capacitor voltage UC does not coincide with the voltage UT at the central tap 23 at the power switch 22, but represents at least one measurement which allows detection of whether the voltage UT is below the threshold voltage US.

Claims

CLAIMS 1. Device for diagnosing a power circuit, containing at least one load (13,14), which can be connected by at least one power switch (22), to a diagnostic switch (21), connected parallel to the power switch (22), in which a signal processing arrangement (15) is provided which after the present of a switch signal (16,17) provides a first control signal (Ubasis) for switching on the diagnostic switch (21), a comparator (18,20) being provided, which compares a measurement for the voltage (UT) at the power switch (22) with a predetermined threshold value (US) and in which as a function of the result of the comparison a second control signal (Ugate) for switching on the power switch (22) is provided or suppressed.
2. A device as claimed in claim 1 in which the switch signal (17) is derived from the voltage (UT) at the power switch (22).
3. A device as claimed in claim 1 in which the switch signal (16) occurs at a switch (12).
4. A device as claimed in any one of the preceding claims, in which the first control signal (Ubasis) is limited to a predetermined first period of time (T3-T2).
5. A device as claimed in any one of the preceding claims, in which the diagnostic switch (21) is a bipolar transistor.
6. A device as claimed in claim 5, in which a current limiting resistor (27) is provided at the control connection (28) of the diagnostic switch (21) and/or a negative feedback resistor (30) is provided at a second break connection (29) of the diagnostic switch (21).
7. A device as claimed in any one of the preceding claims, in which the power switch (22) is an MOS field effect transistor.
8. A device as claimed in any one of the preceding claims, in which the load contains a first and second load part (13, 14), connected to one another in series, and in which the power switch (22) is connected at the central tap (23) of the two load parts (13,14).
9. A device as claimed in any one of the preceding claims, in which the second control signal (Ugate) is limited to a second predetermined period of time (T4-T3).
10. A device as claimed in any one of the preceding claims, in which an analogue signal memory (26, C, R) is provided for storing a measurement for the voltage (UT) at the power switch (22).
11. A device as claimed in claim 10, in which the analogue signal memory (26, C, R) contains a capacitor (C), which can be discharged during the first period of time (T3-T2) via a switch transistor (26).
12. A device as claimed in claim 10, in which a comparator (20) is provided for comparing the voltage (UC) at the analogue signal memory (26, C, R) with a predetermined threshold voltage (US).
13. A device as claimed in any one of the preceding claims, in which the two load parts (13,14) are designed as electromagnets.
14. A device for diagnosing a power circuit substantially as herein described with reference to and as illustrated in the accompanying drawings.