FR2823034A1 - DEVICE FOR DIAGNOSING A POWER STAGE CIRCUIT - Google Patents

Abstract

Device for diagnosing a power stage comprising a load (13, 14) switched by a power stage switch (22). In parallel with the switch (22), there is a diagnostic switch (21). After the arrival of a switching signal (16, 17), a diagnostic switch (21) and the voltage (UT) of the power stage switch (22) are connected for a predetermined period (T3 - T2). is compared to a predetermined threshold voltage (US). Only if the voltage (UT) of the power stage switch (22) drops below the predetermined voltage threshold (US), the power stage switch (22) is activated by the signal. command (UPorte).

Description

contact with a conductive plate (6).

  The present invention relates to a diagnostic device

  a power stage circuit comprising at least one load

  mutated by at least one power stage switch, with a com-

  diagnostic mutator connected in parallel to the floor switch

s of power.

  The document DE-A43 16185 describes a floor circuit of

  power. Depending on a voltage detected in a communication path

  mutation of a power stage transistor, the control voltage of the transistor forming the stage is reduced or if necessary totally cut

  o of power, to protect this transistor against a thermal overload.

  Document DE-A 198 54 821 describes a power stage circuit comprising a power stage transistor and in parallel to this a diagnostic transistor. The latter includes integrated overload protection and overload diagnostic output. The diagnostic transis s tor is controlled by the inductive voltage spikes which occur if necessary when the switching transistor

  the power stage. Frequent switching of the diag-

  nostic leads to its heating and after exceeding a threshold

  dull, the diagnostic output signals this situation to a circuit of

o signal processing.

  The present invention aims to develop a device for diagnosing a circuit forming a power stage, making it possible, with economical means, to ensure the protection of a stage transistor

  of power against any overload.

  s To this end, the invention relates to a device of the above-defined type, characterized by a signal processing arrangement which, after the arrival of a switching signal, supplies a first control signal (UBase) for connecting the switch diagnostic, and in addition, a comparator which compares a measurement of the voltage (U of the power stage switch to a predetermined threshold value (US), and according to the result of the comparison, a second control signal (UPorte) to connect the switch connection of the floor

power is supplied or prevented.

  Advantages of the invention ss The device according to the invention for diagnosing a power stage circuit comprises a power stage switch for example a transistor for switching a load. In parallel to the power stage switch, there is a diagnostic switch, for example a transistor. A signal processing circuit determines the presence of a switching signal intended to switch the transistor of the power stage and thus to connect the load. After the arrival of the switching signal, the signal processing circuit provides a pre

  s mier control signal to connect the diagnostic switch.

  A comparator compares the voltage or at least one measurement of the ten

  power stage switch at a predetermined threshold.

  Depending on the result of the comparison, a cond command signal is generated or neutralized in order to connect the switch of the output stage. The device according to the invention makes it possible to detect an unauthorized state of the load such as for example a short circuit. An important advantage of the device according to the invention lies in the economic construction which in particular offers cost advantages for a production.

s tion in series.

  A first advantageous embodiment of the invention provides that the switching signal which triggers the diagnosis is taken from the voltage of the switch of the power stage. Since the voltage of the power stage switch must be detected anyway, this translates into an economical implementation. Another advantageous development plans to use the switching signal which is produced by

  a switch operated by a user.

  An advantageous development provides that the first control signal which connects the diagnostic switch is limited to a first predetermined duration. This means avoids overloading the diagnostic switch in the event of a load fault, for example

a short course.

  Advantageously, the diagnostic switch is a bipolar transistor, so that the limitation of the intensity is done with the base resistance and / or a reaction resistance in the emitter-collector circuit. An advantageous development provides for an analog signal memory which stores the voltage produced on the switch.

  the power stage to compare this voltage later.

  3s According to an advantageous development, the analog signal memory is a capacitor which is discharged preferably by

  through a transistor for a first duration.

  An advantageous development provides that the load consists of two parts connected in series and that the switch of the power stage is connected to the central outlet of the two parts of the load. The load parts are for example electromagnets forming part of an actuator motor. When the switch of the power stage is cut, in this embodiment, the two load parts are connected in series and when the switch of the power stage is connected, a part of the load is short-circuited. The circuit of the power stage can then be carried out so that the electromagnetic force o can be increased for a predetermined period during which

  an adjustment operation must take place. Then the actuator must

  rer a holding function. One possible application is that of a pro-

  motor vehicle nozzle in which the actuator allows

  switch between high beam and low beam.

  s The present invention will be described below in more detail using an example of diagnostic devices of the power stage according to the invention shown schematically in the accompanying drawings, in which: - Figure 1 shows a diagram of a diagnostic device for a power stage o, - Figures 2a-2e show the timing diagrams at available points

sitive of figure 1.

  Figure 1 shows an energy source 10 connected to the electrical ground 11. The energy source 10 provides a working voltage

  2s lie Ubat. This voltage is applied by a switch 12 to a pre-

  first charge 13; this charge is in series with a second charge 14; the

  second load 14 is connected to earth 11 of the circuit.

  A signal processing circuit 15 receives a first switching signal 16 transmitted by the switch 12. The signal processing circuit 15 also receives a second switching signal 17 supplied by a first comparator 18 as well as a third signal

  switching 19 provided by a second comparator 20.

  The signal processing assembly 15 supplies a first UBase control signal to a diagnostic switch 21 as well as a

  3s second switching signal UPort to a power stage switch

session 22.

  The power stage switch 22 connects a central outlet 23 connected to the two loads 13, 14 and the ground 11. The middle outlet 23 is at a voltage UT. The central socket 23 is also connected to the first comparator 18, to a first connection of the switching path 24 of the diagnostic switch 21 as well as to a connection

  25 of a switching transistor 26.

  s The first control signal UBase is applied via a current limiting resistor 27 to a control terminal 28 of the diagnostic switch 21; the second branch ment 29 of this switch is connected by a reaction resistor 30 to

the mass 11.

  a first terminal 31 of the switching path of the switching transistor 26 is connected to a storage capacitor C to which the second comparator 20 is connected as well as a load resistor R. A second switching path terminal 32 of the switching transistor 26 is connected like the storage capacitor C to the

ground 11 of the circuit.

  The first comparator 18 compares the voltage UT of the switch of the power stage 22 with a predetermined mined threshold voltage US and supplies, as a function of the result of the comparison, the second switching signal 17; the second comparator 20 receives the voltage UC o from the accumulator capacitor C to compare it with the threshold voltage US; depending on the result of the comparison, this comparator emits a

  third switching signal 19.

  Figure 2a shows the first switching signal 16 as a function of time (t). At a first instant T1, we meet the first

  switching signal 16 which ends at a fifth instant T5.

  Figure 2b shows the first UBase control signal as a function of time (t). The first UBase command signal occurs

  at the second instant T2 and ends at the third instant T3.

  FIG. 2c shows the second control signal UPorte so as a function of time (t). This second UPorte control signal occurs

  at the third instant T3 and ends at the fourth instant T4.

  FIG. 2d shows the voltage UT of the switch of the power stage 22 as a function of time (t). At the first instant T1, the voltage UT passes to a first level UM which occurs during the pure s5 of the power stage switch 21, so that the two loads 13, 14 are connected in series. At the second instant T2, the voltage UT switches to a residual voltage UCES between the first terminal of the switching path 24 and the second switching path connection 29 of the diagnostic switch 21. At the third instant T3, the voltage UT passes at a residual voltage UDSS. At time T4, the voltage UT returns to the first amplitude UM and stays at this amplitude jus

  only at the fifth instant T5 at which the voltage returns to zero.

  s Figure 2e shows the voltage UT of the power stage switch 22 in the event of a fault. The voltage UT goes at the first instant T1 to the operating voltage UBat and remains at this voltage level until at the fifth instant T5 the voltage UT again returns to zero. In the event of a fault, the power stage switch 22 is connected

0 between T3 and T4.

  Figures 2d and 2e show the applied US threshold voltage

quée to the two comparators 18, 20.

  The diagnostic device of the power stage according to the invention operates as follows: s The operating voltage UBat of the energy source is applied by the switch 12 to the loads 13, 14 connected in series. After actuation of the switch 12, at the first instant T1, we

  has the first commotation signal 16 shown in Figure 2a.

  The opening of the switch 12 to cut the loads 13, 14 occurs

o at the fifth instant T5.

  The two charges 13, 14 are for example electro

  magnets forming part of an actuator motor not shown in detail.

  The distribution of the load into a first and a second load 13, 14 makes it possible to predetermine two different forces, the largest force s being used for the actuation operation and the smallest force for retaining the actuator in a predetermined position. The smallest force is produced when the first and second charges 13, 14 are

  connected in series, the power stage switch 22 being off.

  An advantageous embodiment provides that the force provided by the first

  load 13 is greater than that provided by the second load 14.

  When the switch of the power stage 22 is connected, the second load 14 is short-circuited and the first load 13 is then connected directly to the ground 11 of the circuit. In this operating state, there is a greater force for example for an operation 3s of actuation. The limit switch 22 is preferably a transistor and in particular a MOS field effect transistor. A short circuit in the first load 13 or an event which would otherwise lead to a high current risks destroying the power stage switch 22, in particular if it is a transistor with effect of

MOS field.

  The device according to the invention provides a diagnosis for comparing the voltage UT produced at the power switch 22 or a measurement of the voltage UT when the stage switch of

  power 22 is cut, to compare this voltage to a predetermined threshold-

mined US.

  The signal processing assembly 15 receives the information

  o that the power stage switch 22 must be closed; this information

  mation corresponds for example to the sending of a first communication signal

  tation 16 produced by the actuation of the switch 12 at time T1.

  Another possibility of detecting the wish to connect consists in ex-

  use the voltage UT of the power stage switch 22 using the

s first comparator 18.

  We will first describe the case of the first load 16 operating without fault. After a first instant T1, we have the first

  switching signal 16 and at the same time the switching voltage UT

  power stage tor 22 according to FIG. 2d goes to the first level

  MU. The first level UM results from the division of the voltage by the re-

  internal resistances of the two loads 13, 14, the voltage appearing on the central socket 23 to which the power stage switch is connected

  22. The connection state of the power stage switch is detected.

  sance 22 at the first instant T1 by the appearance of the first signal

  switching 16 or by the voltage UT which exceeds the threshold voltage US.

  The first comparator 18 then supplies the second communication signal

tation 17.

  Both the signal processing circuit 15 and the comparators

  Rators 18, 20 are preferably produced in the form of microprocessors. The role of the two comparators 18, 19 is performed each time by an input port of the microprocessor; the threshold voltage US is the threshold voltage of the microprocessor ports. In the embodiment, for

  the two comparators 18, 20, the same US threshold voltage is provided.

  Then, the signal processing circuit 15 according to FIG. 5b 2b applies the first control signal UBase to the diagnostic circuit 21. The diagnostic switch 21 is advantageously a

  transistor preferably a bipolar transistor. The most important benefit

  so much of this solution is that the current limiting resistor 27 can limit to a given value the intensity of the current passing through the transistor 21 by the current limiting resistor 27 connected to the control terminal 28; this predetermined value corresponds at least approximately to the current flowing in the control branch 28 s multiplied by the current amplification coefficient of the transistor. Another means for limiting the current is given by the reaction resistor 30 connected between the second branch of the switching path 29 and the circuit ground 11. The reaction resistor 30 stabilizes the operating point of the transistor 21 by decreasing the current flowing through the control terminal 28 to the second connection of the commotation path 29 due to the increase in the voltage drop on the

  reaction resistance 30 as the current increases.

  In the hypothesis of a first charge 13 operating correctly, there will be at the second instant T2 according to FIG. 2d, the voltage s of the diagnostic switch 21 which drops to the residual voltage UCSS; this residual voltage corresponds to the connection of the diagnostic switch 21. The fall of the voltage UT below the threshold voltage US is detected by the first comparator 18 which supplies

the second switching signal 17.

  Due to the passage below the US voltage threshold under normal conditions, the signal processing circuit 15 supplies the second control signal UPort to the power stage switch 22 at the third instant T3 which thus connects the stage switch of power 22 and thus completely the first load 13. The second 2s load 14 is short-circuited at this time by the power stage switch 22 which is turned on. During the application of the second control signal UPorte according to FIG. 2c, the power stage switch 22 draws the voltage UT to the residual voltage UDSS shown in FIG. 2d; this voltage occurs on a power stage switch 22 sance in the connected state. An advantageous embodiment provides for limiting the second control signal UPorte over time and for applying it only for a second duration corresponding to the time difference between the third and fourth instants T4-T3. Insofar as the loads 13, 14 are part of the actuator motor mentioned above, this means avoids overloading the drive. Another interesting advantage lies in the additional protection of the power stage switch 22 against a long-term temperature rise. At the fourth instant T4, the signal processing assembly 15 terminates the on state of the power stage switch 22 by cutting the second control voltage Ugate. At the fourth instant T4, the voltage UT returns again to the first value UM. This state is ter

  mine at time T5 and we then open switch 12.

  s The behavior in the event of a fault in the first load 13 will be described below: A fault in the first load 13 corresponds for example to a weak ohmic link or to a short circuit in the first load 13. By connecting the switch the power stage o 22, an overcurrent produced at this moment could destroy this switch 22. After actuation of the switch 12, the signal processing assembly recognizes by the appearance of the first switching signal 16 or by the appearance of the second switching signal 17 that we want to connect the switch of the power stage 22. The voltage UT at the first instant T1 in the event of a short circuit in the first load 13 changes to the voltage operating mode UBat of the energy source 10. Insofar as there is no short-circuit but a low ohmic resistance state in the first load 13, the voltage UT is at a corresponding low value. But this value is always greater than the first amplitude UM which occurs for a first correct charge 13. The signal processing circuit 15 then produces at the second instant T2, the emission of the first control signal UBase to connect the diagnostic switch 21. In the event of a fault, the diagnostic switch 21 cannot draw the voltage UT under the US predetermined threshold voltage. The destruction of the bi-polar transistor provided as a diagnostic switch 21 is avoided by an excessive level current thanks to the current limiting resistor 27 and / or by

  the reaction resistance 30 possibly provided.

  The first comparator 18 does not provide a second switching signal 17 after the second instant T2, so that the signal processing circuit 15 recognizes the presence of a fault. The application of the second control signal UPorte to unlock the power stage switch 22 is neutralized in this case. This avoids the truction of the power stage switch 22. The operating state 3s ment in which we arrived, remains until time T5. At the moment

  switch 12 is again open.

  The first duration which corresponds to the difference between the instants T3-T2 during which the first UBase command signal is available is advantageously short and is situated, for example, in the microsecond domain. This means on the one hand avoids a rise in

  temperature in diagnostic switch 21 in the event of a fault.

  On the other hand, it reduces the time required for diagnosis.

  Insofar as the signal processing circuit 15 is carried out by a microprocessor in which the input ports perform the function of the comparators 18, 20, due to the workload of the signal processing circuit 15 by other tasks not detailed here, it may happen that during the short period between the second and the third

  o instants T2, T3, the corresponding input port is not interrogated.

  According to a development of the invention, another switching transistor 26 is provided with the accumulator capacitor C and the load resistance R as well as the second comparator 20. The switching transistor 26, the capacitor C and the load resistance R for isment together an analog signal memory which provides the voltage UT or a measurement of the voltage UT even after the third instant T3 as capacitor voltage UC. The control terminal 25 of the switching transistor 26 is connected to the central outlet 23 which supplies the voltage UT. When the switching transistor 26 is cut off via the load resistor R with the switch 12 closed, the accumulator capacitor 5 is charged at the operating voltage UBat. The diagnostic switch 21 is connected after the arrival of the first switching signal 16. Under these conditions, as long as the diagnostic switch 21 draws the voltage UT below the voltage threshold 2s US, the switching transistor 26 switches on and the storage capacitor C suddenly discharges. The voltage UC of the charge capacitor C is thus also below the threshold voltage US, so that

  the second comparator 20 provides the third switching signal 19.

  Thanks to the memory effect of the storage capacitor C, the voltage UC of the capacitor even after the third instant T13 when the first charge 13 is in a correct state, drops below the threshold voltage US, so that the mounting signal processing 15 may still after the third instant T3 observe the correct operation with the third switching signal 19 of the second comparator 20. When 3s the switching transistor 26 is cut after the third instant T3, the voltage UC aux terminals of the capacitor increases, so that the resulting time constant will be fixed by the load resistor R. The voltage UC at the terminals of the capacitor does not correspond to the voltage

  UT on the center tap 23 of the power stage 22, but it represents

  feel at least a measure to detect if the voltage UT is

find the US voltage threshold.

Claims (10)

  1) Device for diagnosing a power stage circuit comprising at least one load (13, 14) switched by at least one power stage switch (22), with a diagnostic switch (21) connected in parallel to the power stage switch (22), characterized by a signal processing circuit (15) which, after the arrival of a switching signal (16, 17) provides a first control signal (UBase ) to connect the diagnostic switch (21), and o in addition, a comparator (18, 20) which compares a measurement of the voltage (UT) of the power stage switch (22) with a threshold value (US ) predetermined, and depending on the result of the comparison, a second control signal (UPorte) for connecting the switch connection of the stage   power (22) is supplied or prevented.   2) Device according to claim 1, characterized in that the switching signal (17) is deduced from the voltage (UT) on the commu power stage sensor (22).   3) Device according to claim 1, characterized in that   the switching signal (16) is produced by a switch (12).   4) Device according to claim 1, characterized in that the first control signal (UBase) is limited to a first duration predetermined (T3 - T2).    ) Device according to claim 1, characterized in that   the diagnostic switch (21) is a bipolar transistor.   6) Device according to claim 5, characterized in that the control terminal (28) of the diagnostic switch (21) comprises a current limiting resistor (27) and / or a second switching path terminal (29) of the diagnostic switch (21) comprises a reaction resistor (30).   7) Device according to claim 1, s characterized in that the power stage switch (22) is an effect transistor MOS field.   8) Device according to claim 1, o characterized in that the load contains first and second load parts (13, 14) connected in series relative to each other and the switch of the power stage (22) is connected to the central socket (23) of the two parts of charge (13, 14).   9) Device according to claim 1, characterized in that the second control signal (UPorte) is limited to a second duration predetermined (T4 - T3).    ) Device according to claim 1, characterized by an analog signal memory (26, C, R) for storing a measurement   voltage (UT) on the power stage switch (22).   2s 11) Device according to claim 10, characterized in that the analog signal memory (26, C, R) is a capacitor (C) which discharges during a first duration (T3 - T2) by a com transistor mutation (26).   12) Device according to claim 10, characterized by a comparator (20) for comparing the voltage (UC) of the memory if   3s gnal analog (26, C, R) at a predetermined threshold voltage (US).   13) Device according to claim 8, characterized in that   the two charging parts (13, 14) are electromagnets.