GB2369244A - Light emitting devices and displays - Google Patents

Light emitting devices and displays Download PDF

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Publication number
GB2369244A
GB2369244A GB0122710A GB0122710A GB2369244A GB 2369244 A GB2369244 A GB 2369244A GB 0122710 A GB0122710 A GB 0122710A GB 0122710 A GB0122710 A GB 0122710A GB 2369244 A GB2369244 A GB 2369244A
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United Kingdom
Prior art keywords
region
display
phosphor
regions
hereinbefore described
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Granted
Application number
GB0122710A
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GB0122710D0 (en
GB2369244B (en
Inventor
Neil Anthony Fox
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Smiths Group PLC
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Smiths Group PLC
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Publication date
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Publication of GB0122710D0 publication Critical patent/GB0122710D0/en
Publication of GB2369244A publication Critical patent/GB2369244A/en
Application granted granted Critical
Publication of GB2369244B publication Critical patent/GB2369244B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/34Materials of the light emitting region containing only elements of group IV of the periodic system
    • H01L33/346Materials of the light emitting region containing only elements of group IV of the periodic system containing porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50Wavelength conversion elements

Abstract

A display has a matrix array of devices on a glass plate 10. Each device has a phosphor region 14, these phosphor regions may comprise different material to produce a different colour of light, on a transparent electrode track 13 and a region 18 of porous polysilicon. Electrode layers 17 and 21 on either side of the region 18 of porous polysilicon are used to apply a voltage across the region. A layer 16 of wide band gap material separates the phosphor regions 14 from the polysilicon regions 18 but is sufficiently thin to allow passage of high energy electrons from the porous polysilicon regions to cause fluorescence of the phosphor regions.

Description

LIGHT-EMITTING DEVICES AND DISPLAYS This invention relates to light-emitting devices and displays.
Currently available displays take various different forms. In cathode-ray tube displays (CRTs) electrons produced by a source are accelerated by an applied voltage across a vacuum onto a phosphor screen. The beam of electrons is scanned over the screen magnetically or electrostatically to produce the desired display representation. CRTs suffer from various disadvantages. They require high drive voltages, they are relatively bulky and are not very robust. Alternative displays generally involve a matrix array of light-emitting or reflecting devices, such as light-emitting diodes, liquid-crystal elements or plasma elements. In GB 2252857 there is described a display comprising an array of ballistic transistors located adjacent a phosphor layer so that high energy electrons produced by the ballistic transistors impinge on the phosphor layer and cause fluorescence.
It is an object of the present invention to provide an alternative light-emitting device and display.
According to one aspect of the present invention there is provided a light-emitting device including a first region of porous polysilicon, means for applying a voltage sufficient to accelerate electrons through the first region and a second region of a fluorescent material located adjacent the first region such that electrons accelerated through the first region impinge on the second region causing it to fluoresce and produce light.
The porous polysilicon may be ofnanocrystalline polysilicon particles. The second region is preferably supported on a transparent substrate and there may be a transparent electrode intermediate the substrate and the second region. The second region is preferably located intermediate the transparent substrate and the first region. The fluorescent material may include a phosphor and a material that renders the phosphor conductive or semiconductive. The device preferably includes a layer of a wide band gap material, such as of aluminium nitride, between the second region and the first region. The device preferably includes an electrode layer on opposite sides of the first region.
According to a second aspect of the present invention there is provided a display including a plurality of devices according to the above one aspect of the invention.
Some of the devices may have second regions of different fluorescent materials that produce light of different colours. The devices are preferably arranged as a matrix and are individually-energizable.
A display including an array of light-emitting devices according to the present invention, will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a simplified perspective view of the display; Figure 2 is a sectional side elevation of a part of the display to an enlarged scale; and Figure 3 shows a modification of the display.
With reference first to Figures 1 and 2, the display is in the form of a multi-layer flat panel 1 connected to a driver circuit 2 via conductors 3 and 4.
The panel comprises an upper plate 10, facing the viewer, of an optically-transparent material such as glass. The plate 10 may be tinted to improve visibility or to modify the colour of the display as desired. An anti-reflection coating (not shown) may be formed on the upper surface 11 of the glass. On the lower surface of the glass plate 10 there is deposited a first, upper electrically-conductive, optically-transparent electrode layer 12, which takes the form of thin, closely-spaced parallel metal tracks 13 extending across the width of the panel 1 between opposite edges. At one edge, the tracks 13 are connected to respective ones of the conductors 3.
Regions 14 of fluorescent material, such as a phosphor, are deposited at regular intervals along the length of each metal track 13. The phosphor preferably includes a material to render it electrically conductive or semiconductive. The phosphor regions 14 may be rectangular, square, circular, hexagonal or other shape. The phosphor regions 14, when viewed from above, appear as a closely-packed orthogonal, matrix array of dots or short stripes, one for each of the electrically energisable devices forming the display. It should be noted that the drawings do not show to scale the dimensions of the layers, regions or the like.
The glass plate may be configured with recesses or other surface formations (not shown), aligned with the phosphor regions, to improve light transmission or the appearance of the display.
The space between the metal tracks 13 and the phosphor regions 14 is filled with a first layer 15 of insulating material deposited on the glass plate 10. A second layer 16 of insulating material is deposited on the first layer 15 and extends over the lower surface of the phosphor regions 14. The second insulating layer 16 is of a wide band gap material, such as aluminium nitride, and its thickness is such as to permit the passage therethrough of high energy electrons.
Below the second insulating layer 16 is deposited a second set of conductive tracks 17, such as of a metal oxide or metal alloy, extending parallel to the first set of tracks 13, that is, directly under the phosphor regions 14. The second set of tracks 17 is similarly connected to respective ones of the conductors 3 at the edge of the panel 1.
At intervals along each of the second set of metal tracks 17, regions 18 of a porous polysilicon material are deposited, directly underlying the phosphor regions 14. The porous polysilicon material may be formed by nanocrystalline polysilicon particles. A description of porous polysilicon material is given by Xia Sheng, Takuya Komoda and Nobuyoshi Koshida in Mat. Res. Soc. Symp. Proc. , Vol 509, psi 87, (1998). This material is believed to be particularly advantageous in this form of device and display because it has a long mean path of electrons injected into it so that they can be accelerated more efficiently to higher energies.
The space between the tracks 17 and the regions 18 of porous polysilicon is filled with a layer 19 of an insulating material.
A third electrically-conductive layer 20 in the form of closely-spaced parallel metal tracks 21 is deposited on the lower surface of the panel 1. The lower tracks 21 lie at right angles to the upper tracks 13 and 17 and traverse the height of the panel 1 between opposite edges, being aligned with different ones of the regions 18 along each row. At one edge, the tracks 21 are connected to respective ones of the conductors 4.
The drive circuit 2 may be of any conventional form used to drive conventional matrix array displays, such as employing various multiplexing techniques. Alternatively, distributed processors could be used, such as described in GB 2206270.
A display representation is provided by applying a suitable voltage across appropriate ones of the porous polysilicon regions 18. Any individual one of the regions 18 can be energized by applying voltage between one of the conductors 3, to select the desired row or track 13 and 17, and one of the conductors 4, to select the desired column or track 21. The voltage applied to the conductors 3 is positive, with the voltage applied to the first set of tracks 13 being more positive than that applied to the second set of track 17. The voltage applied to the conductors 4 and hence to the third layer 20 and the lower set of tracks 21 is negative with respect to the voltages applied to the two sets of tracks 13 and 17 above the region 18.
When the desired region 18 is addressed, it causes electrons to be injected into the region and accelerated through it upwardly. A proportion of the electrons produced flow through the electrode track 17 and the insulating layer 16 and continue to flow, by virtue of the more positive charge on the upper track 13, into the phosphor region 14. The energy of these electrons is sufficiently high to cause fluorescence of the phosphor 14 and emission of optical radiation. The optical radiation emitted by the phosphor region 14 appears as a bright spot. The display is, therefore, made up of a number of individually-addressable lightemitting devices 30. By varying the voltage applied, the electron energy can be varied and hence the apparent brightness of the phosphor region 14. The porous polysilicon regions may be tapered through their depth, with a larger cross-sectional area at their upper end, so as to reduce the spacing between each device. It may be necessary to use several porous polysilicon regions for each pixel in order to increase brightness of the display. In such an arrangement, adjacent ones of the polysilicon regions would be aligned with a common one of the discrete phosphor regions so that the electrons emitted by the polysilicon regions flow into the same phosphor region.
A multi-colour display can readily be provided by using different phosphors emitting radiation in the red, green and blue parts of the spectrum, or by applying red, green and blue filters between the upper surface of the phosphor regions 14 and the glass plate 10.
Different arrays of phosphor regions and porous polysilicon regions are possible, such as that shown in Figure 3 where the phosphor regions 14'are of hexagonal shape and arranged in a cubic close-packed configuration.
Where the display is only required to be used for representing one symbol or legend, or a limited number of them, the phosphor regions need only be located in regions coinciding with that symbol or legend. In such an arrangement, a simplified drive circuit could be used.
The light-emitting devices could be used individually.

Claims (17)

  1. CLAIMS 1. A light-emitting device including a first region of porous polysilicon, means for applying a voltage sufficient to accelerate electrons through said first region and a second region of a fluorescent material located adjacent said first region such that electrons accelerated through said first region impinge on said second region causing it to fluoresce and produce light.
  2. 2. A device according to Claim 1, wherein the porous polysilicon is of nanocrystalline polysilicon particles.
  3. 3. A device according to Claim 1 or 2, wherein said second region is supported on a transparent substrate.
  4. 4. A device according to Claim 3, including a transparent electrode intermediate the substrate and said second region.
  5. 5. A device according to Claim 3 or 4, wherein said second region is located intermediate the transparent substrate and said first region.
  6. 6. A device according to any one of the preceding claims, wherein the fluorescent material includes a phosphor and a material that renders the phosphor conductive or semiconductive.
  7. 7. A device according to any one of the preceding claims including a layer of a wide band gap material between said second region and said first region.
  8. 8. A device according to Claim 7, wherein the wide band gap material is aluminium nitride.
  9. 9. A device according to any one of the preceding claims, including an electrode layer on opposite sides of said first region.
  10. 10. A device substantially as hereinbefore described with reference to Figures 1 and 2 of the accompanying drawings.
  11. 11. A device substantially as hereinbefore described with reference to Figures 1 and 2 as modified by Figure 3 of the accompanying drawings.
  12. 12. A display including a plurality of devices according to any one of the preceding claims.
  13. 13. A display according to Claim 12, wherein some of said devices have second regions of different fluorescent materials that produce light of different colours.
  14. 14. A display according to Claim 12 or 13, wherein said devices are arranged as a matrix and are individually energizable.
  15. 15. A display substantially as hereinbefore described with reference to Figures 1 and 2 of the accompanying drawings.
  16. 16. A display substantially as hereinbefore described with reference to Figures 1 and 2 as modified by Figure 3 of the accompanying drawings.
  17. 17. Any novel and inventive feature or combination of features as hereinbefore described.
GB0122710A 2000-10-18 2001-09-21 Light-emitting devices and displays Expired - Fee Related GB2369244B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0025634A GB0025634D0 (en) 2000-10-18 2000-10-18 Light-emitting devices and displays

Publications (3)

Publication Number Publication Date
GB0122710D0 GB0122710D0 (en) 2001-11-14
GB2369244A true GB2369244A (en) 2002-05-22
GB2369244B GB2369244B (en) 2005-02-23

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GB0025634A Ceased GB0025634D0 (en) 2000-10-18 2000-10-18 Light-emitting devices and displays
GB0122710A Expired - Fee Related GB2369244B (en) 2000-10-18 2001-09-21 Light-emitting devices and displays

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GB0025634A Ceased GB0025634D0 (en) 2000-10-18 2000-10-18 Light-emitting devices and displays

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2252857A (en) * 1990-12-20 1992-08-19 Smiths Industries Plc Solid state display
EP0913849A2 (en) * 1997-10-29 1999-05-06 Matsushita Electric Works, Ltd. Field emission electron source, method of producing the same, and use of the same
EP1026721A1 (en) * 1998-08-26 2000-08-09 Matsushita Electric Works, Ltd. Field emission source array, method for producing the same, and its use

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2252857A (en) * 1990-12-20 1992-08-19 Smiths Industries Plc Solid state display
EP0913849A2 (en) * 1997-10-29 1999-05-06 Matsushita Electric Works, Ltd. Field emission electron source, method of producing the same, and use of the same
EP1026721A1 (en) * 1998-08-26 2000-08-09 Matsushita Electric Works, Ltd. Field emission source array, method for producing the same, and its use

Also Published As

Publication number Publication date
GB0025634D0 (en) 2000-12-06
GB0122710D0 (en) 2001-11-14
GB2369244B (en) 2005-02-23

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20160921