GB2363902A - Method of mounting an electronic device on a multilayer substrate using prepreg layer - Google Patents
Method of mounting an electronic device on a multilayer substrate using prepreg layer Download PDFInfo
- Publication number
- GB2363902A GB2363902A GB0015261A GB0015261A GB2363902A GB 2363902 A GB2363902 A GB 2363902A GB 0015261 A GB0015261 A GB 0015261A GB 0015261 A GB0015261 A GB 0015261A GB 2363902 A GB2363902 A GB 2363902A
- Authority
- GB
- United Kingdom
- Prior art keywords
- substrate
- lamina
- conductive layers
- electronic device
- electrically conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000003989 dielectric material Substances 0.000 claims abstract description 9
- 238000005520 cutting process Methods 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 28
- 238000005553 drilling Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0243—Printed circuits associated with mounted high frequency components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/066—Heatsink mounted on the surface of the printed circuit board [PCB]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09618—Via fence, i.e. one-dimensional array of vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10409—Screws
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A method of mounting electronic device (1, Fig. 3) on multi-layer substrate (5) involves providing lamina (6) comprising electrically conductive layers (7,8) and dielectric material (9). A portion of the lamina (6) is removed to form opening (10), and one of the conductive layers (9) is provided with reduced flow prepreg layer (11). This lamina (6) is bonded to another lamina (12) with electrically conductive layers (14,15) and dielectric material (9) such that the reduced flow prepreg layer (11) engages conductive layer (14), forming a substrate (5) with cavity (10). Via holes (17, Fig. 3) are cut through the substrate (5), and the substrate (5) is plated with metal so that the outermost electrically conductive layers are in electrical contact with one another, and the inner surfaces of the opening (10) are coated with the metal layer. The device (1, Fig. 3) is then secured in the cavity, e.g. by fixing bolts (4, Fig. 3).
Description
2363902 A METHOD OF MOUNTING A DEVICE ON A MULTILAYER SUBSTRATE This
invention relates to a method of mounting a device on a multilayer substrate i e a substrate having a plurality of overlapping electrically conductive layers with dielectric material between them It relates particularly, thought not exclusively, to devices designed to operate at radio frequencies and encased in a metal package.
Devices of this type have traditionally been mounted on a single layer printed circuit board (PCB) which is then attached to a heat-sink by fixing means such as, for example, bolts and/or a thermally conductive adhesive This prior art method of mounting devices is shown in Figure 1 It requires a large board area, and can be labour intensive to manufacture.
According to a first aspect of the invention there is provided a method as specified in claims 1 4.
According to a second aspect of the invention there is provided an assembly as specified in claim 5.
Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings in which:Figure 1 shows a cross-section and plan view of a prior art method of mounting a device, Figure 2 shows a cross-section of a substrate according to the present invention part way through assembly, together with an exploded view of the various layers involved, Figure 3 shows a cross section and plan view of a device after it has been mounted on a substrate, and Figure 4 shows a plan view of the electrically conductive layers present in the fabricated substrate.
2 Figure 1 shows an electronic device ( 1), which operates at radio frequencies, mounted in a cavity cut in a duroid substrate ( 2), which has been bolted to a metal heatsink ( 3) using fixing bolts ( 4) The metal heatsink acts additionally as a ground reference for the r f signal.
The present invention reduces the board area employed in such prior art assemblies.
The present invention provides a method of mounting an electronic device on a substrate having a plurality of overlapping electrically conductive layers with dielectric material between them Figure 2 shows a cross-section of a substrate ( 5) according to the present invention part way through assembly A lamina ( 6), having a pair of electrically conductive layers ( 7, 8) with a dielectric material ( 9) between them, has a portion removed (for example by cutting with a laser or otherwise) to form an opening ( 10) suitable for said electronic device.
One of said pair of conductive layers (in the present example layer 8) is provided with an underlying reduced flow dielectric (prepreg) layer, ( 11) into which a similar opening has been cut This reduced flow prepreg material is often called no-flow prepreg in the art, but differs from the dielectric prepreg layer 9 in having a higher glass transition temperature such that it does not flow into the cavity significantly during subsequent bonding processes Ideally, this layer 11 should be kept as thin as possible (for example 100 microns thick) to reduce bulging into the cavity and to give good ground continuity The thickness of lamina 6 may be selected such that the depth of the cavity in the assembled substrate equals the depth of the packaged electronic device.
The lamina 6 is then bonded to another similar lamina 12 having a pair of electrically conductive layers ( 14, 15) with a dielectric material ( 9) between them such that layer 11 engages with one of the electrically conductive layers of the other lamina, forming a substrate having a cavity ( 16) for said electronic device.
This second lamina does not have a portion removed like the lamina 6 Via holes 17 are then cut through the substrate, and the substrate is plated with a metal (for example copper) such that the outermost electrically conductive layers (RF signal layers 7 and 15 in the present example) are in electrical contact with one another, 3 and the inner surfaces of the opening are coated with a metal layer 18 This provides a low impedance connection between the signal ground (layer 8) and the device ground (layer 14), which aids the connection due to adjacent vias and capacitance between the ground planes Additional layers can then be added to the assembly as required.
The electronic device is inserted into the cavity, and the surface of the substrate behind the cavity put in thermal contact with a heatsink 19, which is fixed in place, using fixing bolts ( 4) in the present example A cross- section of the assembled substrate and device is shown in Figure 3 Note that this substrate has additional dielectric ( 20) and electrically conductive ( 21) layers.
As an alternative (not shown) the device ground layer 14 could be used to transport heat away from the device If this approach is used, the layer 14 should ideally be made of thicker copper In both cases plated through holes are required for the fixing bolts.
If the reduced flow prepreg layer 11 is sufficiently thick, then the discontinuity in the RF ground can be reduced by removing the electrically conductive RF signal ground layer adjacent the device, and increasing the RF track width in this area accordingly This can be seen in Figure 3 The conductive layer 8 (the RF signal ground in the present example) can have a portion close to the opening removed prior to assembly This can be achieved using laser cutting or by patterning and etching in the usual way.
As an alternative, the substrate can be manufactured by cutting a cavity of a predetermined depth into a pre-assembled multi-layer board by z-plane drilling using mechanical or laser drilling In this alternative technique, drilling is halted when a specific metal layer is exposed It is more flexible, in that any layer can be drilled down to, but has the disadvantage of being much more expensive and time consuming.
Claims (4)
1 A method of mounting an electronic device on a substrate having a plurality of overlapping electrically conductive layers with dielectric material between them, the method including: a) providing a lamina having a pair of electrically conductive layers with a dielectric material between them, b) removing a portion of the lamina to form an opening suitable for said electronic device, c) providing one of said pair of conductive layers with an overlying reduced flow prepreg layer, d) bonding said lamina to another lamina having a pair of electrically conductive layers with a dielectric material between them such that the reduced flow prepreg layer engages with one of the electrically conductive layers of the other lamina, forming a substrate having a cavity for said electronic device, e) cutting via holes through the substrate, f) selectively depositing a metal layer on the substrate such that the outermost electrically conductive layers are in electrical contact with one another, and the inner surfaces of the opening are coated with a metal layer, and g) securing said electronic device in said cavity.
2 A method as claimed in claim 1 in which step c) is performed before step b), such that step b) includes removing a corresponding part of the reduced flow prepreg layer.
3 A method as claimed in claim 2 in which the removal of the portion of the lamina and the reduced flow prepreg layer of step b) is performed by selective removal of the layers after the substrate has been assembled in step d).
4 An substrate formed using a method as claimed in any preceding claim.
An assembly comprising a substrate as claimed in claim 4 having a cavity, and an electronic device mounted in said cavity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0015261A GB2363902A (en) | 2000-06-23 | 2000-06-23 | Method of mounting an electronic device on a multilayer substrate using prepreg layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0015261A GB2363902A (en) | 2000-06-23 | 2000-06-23 | Method of mounting an electronic device on a multilayer substrate using prepreg layer |
Publications (2)
Publication Number | Publication Date |
---|---|
GB0015261D0 GB0015261D0 (en) | 2000-08-16 |
GB2363902A true GB2363902A (en) | 2002-01-09 |
Family
ID=9894148
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0015261A Withdrawn GB2363902A (en) | 2000-06-23 | 2000-06-23 | Method of mounting an electronic device on a multilayer substrate using prepreg layer |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2363902A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107484357A (en) * | 2017-07-20 | 2017-12-15 | 深圳崇达多层线路板有限公司 | A kind of preparation method of the more sheet material nesting tiled mixed-compression boards of asymmetric |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996023612A1 (en) * | 1995-02-02 | 1996-08-08 | Hestia Technologies, Inc. | Methods of making multi-layer laminate substrates for electronic device packaging |
JPH11274732A (en) * | 1998-03-25 | 1999-10-08 | Ibiden Co Ltd | Substrate for mounting multilayer electronic component |
-
2000
- 2000-06-23 GB GB0015261A patent/GB2363902A/en not_active Withdrawn
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996023612A1 (en) * | 1995-02-02 | 1996-08-08 | Hestia Technologies, Inc. | Methods of making multi-layer laminate substrates for electronic device packaging |
JPH11274732A (en) * | 1998-03-25 | 1999-10-08 | Ibiden Co Ltd | Substrate for mounting multilayer electronic component |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107484357A (en) * | 2017-07-20 | 2017-12-15 | 深圳崇达多层线路板有限公司 | A kind of preparation method of the more sheet material nesting tiled mixed-compression boards of asymmetric |
Also Published As
Publication number | Publication date |
---|---|
GB0015261D0 (en) | 2000-08-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |