GB2362518A

GB2362518A - DC/DC converter

Info

Publication number: GB2362518A
Application number: GB0012253A
Authority: GB
Inventors: Per-Olof Brandt
Original assignee: Telefonaktiebolaget LM Ericsson AB
Current assignee: Telefonaktiebolaget LM Ericsson AB
Priority date: 2000-05-19
Filing date: 2000-05-19
Publication date: 2001-11-21
Anticipated expiration: 2020-05-19
Also published as: GB2362518B; GB0012253D0

Abstract

A DC/D C converter circuit includes an input capacitor C11, an inductor L11, a diode 11, a transistor T11, and control circuit 18. The control circuit operates to control the transistor T11. An output capacitor C21 is connected between the output and the input of the circuit. Connection in this way usefully reduces the size of the output capacitor. The output capacitor C21 is connected in series with a DC supply 2. The circuit may be used to supply a mobile telephone.

Description

2362518 DC/DC CONVERTERS Field of the Invention is The present invention

relates to DC/DC converters, particularly for use in battery powered electronic equipment.

Backqround of the Invention For battery powered electronic devices, and for radio transmitting devices such as GSM mobile telephones in particular, using a low voltage supply can present difficulties when running radio frequency (RF) and power amplifier (PA) circuitry. It is desirable to use low voltage batteries in such devices, so that the physical size can be kept small and light in weight. Therefore, DC to DC converters are used in order to boost the supply voltage for the device from the battery voltage to a desired level. Typically DC to DC converters run on a switching frequency, for example 400 KHZ, and it is necessary to filter the output of the converter in order to remove any trace of this switching signal. This makes this kind of solution difficult to implement.

One solution is to run the DC to DC converter only during periods that the power amplifier or RF circuitry is not active, and using a storage device, such as a capacitor, to store charge for supply to PA and RF circuitry during periods of activity.

One such solution is shown in Figure 1 of the accompanying drawings, and a detailed discussion of this type of circuitry can be found in European Patent Application No. EP0654911. In Figure 1, the DC to DC converter circuit 1 includes an input node 4 and an output node 6. The input node 4 is connected to a DC voltage V,,pply from a DC source 2. The output node 6 is connected to supply an output voltage V,,t to a power amplifier 3. The circuit 1 comprises a first capacitor C1 connected between the input node 4 and ground, and an inductor Li and a diode Di connected in series between the input node 4 and the output node 6. A transistor TI is connected between an intermediate node 5, between the inductor Ll and diode D1, and ground. The diode Di is connected in forward bias between the intermediate node 5 and the output node 6. A control circuit 8 is connected to receive a reference voltage Vref, which indicates the desired level of V.,,t, and the output voltage V,,t and is operable to control the switching operation of the transistor T1. The converter circuit 1 is generally known as a switched mode power supply, and is described, for example, in "Advanced Linear European Seminars for Precision Design of the 90's", published by Texas Instruments UK, 1990 page 59 to 82.

A second capacitor C2 is connected between the output node 6 and ground, such that during inoperative times of the power amplifier, the capacitor C2 is charged to the required PA operating voltage. When the operating voltage is required by the power amplifier 3 it can be supplied without the need for switching of the supply. This removes the need for complex filtering of the output voltage V0,t.

However, the problem with this kind of solution is that it requires a very large capacitor C2 which consumes a large amount of space and is expensive.

Summary of the present Invention

Accordingly, a DC converter circuit embodying the present invention includes an output capacitor C2 which is connected between the output node and the input node of the device.

Brief descrintion of the drawinqs Figure 1 is a schematic diagram of a previously considered DC/DC converter; and Figure 2 is a schematic diagram of a DC/DC converter embodying the present invention.

is Detailed descri-Ption of the Dreferred embodiment Figure 2 illustrates schematically a DC/DC converter embodying the present invention. The Fig. 2 converter 10 has similarities with the Fig. I converter and includes an input node 14 and an output node 16. The input node 14 connects to the DC input voltage Vsupply f rom the DC source 2, as bef ore. A f irst capacitor C11 is connected between the input node 14 and ground, and an inductor and forward biassed diode D11 are connected in series between the input node 14 and the output node 16. At an intermediate node 15 between the inductor L11 and the diode D11, a transistor T11 is connected to ground. A control circuit 18 is connected to receive a reference voltage V,,f and the output voltage V,,t and operates to control the switching of the transistor T11.

A second capacitor C21 is connected between the output node 16 and the input node 14, by way of link 19. Connecting the capacitor to the supply voltage, rather than to around means that, instead of requiring (-he capacitor C21 to supply all of the energy needed at the operating voltage during radio and power amplifier active periods, the capacitor now need only store part of the energy required. Thus the PA is supplied, during active periods by the charged capacitor in series the supply. This enables a smaller second capacitor C21 to be used, which is less expensive than the second capacitor in the Fig. 1 circuit.

For example, if the supply voltage V,,.pply is X volts and the power amplifier 3 requires a voltage of 1.5 X volts, then the C2 capacitor of the Figure 1 circuit must have a capacitance of Y for a given voltage drop during the PA active period. The voltage drop across the second capacitor C2 of Fig.1 will be 1.5 X volts.

The Figure 2 capacitor C21 must have the same capacitance value, but since the voltage across the capacitor is only one third (0.5 X volts) of what it would be in the Figure 1 situation, the size reduction in capacitor is likely to be at least 66% for a given capacitor technology. Although embodiments of the invention do not reduce the requirements on the battery as much as in the prior art, the gains in space savings and cost savings are significant. For example in a real application for GSM, with a two watt output power, the size reduction can be up to 60 to 70 square millimetres.

Claims

CLAIMS:

1. A DC/DC converter circuit comprising: an input node for receiving an input DC signal; an output node for outputting an output DC signal; a first capacitor connected between the input node and ground; an inductor connected between the input node and an intermediate node of the circuit; a diode connected in forward bias between the intermediate node and the output node; a transistor connected between the intermediate node and ground; a control circuit for controlling operation of the transistor and connected thereto; and a second capacitor connected to the output node, characterised in that the second capacitor is connected between the output node and the input node.

2. A circuit as claimed in claim 1, used in a switched mode application, such that the second capacitor is charged during an inactive period.

3. a portable electronic device including a DC/DC converter as claimed in claim 1.

4. A mobile telephone including a DC/DC converter as claimed in claim 1.

5. A personal digital assistant (PDA) including a DC/DC converter as claimed in claim 1.

6. An electronic organizer including a DC/DC converter as claimed in claim 1.

7. A DC circuit including a battery, a load connected to the battery, and a capacitor, wherein the capacitor is connected in series with the battery and acts as a storage device for supplying the load with a voltage different to that supplied by the battery.

8. A circuit as claimed in claim 7, wherein the load is a power amplifier of a TDMA communications system.

9. A circuit as claimed in claim 7, wherein the voltage across the capacitor is positive with respect to the load.

is

10. A circuit as claimed in claim 7, wherein the voltage across the capacitor is negative with respect to the load.