CN115800496A - Zero-delay response standby power supply system - Google Patents

Zero-delay response standby power supply system Download PDF

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Publication number
CN115800496A
CN115800496A CN202211463448.8A CN202211463448A CN115800496A CN 115800496 A CN115800496 A CN 115800496A CN 202211463448 A CN202211463448 A CN 202211463448A CN 115800496 A CN115800496 A CN 115800496A
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conversion circuit
circuit
linear voltage
resistor
input
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CN202211463448.8A
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Chinese (zh)
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徐�明
孙涓涓
孙巨禄
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Chip Power Changzhou Co ltd
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Chip Power Changzhou Co ltd
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Priority to CN202211463448.8A priority Critical patent/CN115800496A/en
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Abstract

The invention discloses a standby power supply system with zero time delay response, which belongs to the technical field of switching power supplies and comprises an AC/DC conversion circuit, a bidirectional DC/DC conversion circuit, a linear voltage stabilizing circuit, a DC/DC conversion circuit, a first diode and a battery, wherein the output end of the AC/DC conversion circuit is connected with a direct current bus in parallel, and the direct current bus is connected with the input end of the DC/DC conversion circuit in parallel; the input end of the bidirectional DC/DC conversion circuit is connected with two ends of the battery in parallel, the output end of the bidirectional DC/DC conversion circuit is connected with the input end of the linear voltage stabilizing circuit in parallel, the output end of the linear voltage stabilizing circuit is connected with the direct current bus in parallel, the anode of the first diode is connected with the input positive end of the bidirectional DC/DC conversion circuit, and the cathode of the first diode is connected with the output positive end of the bidirectional DC/DC conversion circuit. The zero-delay response standby power supply system has high conversion efficiency, small volume and light weight.

Description

Zero-delay response standby power supply system
Technical Field
The present invention relates to the field of switching power supply technologies, and more particularly, to a zero-delay response standby power supply system.
Background
In practical application, in order to ensure that the load can be continuously supplied with power under the condition that the external power supply is powered off, a standby power supply is usually arranged, and when the external power supply is powered off, the standby power supply supplies power to the load to ensure normal operation of the load.
FIG. 1 is a schematic diagram of a backup power supply in the prior art, which includes an AC/DC converting circuit 111, n DC/DC converting circuits and a battery B1, wherein an input terminal of the AC/DC converting circuit 111 is connected with an alternating current V in1 Said alternating current V in1 The output terminal of the AC/DC conversion circuit 111 is connected in parallel with a DC BUS for single-phase or three-phase AC, the DC BUS is also connected in parallel with the input terminals of the n DC/DC conversion circuits 121 to 12n, the battery B1 is connected in parallel between the DC BUS buses, and the output terminals of the n DC/DC conversion circuits 121 to 12n output the converted DC voltage V o11 To V o1n Said DC voltage V o11 To V o1n May be different and provide power to different loads according to the actual requirements of the loads. When the external power supply normally works, the AC/DC conversion circuit 111 converts the AC power into the DC power, and the DC/DC conversion circuits 121 to 12n respectively convert the DC power into the DC voltage V required by the load according to different requirements of the load o11 To V o1n And output to the load; when the external power supply is powered off, the battery B1 is connected to the direct current BUS BUS, and the DC/DC conversion circuits 121 to 12n convert the direct current BUS voltage into the direct current voltage V required by the load o11 To V o1n And output to the load. However, the circuit of FIG. 1 has a DC bus voltage V P Wide range and low DC/DC conversion efficiency.
FIG. 2 is a schematic diagram of another prior art alternative power source, either single phase or three phase AC V in2 The input end of the UPS circuit 231 is connected, the output end of the UPS circuit 231 is connected with the input end of the AC/DC conversion circuit 211, the output end of the AC/DC conversion circuit 211 is respectively connected with the input ends of the n DC/DC conversion circuits 221 to 22n in parallel, and the output ends of the n DC/DC conversion circuits 221 to 22n respectively output direct current voltage V o21 To V o2n To a corresponding load. However, the UPS circuit 231 will cause the transmission of the entire systemThe efficiency is reduced, the response time of the UPS circuit requires the retention time of the AC/DC converter circuit, the efficiency of the AC/DC converter circuit cannot be optimized, and a large number of energy storage electrolytic capacitors are required, resulting in a high cost, large size, and short life of the system.
The standby power supply shown in fig. 3 and 4 introduces a bidirectional DC/DC conversion circuit, because the bidirectional DC/DC conversion circuit has a certain response time, there is a requirement for the retention time of the AC/DC conversion circuit, so the AC/DC conversion circuit needs to adopt two-stage conversion structure PFC and DC/DC conversion, and simultaneously needs a large amount of energy storage electrolytic capacitors, resulting in high cost, short service life and large volume of the whole system, and in addition, the efficiency of the AC/DC conversion circuit is also limited.
Disclosure of Invention
The invention aims to provide a high-efficiency standby power supply system with zero delay response.
In order to achieve the purpose, the technical scheme of the invention is as follows:
the standby power supply system with zero time delay response comprises an AC/DC conversion circuit, a bidirectional DC/DC conversion circuit, a linear voltage stabilizing circuit, a DC/DC conversion circuit, a first diode and a battery, wherein the output end of the AC/DC conversion circuit is connected with a direct current bus in parallel, and the direct current bus is connected with the input end of the DC/DC conversion circuit in parallel; the input end of the bidirectional DC/DC conversion circuit is connected with two ends of the battery in parallel, the output end of the bidirectional DC/DC conversion circuit is connected with the input end of the linear voltage stabilizing circuit in parallel, the output end of the linear voltage stabilizing circuit is connected with the direct current bus in parallel, the anode of the first diode is connected with the input positive end of the bidirectional DC/DC conversion circuit, and the cathode of the first diode is connected with the output positive end of the bidirectional DC/DC conversion circuit.
The bidirectional DC/DC conversion circuit comprises a first inductor, a third switching tube and a fourth switching tube, wherein the first inductor, the third switching tube and the fourth switching tube are connected in a Boost topological structure.
In another embodiment, the zero-latency-response standby power system further includes a first switch connected in series with the first diode.
The bidirectional DC/DC conversion circuit comprises a second switch, a third switch, a fourth switch, a fifth switch and a second inductor, wherein the second switch, the third switch, the fourth switch, the fifth switch and the second inductor are connected in a Buck-Boost topological structure.
In a specific embodiment, the linear voltage stabilizing circuit includes a first switch tube, a first driving module, a first resistor, a second resistor, and a first operational amplifier, an input positive terminal of the linear voltage stabilizing circuit is connected to a drain of the first switch tube, a source of the first switch tube is connected to an output positive terminal of the linear voltage stabilizing circuit, the first resistor and the second resistor are connected in series, two ends of the series are connected in parallel to an output terminal of the linear voltage stabilizing circuit, a series midpoint of the first resistor and the second resistor is connected to an input negative terminal of the first operational amplifier, the input positive terminal of the first operational amplifier is connected to a reference voltage, an output terminal of the first operational amplifier is connected to an input terminal of the first driving module, an output terminal of the first driving module is connected to a gate of the first switch tube, and an input negative terminal of the linear voltage stabilizing circuit is connected to an output negative terminal thereof.
In a specific embodiment, the linear voltage stabilizing circuit includes a second switch tube, a second driving module, a third resistor, a fourth resistor, and a second operational amplifier, wherein an input negative terminal of the linear voltage stabilizing circuit is connected to a source of the second switch tube, a drain of the second switch tube is connected to an output negative terminal of the linear voltage stabilizing circuit, the third resistor and the fourth resistor are connected in series, two ends of the series are connected in parallel to an output terminal of the linear voltage stabilizing circuit, a series midpoint of the third resistor and the fourth resistor is connected to an input negative terminal of the second operational amplifier, an input positive terminal of the second operational amplifier is connected to the reference voltage, an output terminal of the second operational amplifier is connected to an input terminal of the second driving module, an output terminal of the second driving module is connected to a gate of the second switch tube, and an input positive terminal of the linear voltage stabilizing circuit is connected to an output positive terminal thereof.
The direct current bus is connected in parallel with the input ends of the plurality of DC/DC conversion circuits, and the output ends of the plurality of DC/DC conversion circuits are respectively connected with loads.
The zero-delay response standby power supply system has no requirements on energy storage and holding time of an AC/DC conversion circuit, can realize zero-delay response, and has high conversion efficiency, small volume and light weight.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic diagram of a first standby power supply in the prior art.
Fig. 2 is a schematic diagram of a second prior art backup power supply.
Fig. 3 is a schematic diagram of a third prior art standby power supply.
Fig. 4 is a diagram of a fourth prior art backup power supply.
FIG. 5 is a block diagram of an embodiment of a zero latency response backup power system of the present invention.
FIG. 6 is a diagram illustrating an embodiment of the linear voltage regulating circuit 561 of FIG. 5.
FIG. 7 is a diagram illustrating another embodiment of the linear voltage regulating circuit 561 of FIG. 5.
Fig. 8 is a schematic diagram of an embodiment of the bidirectional DC/DC conversion circuit 541 in fig. 5.
Fig. 9 is a schematic diagram of another embodiment of the bidirectional DC/DC conversion circuit 541 in fig. 5.
Fig. 10 is a block diagram of another embodiment of a zero-latency response standby power system of the present invention.
Fig. 11 is a schematic diagram of an embodiment of the bidirectional DC/DC conversion circuit 541 in fig. 10.
In the drawings, like reference numerals refer to the same drawing elements.
Detailed Description
In order to make the purpose and technical solution of the embodiments of the present invention clearer, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It should be apparent that the described embodiments are only some of the embodiments of the present invention, and not all of them. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
FIG. 5 is a block diagram of an embodiment of a zero latency response backup power system of the present invention. As shown in fig. 5, the zero-delay response backup power supply system of the present invention includes an AC/DC converting circuit 511, a bidirectional DC/DC converting circuit 541, a linear voltage stabilizing circuit 561, n DC/DC converting circuits 521 to 52n, a diode D1, and a battery B5. The input end of the AC/DC conversion circuit 511 is connected with single-phase or three-phase alternating current V in5 The output end of the AC/DC conversion circuit 511 is connected in parallel with a DC BUS, the DC BUS is connected in parallel with the input ends of n DC/DC conversion circuits 521-52 n, n is an integer, n is at least 1, n output ends of the DC/DC conversion circuits 521-52 n respectively output voltage V o51 To V o5n To the respective load; the output negative end of the AC/DC conversion circuit 511 is connected with the negative electrode of a battery B5, the input end of the bidirectional DC/DC conversion circuit 541 is connected with two ends of the battery B5 in parallel, the output end of the bidirectional DC/DC conversion circuit 541 is connected with the input end of the linear voltage stabilizing circuit 561 in parallel, the output end of the linear voltage stabilizing circuit 561 is connected with the direct current BUS BUS in parallel, the anode of the diode D1 is connected with the input positive end of the bidirectional DC/DC conversion circuit 541, and the cathode of the diode D1 is connected with the output positive end of the bidirectional DC/DC conversion circuit 541.
In the case that the battery B5 in FIG. 5 is fully charged, the battery voltage is still lower than the DC bus voltage V P . When the external power supply normally works, the single-phase or three-phase alternating current is converted into the direct current bus voltage V through the AC/DC conversion circuit 511 P According to different requirements of loads, the n DC/DC conversion circuits 521 to 52n convert the DC bus voltage V P Converted to a DC voltage V required by the load o51 To V o5n And output to a load, the DC voltage V o51 To V o5n May be different.
At the same time, the straightCurrent bus voltage V P The battery B5 is charged through the linear voltage stabilizing circuit 561 and the bidirectional DC/DC conversion circuit 541.
When the external power supply is powered off, the battery B5 instantly discharges through the diode D1 and the linear voltage stabilizing circuit 561 to access the DC BUS without any delay time, after the bidirectional DC/DC conversion circuit 541 is started, the voltage of the battery B5 is increased, the DC BUS is powered by the linear voltage stabilizing circuit 561, and when the DC BUS voltage V is lower than the DC BUS voltage V, the DC BUS is powered off P When a certain value is reached, i.e. the DC bus voltage V P Above the voltage of battery B5, the diode D1 is turned off. The linear voltage stabilizing circuit 561 bears that the output voltage of the bidirectional DC/DC conversion circuit 541 is higher than the DC bus voltage V P The voltage drop of the part ensures the DC bus voltage V P The DC/DC conversion circuits 521 to 52n convert the DC bus voltage V to a predetermined value or not lower P Conversion to dc voltage V required by the load o51 To V o5n And output to the load.
FIG. 6 is a schematic diagram of one embodiment of the linear voltage regulating circuit 561 of FIG. 5. As shown in fig. 6, the linear voltage stabilizing circuit 661 includes a switching tube Q1, a driving module 6611 of the switching tube Q1, a resistor R2, an operational amplifier A1, a resistor R3 and a capacitor C1, the input positive terminal of the linear voltage stabilizing circuit 661 is connected to the drain of the switching tube Q1, the source of the switching tube Q1 is connected to the output positive terminal of the linear voltage stabilizing circuit, the resistor R1 is connected to the resistor R2 in series, the two ends of the series are connected to the output terminal of the linear voltage stabilizing circuit 661 in parallel, the midpoint of the series connection of the resistor R1 and the resistor R2 is connected to the input negative terminal of the operational amplifier A1, the input positive terminal of the operational amplifier A1 is connected to a reference voltage V1 ref The input negative end of the operational amplifier A1 is connected to the first end of the capacitor C1, the second end of the capacitor C1 is connected to the first end of the resistor R3, the second end of the resistor R3 is connected to the output end of the operational amplifier A1, the output end of the operational amplifier A1 is connected to the input end of the driving module 6611 of the switching tube Q1, and the output end of the driving module 6611 of the switching tube Q1 is connected to the first end of the capacitor C1, the second end of the capacitor C1 is connected to the first end of the resistor R3, the output end of the operational amplifier A1 is connected to the input end of the driving module 6611 of the switching tube Q1, and the output end of the driving module 6611 of the switching tube Q1 is connected to the second end of the switching tube Q1And the input negative terminal of the linear voltage stabilizing circuit 661 is connected to the output negative terminal of the switching tube Q1. The operational amplifier A1 collects the voltage between the DC buses and the set voltage V ref After comparison, the output signal is sent to the driving module 6611 of the switching tube Q1, and the driving module 6611 outputs the driving signal of the switching tube Q1 after calculation, so as to ensure the dc bus voltage V P Unchanged or not lower than a certain set value.
FIG. 7 is a schematic diagram of another embodiment of the linear voltage regulating circuit 561 depicted in FIG. 5. As shown in fig. 7, the linear voltage stabilizing circuit 761 includes a switch tube Q2, a driving module 7611 of the switch tube Q2, a resistor R4, a resistor R5, an operational amplifier A2, a resistor R6 and a capacitor C2, an input negative terminal of the linear voltage stabilizing circuit 761 is connected to a source of the switch tube Q2, a drain of the switch tube Q2 is connected to an output negative terminal of the linear voltage stabilizing circuit 761, the resistor R4 is connected in series with the resistor R5, two ends of the series are connected in parallel with an output terminal of the linear voltage stabilizing circuit 761, a midpoint of the series connection between the resistor R4 and the resistor R5 is connected to the input negative terminal of the operational amplifier A2, and an input positive terminal of the operational amplifier A2 is connected to a reference voltage V2 ref The input negative end of the operational amplifier A2 is connected to the first end of the resistor R6, the second end of the resistor R6 is connected to the first end of the capacitor C2, the second end of the capacitor C2 is connected to the output end of the operational amplifier A2, the output end of the operational amplifier A2 is connected to the input end of the driving module 7611 of the switch tube Q2, the output end of the driving module 7611 of the switch tube Q2 is connected to the gate of the switch tube Q2, and the input positive end of the linear voltage stabilizing circuit 761 is connected to the output positive end thereof. The operational amplifier A2 collects the voltage between the direct current buses and the set voltage V ref After comparison, the output signal is sent to the driving module 7611 of the switch tube Q2, and the driving module 7611 outputs the driving signal of the switch tube Q2 after re-operation, so as to ensure the voltage V of the direct current bus P Unchanged or not lower than a certain set value.
Fig. 8 is a schematic diagram of an embodiment of the bidirectional DC/DC conversion circuit 541 shown in fig. 5. As shown in fig. 8, the bidirectional DC/DC conversion circuit 841 includes an inductorThe bidirectional DC/DC conversion circuit 841 is a Boost topological structure, the input positive end of the DC/DC conversion circuit 841 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the output positive end of the DC/DC conversion circuit 841, and when the voltage of the battery B5 is lower than the voltage V (volt) of a direct current bus, the inductor L1, the switch tube Q3 and the switch tube Q4 are connected in a Boost topological structure, namely the bidirectional DC/DC conversion circuit 841 is a Boost circuit, the input positive end of the DC/DC conversion circuit 841 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the output positive end of the DC/DC conversion circuit 841, and when the voltage of the battery B5 is lower than the voltage V (volt) of the direct current bus P When the DC/DC conversion circuit 841 is started to operate, the DC bus voltage V is converted into the DC/DC conversion voltage P Remain unchanged or not lower than a set value.
Fig. 9 is a schematic diagram of another embodiment of the bidirectional DC/DC conversion circuit 541 shown in fig. 5. As shown in fig. 9, the bidirectional DC/DC conversion circuit 941 includes an inductor L1, a switch tube Q3, and a switch tube Q4, the inductor L1, the switch tube Q3 and the switch tube Q4 are connected in a Boost topology, that is, the bidirectional DC/DC conversion circuit 941 is a voltage Boost circuit, an anode of the diode D1 is connected to a source of the switch tube Q4, a cathode of the diode D1 is connected to an output positive terminal of the DC/DC conversion circuit 941, and when a voltage of the battery B5 is lower than a DC bus voltage V P When the DC/DC conversion circuit 941 starts to operate, the DC bus voltage V is applied P Remain unchanged or do not fall below a certain set value.
Fig. 10 is a block diagram of another embodiment of a zero-latency response standby power system of the present invention. As shown in fig. 10, unlike fig. 5, a switch K1 is connected in series between the positive input terminal of the bidirectional DC/DC conversion circuit 541 and the anode of the diode D1.
Fig. 11 is a schematic diagram of an embodiment of the bidirectional DC/DC conversion circuit 541 in fig. 10. As shown in fig. 11, the bidirectional DC/DC conversion circuit 1141 includes a switch S1, a switch S2, a switch S3, a switch S4, and an inductor L2, and the switch S1, the switch S2, the switch S3, the switch S4, and the inductor L2 are in a Buck-Boost topology, that is, the bidirectional DC/DC conversion circuit 1141 is a Buck-Boost circuit.
In the case where the battery B5 in fig. 10 is fully charged, the battery voltage is higher than the dc bus voltage V P . When the external power supply works normally, the single-phase or three-phase ACThe AC/DC converter 511 converts the current into a DC bus voltage V P According to different requirements of loads, the direct current bus voltage V is converted by the n DC/DC conversion circuits 521 to 52n P Converted to a DC voltage V required by the load o51 To V o5n And output to a load, the DC voltage V o51 To V o5n May be different.
At the same time, the DC bus voltage V P The battery B5 is charged through the linear voltage stabilizing circuit 561 and the bidirectional DC/DC conversion circuit 541, and at this time, the switch K1 is turned off. After the charging is completed, the switch K1 is closed. The switch K1 receives a system control signal through a driving circuit (not shown in the figure), and is in an off state in the process of charging the battery B5, and the switch K1 is turned on by the system control signal until the battery is fully charged, and is in a standby state.
When the external power supply is cut off, if the battery B5 is in a fully charged state and the battery voltage is higher than the DC bus voltage V P If the battery B5 is instantly discharged to access the dc bus through the diode D1 and the linear voltage stabilizing circuit 561 without any delay time, the linear voltage stabilizing circuit 561 bears the battery voltage higher than the dc bus voltage V P The voltage drop of the part ensures the DC bus voltage V P The DC/DC conversion circuits 521 to 52n convert the DC bus voltage V to a predetermined value or not lower P Converted to a DC voltage V required by the load o51 To V o5n And output to the load; if the voltage of the battery B5 drops to be close to or lower than the DC bus voltage V P When the diode D1 is turned off, the linear voltage stabilizing circuit 561 is turned on, and the bidirectional DC/DC converter 541 starts to operate to convert the DC bus voltage V P Remain unchanged or not lower than a set value.
Without a linear regulator circuit, the maximum voltage of battery B5 can only be lower than or equal to the dc bus voltage V P Therefore, the bidirectional DC/DC conversion circuit 541 can only operate and stand-by at all times, although the diode D1 will make the battery discharge the DC bus instantaneously, the voltage drop of the diode D1 itself and the internal resistance of the battery will causeThe DC bus voltage drops instantaneously from the normal operating voltage to a certain voltage (the specific dropping voltage amplitude depends on the design of the battery, and generally there is about several tens of volts), and the bidirectional DC/DC conversion circuit 541 has a certain delay in response to the jump of the load, which further causes the DC bus voltage V to drop P The input voltages of the subsequent DC/DC conversion circuits 521 to 52n have a wide range, so that the efficiency of the subsequent DC/DC conversion circuits 521 to 52n cannot be optimized, and the preceding AC/DC conversion circuit 511 needs a two-stage structure and adds a large amount of energy storage capacitors to realize the function of holding time. Therefore, in order to maintain the bus voltage stable, the full charge voltage of the battery needs to be slightly higher than the bus voltage depending on the battery type. Therefore, with the boost circuit employed in the embodiment of fig. 5, if this boost circuit is employed to charge the battery, the battery voltage cannot be higher than the bus voltage; if the battery voltage is desired to be higher than the bus voltage, additional charging circuitry is required to charge the battery. If the voltage increasing and decreasing circuit is adopted, the voltage of the battery can be charged by the voltage increasing and decreasing circuit, and the voltage of the battery is higher than the voltage of the bus.
In the invention, a mode of combining the booster circuit or the buck-boost circuit with the linear voltage stabilizing circuit is adopted, the fully charged battery B5 can be discharged instantly through the diode D1 and the linear voltage stabilizing circuit 561 without delay, and no delay time exists, so that the voltage V of the direct-current bus is ensured P After the external power supply is powered off, the supplementary electric energy is immediately obtained to ensure the voltage V of the direct current bus P The input voltage of the post-stage DC/DC conversion circuit is not changed or is not lower than a set value, so that the change range of the input voltage of the post-stage DC/DC conversion circuit is almost zero, and the highest-efficiency operation of the post-stage DC/DC conversion circuit is ensured.
The linear voltage stabilizing circuit 561 is used for counteracting the full charge of the battery B5, and the battery voltage is higher than the required DC bus voltage V P The voltage drop over time. In the initial discharge period of the fully charged battery B5, the voltage of the battery B5 is reduced quickly, and the voltage of the battery is close to or lower than the voltage V of the direct current bus quickly P At this time, the linear voltage regulator circuit 561 is fully turned on, the voltage drop thereon is 0, and the voltage boost circuit 521 starts to operate, thereby reducing the voltage dropThe DC bus voltage is maintained at V P Or not lower than a set value.
The zero-delay response standby power system of the invention can also be applied to a three-phase alternating current system, and the connection mode and the working principle thereof are similar to those of the above embodiments, and are not described again.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (9)

1. The standby power supply system with zero time delay response is characterized by comprising an AC/DC conversion circuit, a bidirectional DC/DC conversion circuit, a linear voltage stabilizing circuit, a DC/DC conversion circuit, a first diode and a battery, wherein the output end of the AC/DC conversion circuit is connected with a direct current bus in parallel, and the direct current bus is connected with the input end of the DC/DC conversion circuit in parallel; the input end of the bidirectional DC/DC conversion circuit is connected with two ends of the battery in parallel, the output end of the bidirectional DC/DC conversion circuit is connected with the input end of the linear voltage stabilizing circuit in parallel, the output end of the linear voltage stabilizing circuit is connected with the direct current bus in parallel, the anode of the first diode is connected with the input positive end of the bidirectional DC/DC conversion circuit, and the cathode of the first diode is connected with the output positive end of the bidirectional DC/DC conversion circuit.
2. The zero-delay response standby power system of claim 1 further comprising a first switch in series with the first diode.
3. The zero-delay response standby power system of claim 1 or 2, wherein the linear voltage stabilizing circuit comprises a first switch tube, the positive input terminal of the linear voltage stabilizing circuit is connected with the drain electrode of the first switch tube, and the source electrode of the first switch tube is connected with the positive output terminal of the linear voltage stabilizing circuit.
4. The zero-delay response standby power system of claim 3, wherein the linear voltage regulator circuit further comprises a first driving module, a first resistor, a second resistor, and a first operational amplifier, wherein the first resistor is connected in series with the second resistor, the two ends of the first resistor are connected in parallel with the output end of the linear voltage regulator circuit, the midpoint of the series connection between the first resistor and the second resistor is connected to the input negative terminal of the first operational amplifier, the input positive terminal of the first operational amplifier is connected to a reference voltage, the output terminal of the first operational amplifier is connected to the input terminal of the first driving module, the output terminal of the first driving module is connected to the gate of the first switching tube, and the input negative terminal of the linear voltage regulator circuit is connected to the output negative terminal thereof.
5. The zero-latency response standby power system of claim 1 or 2, wherein the linear voltage regulator circuit comprises a second switching tube, the input negative terminal of the linear voltage regulator circuit is connected to the source of the second switching tube, and the drain of the second switching tube is connected to the output negative terminal of the linear voltage regulator circuit.
6. The zero-delay-response standby power system of claim 5, wherein the linear voltage regulator circuit further comprises a second driving module, a third resistor, a fourth resistor, and a second operational amplifier, the third resistor is connected in series with the fourth resistor, the two ends of the series are connected in parallel with the output end of the linear voltage regulator circuit, the midpoint of the series connection of the third resistor and the fourth resistor is connected to the input negative terminal of the second operational amplifier, the input positive terminal of the second operational amplifier is connected to a reference voltage, the output terminal of the second operational amplifier is connected to the input terminal of the second driving module, the output terminal of the second driving module is connected to the gate of the second switching tube, and the input positive terminal of the linear voltage regulator circuit is connected to the output positive terminal thereof.
7. The zero-delay response standby power system as claimed in claim 1, wherein the bidirectional DC/DC conversion circuit includes a first inductor, a third switching tube and a fourth switching tube, and the first inductor, the third switching tube and the fourth switching tube are connected in a Boost topology.
8. The zero-delay response standby power system as claimed in claim 2, wherein the bidirectional DC/DC conversion circuit comprises a second switch, a third switch, a fourth switch, a fifth switch and a second inductor, and the connection manner of the second switch, the third switch, the fourth switch, the fifth switch and the second inductor is a Buck-Boost topology structure.
9. The zero-delay-response standby power system according to claim 1 or 2, wherein the DC bus is connected in parallel with input terminals of a plurality of the DC/DC conversion circuits, and output terminals of the plurality of the DC/DC conversion circuits are respectively connected to a load.
CN202211463448.8A 2022-11-22 2022-11-22 Zero-delay response standby power supply system Pending CN115800496A (en)

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CN202211463448.8A CN115800496A (en) 2022-11-22 2022-11-22 Zero-delay response standby power supply system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211463448.8A CN115800496A (en) 2022-11-22 2022-11-22 Zero-delay response standby power supply system

Publications (1)

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CN115800496A true CN115800496A (en) 2023-03-14

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