GB2354109A - Interconnects for charge coupled devices. - Google Patents
Interconnects for charge coupled devices. Download PDFInfo
- Publication number
- GB2354109A GB2354109A GB9921392A GB9921392A GB2354109A GB 2354109 A GB2354109 A GB 2354109A GB 9921392 A GB9921392 A GB 9921392A GB 9921392 A GB9921392 A GB 9921392A GB 2354109 A GB2354109 A GB 2354109A
- Authority
- GB
- United Kingdom
- Prior art keywords
- titanium nitride
- layer
- titanium
- optical sensor
- sensor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010936 titanium Substances 0.000 claims abstract description 28
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 21
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 20
- 238000004544 sputter deposition Methods 0.000 claims abstract description 10
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 16
- 230000003287 optical effect Effects 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- SYQQWGGBOQFINV-FBWHQHKGSA-N 4-[2-[(2s,8s,9s,10r,13r,14s,17r)-10,13-dimethyl-17-[(2r)-6-methylheptan-2-yl]-3-oxo-1,2,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-2-yl]ethoxy]-4-oxobutanoic acid Chemical compound C1CC2=CC(=O)[C@H](CCOC(=O)CCC(O)=O)C[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2 SYQQWGGBOQFINV-FBWHQHKGSA-N 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 14
- 239000010410 layer Substances 0.000 description 35
- 235000012431 wafers Nutrition 0.000 description 8
- 238000001465 metallisation Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000004907 flux Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76847—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned within the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
- H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
An interconnect layer 18 comprises a sandwich of alternating TiN and Ti layers. The layers deposited in a collimated sputtering chamber supplied with nitrogen and having a titanium target. The interconnect may be used in CMOS active pixel sensors.
Description
2354109 CCD WAFERS WITH TITANIUM REFRACTORY METAL This invention related
to optical sensor devices, such as charge coupled devices, and in particular to a method of making an optical sensor device with a metalization layer capable of withstanding high temperature treatment used during SITe's backside thinning process while making backside illuminated sensors to improve quantum efficiency and reduce dark current.
As is well known in the art, charge coupled devices (CCDs) are used in a variety of optical applications and are the active component in video cameras. Such devices consist of an array of field effect transistors with a polysilicon contact layer formed over the date, and over which is placed a pyroglass protective layer with contact openings so that an overlying metalization layer fortning interconnects can make contact with the exposed polysilicon.
Typically, an aluminum alloy is used as the metalization layer in semiconductor devices. The problem with aluminum is that it will not withstand temperatures in excess of about 4500C, whereas in order to reduce dark current, CCI)s need to be annealed at temperatures considerably higher than this. In the prior art, it is known to replace aluminum by tungsten, but the problem with tungsten is that it forms under stress, which causes it to flake, and also it does not adhere to N+ and P+ silicon contacts.
An object of the invention is to alleviate the afore-mentioned problems in the prior art.
According to the present invention there is provided a method of making an optical sensor device, such as a charge coupled device, including an interconnect layer to contact active areas comprising the steps of depositing a first titanium nitride layer on said active areas; and depositing a plurality of alternating titanium and titanium nitride layers to form a composite sandwich structure The titanium nitride/titanium (TiN/Ti) sandwich structure is capable of withstanding the anneal temperatures required to reduce dark current. The titanium is in tensile stress and the TiN in compressive stress. By suitably depositing the layers, the stresses cancel out and thus eliminate the flaking problems experienced in the prior art.
The top layer of the sandwich structure is also preferably TiN since titanium oxidizes quickly, but it could be titanium.
The structure is also simple to form since it can be applied in a single sputtering chamber. To switch from Ti to TiN, it is merely necessary to turn on the supply of nitrogen.
The Ti/TiN is preferably deposited in a common collimated sputtering chamber. The collimator is located below the titanium target and reduces the titanium flux on the lower side of the collimator so that stochiometric TiN can be deposited on the wafer. With the collimator TiN having a bulk resistivity of 50 microohm cm. can be obtained.
The invention also provides an optical sensor device including an interconnect layer to contact active areas, wherein said interconnect layer comprises a first layer of titanium nitride layer on said active areas; and a plurality of alternating titanium and titanium nitride layers to form a composite sandwich structure.
The invention will now be described in more detail, by way of example only, with reference to the accompanying drawings, in which-- Figure I is a schematic view showing a metalization layer in a charge coupled device; and Figure 2 is a schematic view of a sputtering chamber with collimator.
Referring now to Figure 1, the charge coupled device comprises a silicon substrate 10 containing transistors with active areas, such as P+ active area 12, for example, source and drain regions of FETs, and gate 14. Polysilson contact layers 16, for example consisting of poly 1, 2 and 3 layers are deposited on the contact gate 14.
Typically, a Vapox pyroglass protective layer 22 is deposited over the ploy layers 16 and active areas 12 to protect the exposed layers. Contact holes 24 are then formed and extends between the interconnect layer and substrate a metalization layer 18 forming an interconnect layer, is deposited on the poly layer 16 and the active areas 12 to provide the necessary interconnections between the component elements of the device.
As will be seen the interconnect layer 18 must be deposited on the poly layer 18 and also the active P+ area 12.
The interconnect layer 18 consists of a TiN/Ti/TiN/Ti/TiN sandwich structure. Each TiN layer is 1 OOOA thick and each Ti layer is 200 A thick.
The layers are deposited in a collimated sputtering chamber as shown in Figure 2. This consists of a conventional sputtering chamber 30 with a titanium target 32, and wafer support 34 shown supporting wafer 36. A first supply line 38 is provided for an inert gas, typically argon, and a second supply line is provided for nitrogen.
Collimator 42, which is provided between the titanium target 32 and the wafer 36, consists of a honeycomb arrangement of longitudinal channels that transfer only the titanium atoms travelling in the vertical direction onto the wafer with the result that the titanium flux under the collimator is at least five times less than immediately under the tungsten target.
The high titanium flux above the collimator prevents the titanium target from being poisoned by the nitrogen gas during the deposition of TiN. This ensures that the titanium target remains pure and results in a very uniform layer of high quality, stoichiometric TiN being deposited on the wafer. This is important to ensure low resistivity of the TiN layer.
With a five layer structure as described for the interconnect layer 18, which has a total thickness of 3,400A, it is possible to achieve a sheet resistance of about 1 K2 per square. This is quite an achievement, in part due to the use of the collimated sputtering system which permits the manufacture of TiN layers having very good sheet resitance. The resulting sandwich is substantially stress free.
It is known that the sheet resistance of titanium decreases with layer thickness, but typically greater thicknesses would be required at the risk of increasing stress.
The TiN bonds well to poly and N+ or P+ silicon with low contact resistance. Even though the conductivity of TiN is normally poor, in combination with Ti in the structure described, it has excellent properties.
Another important advantage of the structure described arises in connection with back illuminated CCDs. In this case, the substrate, which may start off about 675 microns thick, is back polished to 10 to 15 microns to make it transparent to incident light. The sandwich structure described does not have a tendency to flake or cause the wafer to bow as the thickness is reduced because the tensile and compressive stresses cancel.
The invention is also applicable to CMOS active pixel sensors or other circuitry.
Claims (12)
- We claim:A method of making an optical sensor device including an interconnect layer to contact active areas comprising the steps of; depositing a first titanium nitride layer on said active areas; and depositing a plurality of alternating titanium and titanium nitride layers to form a composite sandwich structure.
- 2. A method as claimed in claim 1, wherein the top layer of said sandwich structure is titanium nitride.
- 3. A method as claimed in claim 1, wherein said titanium nitride and titanium layers are deposited by sputtering in a chamber alternately in the absence and presence of nitrogen.
- 4. A method as claimed in claim 3, wherein said sputtering is carried out in a collimated sputtering chamber.
- 5. A method as claimed in claim 1, wherein said titanium nitride layers are approximately I OOOA thick.
- 6. A method as claimed in claim 5, wherein said titanium nitride layers are approximately 200A thick
- 7. A method as claimed in claim 1, wherein said optical sensor device is a charge coupled device.
- 8. An optical sensor device including an interconnect layer to contact active areas wherein said interconnect layer comprises a first layer of titanium nitride layer on said active areas; and a plurality of alternating titanium and titanium nitride layers to form a composite sandwich structure.
- 9. An optical sensor device as claimed in claim 8, wherein the top layer of said sandwich structure is titanium nitride.
- 10. An optical sensor device as claimed in claim 8, wherein said titanium nitride layers are approximately I OOOA thick.
- 11. An optical sensor device as claimed in claim 10, wherein said titanium nitride layers are approximately 200A thick 1 1
- 12. An optical sensor device as claimed in claim 8, wherein said optical sensor device is a charge coupled device.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9921392A GB2354109B (en) | 1999-09-11 | 1999-09-11 | CCD Wafers with titanium refractory metal |
| CA002316459A CA2316459A1 (en) | 1999-09-11 | 2000-08-18 | Ccd wafers with titanium refractory metal |
| US10/435,043 US6833282B2 (en) | 1999-09-11 | 2003-05-12 | Method of forming an optical sensor device having a composite sandwich structure of alternating titanium and titanium nitride layers |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9921392A GB2354109B (en) | 1999-09-11 | 1999-09-11 | CCD Wafers with titanium refractory metal |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9921392D0 GB9921392D0 (en) | 1999-11-10 |
| GB2354109A true GB2354109A (en) | 2001-03-14 |
| GB2354109B GB2354109B (en) | 2004-07-14 |
Family
ID=10860678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9921392A Expired - Fee Related GB2354109B (en) | 1999-09-11 | 1999-09-11 | CCD Wafers with titanium refractory metal |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2354109B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4553154A (en) * | 1981-01-13 | 1985-11-12 | Sharp Kabushiki Kaisha | Light emitting diode electrode |
| US5317187A (en) * | 1992-05-05 | 1994-05-31 | Zilog, Inc. | Ti/TiN/Ti contact metallization |
| WO1996026537A1 (en) * | 1995-02-24 | 1996-08-29 | Advanced Micro Devices, Inc. | A PROCESS FOR IN-SITU DEPOSITION OF A Ti/TiN/Ti ALUMINUM UNDERLAYER |
-
1999
- 1999-09-11 GB GB9921392A patent/GB2354109B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4553154A (en) * | 1981-01-13 | 1985-11-12 | Sharp Kabushiki Kaisha | Light emitting diode electrode |
| US5317187A (en) * | 1992-05-05 | 1994-05-31 | Zilog, Inc. | Ti/TiN/Ti contact metallization |
| WO1996026537A1 (en) * | 1995-02-24 | 1996-08-29 | Advanced Micro Devices, Inc. | A PROCESS FOR IN-SITU DEPOSITION OF A Ti/TiN/Ti ALUMINUM UNDERLAYER |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2354109B (en) | 2004-07-14 |
| GB9921392D0 (en) | 1999-11-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20160911 |