GB2350754A

GB2350754A - Calibration of slow clock signal

Info

Publication number: GB2350754A
Application number: GB0006723A
Authority: GB
Inventors: Fernando Romao; Karim Embarek
Original assignee: Sagem SA
Current assignee: Sagem SA
Priority date: 1999-03-18
Filing date: 2000-03-20
Publication date: 2000-12-06
Anticipated expiration: 2020-03-20
Also published as: FR2791217A1; GB2350754B; FR2791217B1; DE10012635A1; GB0006723D0; DE10012635C2

Abstract

In order to reduce current consumption in a mobile telephone, a slow clock signal is used while the mobile is in a standby state. The circuit providing the slow clock signal is calibrated by the circuit providing the fast clock signal before it is deactivated. Data received from the network is used to determine a known period of time delta between a first date T<SB>0</SB> and second date T<SB>1</SB>. The number of time periods of the fast clock during one period of the slow clock N is determined. A value of the duration delta is divided by the number N and a number M is obtained, M comprises an integer part E and a decimal part D. m periods are counted with the fast clock signal, where m<n with n equal to D x N, between the date T<SB>0</SB> and a first edge of the slow clock signal after the date T<SB>0</SB>. A value r of the remainder of the subtraction between m and n is stored in the data memory of the mobile. The mobile is then placed in a standby state, E periods are counted with the slow clock signal, r periods are counted with a fast clock signal. The mobile is subsequently placed in an active state.

Description

2350754 Method of standby operation in a mobile telephone The present

invention relates to a method of standby operation in a mobile telephone. One of the goals of the invention is to place a mobile telephone in a standby state while providing for low power consumption. This reduction of power consumption increases the autonomy of a power supply source of a mobile telephone. The invention can equally well be applied to any portable device such as for example a portable computer. A portable device is a device with an independent power supply source. Thus, the portable device can move without being confined to any spatial boundaries while at the same time remaining powered by the power supply source.

At present, methods of standby operation are being implemented with a first circuit that gives a fast clock signal and a second circuit that gives a slow clock signal. It is also possible to put a device on standby by allowing only a minimum number of possible functions to be powered in cases where there is no slow clock signal. The fast clock signal has a frequency higher than a frequency of the slow clock signal. With these methods, a microprocessor of a mobile telephone has its rate set, during an active state, by the first circuit. An active state is a state in which a mobile telephone can communicate with a mobile telephony network with which it is radioelectrically connected. When a mobile telephone exchanges no information with a network, then it can be put into a standby state. In this standby state, a fast clock signal that sets the rate of the microprocessor is exchanged for a slow clock signal. To achieve this, a clock input of the microprocessor is switched over from the first circuit to the second circuit.

Thus the microprocessor has its rate set by a slow clock signal.

A method of this kind has problems. Indeed, when a device is in standby state, only one transmission-reception device of the mobile telephone is deactivated. The other circuits such as the microprocessor or the clock circuits for their part remain powered by a power supply source.

Thus, there is still high power consumption during a standby state of the mobile telephone. One of the elements that consume the most energy is the first circuit which gives the fast clock signal. This first circuit commonly consumes power in the range of 2 mA.

In the prior art, the first circuit must remain activated during a standby

2 state. Indeed, a mobile telephone must remain permanently synchronized with a mobile telephony network to which it is connected. More specifically, the fast clock circuit has an automatic control link governed by a reference given by the network. The fact of keeping the first circuit activated when going from a standby state to an active state means that a mobile telephone is always synchronized with a network since the first circuit giving the fast clock signal is always active. As a quid pro quo, this feature results in substantial power consumption during a period when a mobile telephone is on standby.

In addition, there is another problem pertaining to the microprocessor used. Indeed, with a structure of this kind, a microprocessor must be capable of operating with these two frequency values. Thus, when this standby method is used, the mobile telephone must be provided with a microprocessor known as a static microprocessor. A static microprocessor is designed to work with a fast clock signal but it can also work with a slow clock signal having a frequency value equal to a few tens of kHz.

It is an object of the present invention to overcome these problems by proposing a method of standby operation in which, especially, the power supply of the first circuit giving the fast clock signal is deactivated. It is also possible to cut off the supply to the processor. The method of the invention therefore remains applicable even with a dynamic processor, i.e. a non- static processor. In this method, a duration of a standby state is then controlled by a device whose rate is set by the second circuit giving the slow clock signal.

This second circuit is advantageous because a current consumption of this second circuit is about 1 pA. However, this advantage has an associated drawback due to a non-negligible drift in the clock frequency, under temperature, of about 1 ppm, as well as low precision in the frequency value of this circuit of about 30 ppm.

With the invention, in order to overcome this problem, the second circuit is calibrated by means of the first circuit when the mobile telephone is active. Thus a frequency and therefore a duration of one period of the second circuit is perfectly known. Furthermore, this calibration is obtained regularly, for example before each standby state, in order to overcome drifts especially in temperature of this second circuit. In this case, characteristics of the slow clock signal are perfectly known. Given the high periodicity of the calibration 3 operations, the temperature drift may be overlooked. Thus, a reference signal is obtained during a standby state, making it possible to keep a synchronization with a mobile telephony network with which a mobile telephone is connected.

In the invention, a number of periods to be counted is determined on the basis of the slow clock signal that calibrates it. This number of periods comprises an integer part and a decimal part. The integer part is counted at a fixed rate by a slow clock signal. The decimal part is counted at a fixed rate by the fast clock signal. A counting duration of the integer part may correspond to a duration of the standby state of the mobile telephone.

The method of the invention can be applied to any type of mobile telephone, whether or not it has a static microprocessor.

An object of the invention therefore is a method of standby operation in a mobile telephone characterized in that.

- a mobile telephone is connected by an antenna to a mobile telephony network, - the mobile telephone is fitted out with a transmission-reception radioelectrical device connected to the antenna, a first circuit giving a fast clock signal, a second circuit giving a slow clock signal, a microprocessor connected by a bus to a data memory and a potential source powering these different elements, - information elements from the network are received on the antenna of the mobile telephone indicating a difference delta between a known date To and a subsequent date T1, - a number N of periods of the fast clock signal contained in a period of the slow clock signal is counted, - a value of the duration delta is divided by the number N and a number M is obtained, M consisting of an integer part E and a decimal part D, - m periods are counted with the fast clock signal, with m < n where n is equal to D x N, between the date To and a first edge of the slow clock signal after the date To, - a value r of a remainder of a subtraction between m and n is stored in the data memory of the mobile telephone, - the mobile telephone is placed in a standby state, 4 - E periods are counted with the slow clock signal, - r periods are counted with a fast clock signal, - the mobile telephone is placed in an off-standby state.

The invention will be understood more clearly from the following description and the appended figures. These figures are given purely by way of an indication and in no way restrict the scope of the invention. Of these figures:

- Figure 1 shows a view of different means of a mobile telephone used by the method of the invention, - Figure 2 shows the temporal progress, in the form of timing diagrams, of signals used in the method of the invention, - Figure 3 shows a view, in the form of an algorithm, of a possible sequencing of the different steps of the method of the invention.

Figure 1 shows a mobile telephone 1 that can be used to implement the method of the invention. The mobile telephone 1 comprises an antenna 2. This mobile telephone I is radioelectrically connected with a mobile telephony network 3 by means of the antenna 2. Regularly, the network 3 sends information 4 to the antenna 2 of the mobile telephone 1. This information 4 pertains to a difference delta between a known date To and a subsequent date T1. A date To for example is a date at which the mobile telephone 1 must start listening in order to know if it is receiving an incoming call. A date T, is a subsequent appointed time to repeat a listening operation of this kind. To process the information 4, the mobile telephone 1 comprises especially a radioelectrical device 5 connected to the antenna 2, a microprocessor 6, a program 7 in a program memory 8, a data memory 9 and a communications bus 10 that connects these elements to one another. The term (( microprocessor >> is understood to mean all the baseband signal processing means, namely means other than those used to process radioelectrical signals. This includes the processor itself, comprising for example one or more DSPs and their associated logic circuits. The device 5 is responsible for translating the information elements 4 into pieces of data that are comprehensible to the program 7, and is especially responsible for demodulating them and quantifying them. These pieces of data are placed in the data memory 9 by the microprocessor 6 using the bus 10. The data memory 9 thus has an information element on the value of the difference delta between the date To and the date T1.

The mobile telephone 1 is furthermore provided with a first circuit 11 giving a fast clock signal and a second circuit 12 giving a slow clock signal. It is also provided with a potential source 13 constituting a potential source supplying power to the different elements of the mobile telephone 1. The mobile telephone 1 furthermore has a counting circuit 14 and a circuit 15, hereinafter called an ASIC, for placing the mobile telephone 1 on standby.

The circuit 15 is an ASIC (application specific integrated circuit) circuit capable of performing some but not all of the operations normally performed by the microprocessor 6. The circuit 15 in particular is responsible for activating the microprocessor 6 at the end of the standby period. In practice, the circuit 14 is incorporated into the circuit 15 and therefore forms one and the same ASIC.

The counting circuit 14, in addition to a connection to the bus 10, has an input 16 and an input 17. The input 16 is connected to the first circuit 11 and the input 17 is connected to the second circuit 12. This counting circuit 14 is responsible for counting a number N of periods of the fast clock signal contained in a period of the slow clock signal. In one variant, the counting device 14 has a number of periods of the fast clock signal contained in several successive periods of the slow clock signal. In this variant, the program 7 defines a number N by dividing a number of periods of the fast clock signal by a number of periods of the slow clock signal.

The value of N obtained is stored in the data memory 9. The program 7 uses the value of N and the value of the difference delta to determine a number of equivalent periods of the slow clock signal. Depending on the unit in which the difference delta is expressed, two embodiments are possible. In a first preferred embodiment, the network 3 sends pieces of information 4 where the information on the difference delta is expressed in units of time, seconds for example. Thus, the program 7 multiplies the value of N by a duration of one period of the slow clock signal. Then, the program 7 divides the value of the difference delta by the result of this multiplication. Thus, a number M is obtained.

In a second embodiment, the information sent is expressed in numbers of periods of the fast clock signal. To obtain the value of M, the program 7 directly divides the difference delta by the value of N.

6 The number M consists of an integer part E defining a number of periods of the slow clock signal. This number M furthermore has a decimal part D defining a fraction of a period of the slow clock signal. This value D cannot be counted on the basis of the slow clock signal since it is smaller than the duration of a period of the slow clock signal. Rounding down or rounding up the value of the number M amounts to making an error that may be equal to one period of the slow clock signal, This is intolerable. Indeed, when there is a return to an active state of the mobile telephone 1, a synchronization requested between the network 3 and the mobile telephone 1 must be made with a precision of less than 1 ps. This means that a lag between an activation of the mobile telephone 1 and the planned date T, should not exceed 1 ps. If this is not the case, the mobile telephone 1 cannot communicate with the network 3 since it will have missed the appointed date T1. Thus, this decimal part D is counted but in terms of number of periods of the fast clock signal. To do this, the program 7 converts the value of the number D into a value n of periods of the fast clock signal by multiplying D by N. This value of N is stored in the data memory 9 by the microprocessor 6. In practice, Figure 2 gives a schematic view of a duration corresponding to the result M. This duration corresponds to the slow counting duration E and to a fast counting duration n, where n = m + r.

When the date To is past, the mobile telephone 1 can be put into a standby state. In a first stage, the circuit 15 counts m periods of the fast clock signal between the date To and the date T2 of a first edge of the slow clock signal after the date To. This value of m therefore corresponds to a phase shift between the fast clock signal at the date To and the slow clock signal, the unit of this phase shift being expressed in numbers of periods of fast clock signals. A value of m thus obtained is thus subtracted from the value of n to give a remainder r. The remainder r is stored in a memory (not shown) of the circuit 15. Starting from the time where this first edge of the slow clock signal occurs, E periods are counted with the slow clock circuit. Thus, the mobile telephone is placed in a standby state for a duration T2-T4 during which the E periods are counted.

Starting from this first edge, the ASIC 15 stops the power supply, through the potential source 13, of the different elements of the mobile telephone 1 including especially that of the first circuit 11. Once the E periods 7 have been counted, the ASIC circuit 15 again supplies power to the first circuit 11 and r periods are counted with a fast clock circuit. At the end of the counting of E periods, the mobile telephone 1 is placed in an active state.

Later, at the date T, which corresponds to the date on which the network 3 has set an appointed date, the mobile telephone 1 can again exchange pieces of information such as 4 with the network 3. Furthermore, the second circuit 12 is again calibrated with the first circuit 11.

In a preferred example, the first circuit 11 giving the fast clock signal is connected to the microprocessor 6. The ASIC 15 is responsible for counting the E periods of the slow clock signal. Consequently, the second circuit 12 giving the slow clock signal is connected to the ASIC 115 The mobile telephone I has a switch device 18 with a supply input 19, a control input 20 and an output 21. The input 19 is connected to the potential source 13. The output 21 is connected to the device 5, the microprocessor 6, the clock circuit 11, the counting device 14, the program memory 8 and the data memory 9. The second circuit 12 and the ASIC 15 are directly connected to the potential source 13. The ASIC 15 furthermore comprises a control output 22. This control output 22 of the ASIC 15 is connected to the control input 20 of the switch device 18. During the period of counting the E periods of the slow clock signal, the ASIC 15 sends the switch device information such that the switch device 18 behaves like an open circuit between the supply input 19 and the output 21. Thus, all the elements connected to the output 21 are no longer supplied with power. A power consumption depends, in the standby state, essentially on the clock circuit 12 and the ASIC 15.

Figure 2 gives a view, in the form of timing diagrams 23 to 27, of the progress in time of the method of the invention. The timing diagram 23 shows dates corresponding to the main events that occur before, during and after a period when the mobile telephone 1 is in a standby state. The telephone goes into standby state after or at the time of the date T2, namely for example at a date T3. The activation occurs before the date T1, at a date T5.

The time interval from the date T5 to the date T, must be sufficient for the microprocessor 6 and the circuits that it controls to be available for the active state at the date T1. The temporal axis of the timing diagram 24 depicts a slow clock signal, for example with a cyclical ratio of half. In a preferred 8 variant, the signal of the circuit 12 is produced permanently. This is not a problem because the circuit 12 consumes little power. However, it is possible to consider cutting the power off during the active state. The temporal axis of the timing diagram 26 shows counting steps of the E periods of the slow clock signal The temporal axis of the timing diagram 26 shows a view of the fast clock signal giving an active state and during a standby state (between T3 and T4). Finally, on the temporal axis of the timing diagram 27, there are the different counting periods At the date T on the timing diagram 23, the mobile telephone 1 receives information 4 from the network 3. The date T, on the timing diagram 26, corresponds to an instant that is synchronous with the fast clock signal.

An event that occurs at an instant synchronous with the fast clock signals an event that occurs during an edge of this fast clock signal. The information elements 4 can be used to find a value of a difference delta between the known date To and the subsequent date T1. Between the date T and the date To, the mobile telephone 1 is active. During this time interval, the timing diagram 27 shows a first end-of-count concerning a calibration of the slow clock signal, present on the timing diagram 24, and the fast clock signal. With the microprocessor 6, the number N is thus obtained.

At a date To, there begins the phase of the counting of the m periods of a fast clock signal between this date To and a first edge 28 of the slow clock signal. A start-of-count operation, namely the date To, is synchronous with the fast clock signal. An end-of-count of m occurs at a date T2 at a first edge 28 of the slow clock signal, the date T2 being synchronous with the slow clock signal. A counting of the E periods of the slow clock signal can therefore begin. At this counting instant, the different elements of the mobile telephone 1 are still powered by the source of potential 13. This especially enables the microprocessor 6 to compute the remainder r from the value of m and place this value of r in the data memory 9. Thus, the placing of the mobile telephone 1 in an effective standby state is shifted for example to a date T3 with respect to the beginning of counting of the E periods.

At a date T3 subsequent to the date T2, the ASIC 15 controls the switch device 18 in order to have an open circuit between the power supply input 19 and the output 21. In a preferred example, this event at the date T3 occurs during a first period of the E periods of the slow clock signal. This 9 event could equally well have occurred at a subsequent date. After the date T3, the ASIC 15 counts up to the arrival of a date T4 that is synchronous with respect to the slow clock signal of the timing diagram 24. At this date T4, the ASIC 15 has counted E - k slow signal periods. In a preferred example, k is equal to 2, but k could have very well taken any value between 0 and E.

Starting from the date T4, the ASIC 15 reactivates the circuit 11 giving the fast clock signal. The ASIC 15 continues to count until it reaches the value E. This occurs at a date T.5 synchronous with the slow clock signal.

Thus, the k clock periods of the slow clock signal between the date T4 and the date T5 make it possible leave the circuit 11 sufficient time for the fast clock signal given by it to be stable. This corresponds to a build-up time. This circuit 11 has started again synchronously with the slow clock signal. Then, it may be assumed that, when the date T5 is reached, the two clock signals are synchronous or at most that they are synchronous to within one period of the fast clock signal. Starting form the date T5, the mobile telephone 1 is activated but does not receive any message from the network. Indeed, the date T5 and the date T1 are not the same. Hence, the mobile telephone 1 is not synchronous with the network 3. To arrive at the date T1, the microprocessor 6 counts r periods of the fast clock signal, an end-of- count corresponding to the date T1. The mobile telephone 1 then goes into listening mode at the planned date T1.

The edge 28 of the slow clock signal that occurs at the date T2 is, in a preferred example, a leading edge of the slow clock signal. It is equally possible to use trailing edges of the slow clock signal as a reference.

To improve the precision with which the slow clock signal is calibrated by the fast clock signal, this fast clock signal is replaced in one variant by a double clock signal with a frequency higher than that of the fast clock signal.

A double clock signal is produced from the fast clock signal. There are many alternative methods of obtaining the double clock signal. In one of these possible alternative methods, a replica of the fast clock signal is also used but it is time- lagged by one half-period with respect to the fast clock signal.

In this variant, clock signals with a cyclical ratio of less than half are considered. This means that a ratio of a duration between two consecutive edges to a duration of one period of a clock signal is less than half. In this case, to obtain the double clock signal, it is enough for example, especially by means of a logic circuit fulfilling this function, to add the fast clock signal and the replica of the fast clock signal. Consequently, the double clock signal makes it possible, in one and the same time interval, to obtain twice as many leading edges as the fast clock signal. Thus, an increase is obtained in the precision of calibration of the slow clock signal by the double clock signal. As an alternative, the double clock signal is obtained by reversing a fast clock signal with a cyclical ratio of half. In this variant, it is possible to obtain an even greater precision, by furthermore lagging each of the two signals by a quarter period. The precision is then multiplied by four.

Since the synchronization with the network is achieved with a precision of within plus or minus one period of the fast clock signal, these alternatives improve the precision of the synchronization accordingly.

Furthermore, with a double clock signal, it is no longer a number N of periods that is counted but a number N' of periods of the double clock signal contained in a period of the slow clock signal. In this alternative, the replica of the fast clock signal is lagged preferably by a half-period with respect to the fast clock signal.

In a preferred example, the fast clock signal has a frequency of 13 MHz. The slow clock signal for its part has a frequency of 32 kHz. A clock period equivalent to the fast clock signal is of the order of 77 ns. A precision of one synchronization between the network 3 and the mobile telephone 1 must be smaller than 1 microsecond. In the invention, the value is about 77 ns and even of the order of 38.5 ns if the variant with a double clock signal is used.

Figure 3 gives a view, in the form of an algorithm, of a possible sequencing of the different steps of the method of the invention. In one step 29, the network 3 sends pieces of information to the mobile telephone 1 on the difference delta between the known date To and the subsequent date T1.

During a step 30, the microprocessor 6 calibrates the slow clock signal from the fast clock signal and obtains a value N that it stores in the data memory 9.

Once this calibration is done, the program 7, in a step 31, commands the microprocessor 6 so that it deduces a standby duration E therefrom. This computation makes it possible to obtain the number M with the integer part E and the remainder D. One problem is that, to keep a synchronous set, it is 11 necessary that a start of counting of the E periods should be done synchronously with the fast clock signal. This synchronization is done in a step 32.

In this step 32, a phase shift m is measured between the date To and a first leading edge of the slow clock signal after the date To. The phase shift m is measured in number of periods of the fast clock signal. At the end of this counting step, the operation stores a value pertaining to a remainder between this value m and the value of D expressed in number of fast clock signal periods. At the same time, a step 33 starts in which the mobile telephone 1 is on standby, namely a step in which the circuit 11 giving the fast clock signal is deactivated. Before the end of the counting of the E periods of the slow clock signal, a test step 34 is implemented by the ASIC in order to ascertain that an activation date has or has not been reached.

Should the response to this test be positive, the method carries out a step 35 in which the ASIC 15 reactivates the circuit 11 giving the fast clock signal and then, at the end of the counting of the E periods, the microprocessor 6 counts the r periods of the fast clock signal, a value of which has been stored in a data memory 9 during the step 32. Should there be a negative response at the test step 34, the method of the invention leaves the mobile telephone I in the standby step 33 and continues to count. After the step 35, the mobile telephone I is again at the date T, envisaged especially during the step 29.

In this case, during a step 36, the mobile telephone 1 is active, namely it can exchange information with the network 3.

In a step 37, the mobile telephone I is again in a test step in which it is ascertained that the network is sending information on a change in a value of the difference delta. In the case of a change, the network sends this new value and the method is again in the step 29. In the event of a negative response to this test, the method only calibrates the slow clock signal again on the basis of the first fast clock signal and is thus again in the step 30.

In one embodiment of the invention, it is assumed that the ASIC 15 and the microprocessor 6 measure the number of periods of a fast clock signal or the slow clock signal using counting means. However, it is quite possible to envisage countdown means without thereby causing any special problem.

12

Claims

1. Method of standby operation in a mobile telephone characterized in that:

- a mobile telephone is connected by an antenna to a mobile telephony network, - the mobile telephone is fitted out with a trans m i ssi on-recepti on radioelectrical device connected to the antenna, a first circuit giving a fast clock signal, a second circuit giving a slow clock signal, a microprocessor connected by a bus to a data memory and a potential source powering these different elements, - information elements from the network are received on the antenna of the mobile telephone indicating a difference delta between a known date To and a subsequent date T1, - a number N of periods of the fast clock signal contained in a period of the slow clock signal is counted, - a value of the duration delta is divided by the number N and a number M is obtained, M consisting of an integer part E and a decimal part D, - rn periods are counted with the fast clock signal, with rn < n where n is equal to D x N, between the date To and a first edge of the slow clock signal after the date To, - a value r of a remainder of a subtraction between m and in is stored in the data memory of the mobile telephone, - the mobile telephone is placed in a standby state, - E periods are counted with the slow clock signal, - r periods are counted with a fast clock signal, - the mobile telephone is placed in an active state.

2. Method according to claim 1 characterized in that - the first circuit giving the fast clock signal is connected to the microprocessor, the second circuit giving a slow clock signal is connected to an ASIC circuit.

3. Method according to claim 2 characterized in that - a switching device is interposed between the potential source and 13 the first circuit, the microprocessor and the radioelectric transmission reception device, and the switch device is controlled by the ASIC circuit.

4. Method according to claim 3 characterized in that - an opening of the switch device is activated for a duration at least equal to E periods of the slow clock signal.

5. Method according to any of the claims 1 to 4 characterized in that the rn periods between the date To and a first leading edge of the slow clock signal are counted.

6. Method according to any of the claims I to 5 characterized in that - a double clock signal is produced from the fast clock signal and also a replica of the fast clock signal which however is time-lagged with respect to this fast clock signal, - a count is taken of a number N' of periods of the double clock signal contained in a period of the slow clock signal instead of the number N.

7. Method according to claim 6 characterized in that - the replica of the fast clock signal is shifted by a quarter period with respect to the fast clock signal.

8. Method according to any of the claims 1 to 7 characterized in that the fast clock signal is at a frequency of 13 MHz, - the slow clock signal is at a frequency of 32 kHz.

9. Method of standby operation in a mobile telephone substantially as hereinbefore described with reference to the drawings.