GB2342799A - Predistortion adjustment method for a digital TV transmitter power amplifier - Google Patents

Predistortion adjustment method for a digital TV transmitter power amplifier Download PDF

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Publication number
GB2342799A
GB2342799A GB9816972A GB9816972A GB2342799A GB 2342799 A GB2342799 A GB 2342799A GB 9816972 A GB9816972 A GB 9816972A GB 9816972 A GB9816972 A GB 9816972A GB 2342799 A GB2342799 A GB 2342799A
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United Kingdom
Prior art keywords
signal
transmitter
test signal
test
digital
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Withdrawn
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GB9816972A
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GB9816972D0 (en
Inventor
David Dassonville
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Harris Corp
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Harris Corp
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Publication date
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Priority to GB9816972A priority Critical patent/GB2342799A/en
Publication of GB9816972D0 publication Critical patent/GB9816972D0/en
Publication of GB2342799A publication Critical patent/GB2342799A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/38Transmitter circuitry for the transmission of television signals according to analogue transmission standards
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00Diagnosis, testing or measuring for television systems or their details

Abstract

A digital signal input 1 to a digital power amplifier is periodically replaced 9 by a short digital or analogue test signal 8. The test waveform may be a ramp or a staircase. The output of the amplifier is synchronously demodulated 11 to provide in-phase and quadrature waveforms of the amplified test signal to monitors 12 and 13. This direct time-domain visual indication of the transfer characteristics of the transmitter allows an operator to adjust the settings of the predistorter while viewing the monitors 12 and 13. The test signal duty cycle is less than 4% and is typically 0.5%. The testing is performed off-line.

Description

"Apparatus and method for testing the linearity of a digital transmitter" THIS INVENTION relates to an apparatus and method for testing the linearity of a digital transmitter and more particularly of testing the linearity of a digital signal transmitter to provide an indication of the adjustments needed to precorrection circuits to achieve linear transfer characteristics of the digital signal.
Figure 1 of the accompanying drawings illustrates a digital television transmitter comprising a digital signal source 1, an up-converter 2, a linearity corrector 3, a power amplifier 4 and a load 6 comprising an antenna. A probe 5 for viewing the spectrum of an amplified digital signal is also provided. A digital input signal from the digital signal source 1 at base band frequency is passed through the up-converter 2 to convert to the final transmission frequency. The output of the up-converter 2 is fed to the linearity corrector 3 which comprises a non-linear circuit for applying a pre-correction to the transfer characteristics of the digital signal. The linearity corrector 3 is sometimes termed a pre-correction circuit or a pre-distoition circuit. The nonlinear characteristics which are applied to the digital signal by the linearity corrector 3 can be adjusted by an operator. The pre-corrected digital signal is fed to the power amplifier 4 to amplify the signal to the required power level for transmission. One of the effects of the power amplifier 4 is to generate an unwanted distortion of the digital signal. However, the non-linear transfer characteristics of the linearity corrector 3 are intended to be the exact inverse of the transfer characteristic of the power amplifier which causes the unwanted distortion. Thus, it is intended that the non-linearity of the linearity corrector 3 and that of the power amplifier 4 cancel one another out so that the resultant transmitted signal exhibits overall linear transfer characteristics.
As a result of the non-linearity of the transmitted digital signal, the spectrum of the output is de-graded. This output can be observed by an operator using a spectrum analyser 7 connected to the output of the power amplifier by the output probe 5. The operator can adjust the correction settings of the linear corrector 3 to minimise the degradation of the spectrum.
However, the display of the spectrum analyser 7 is not sufficient in itself to tell the operator how to adjust the correction settings of the linearity corrector 3.
The operator has to go through a trial and error process of modifying the correction settings and then checking whether the spectrum is less degraded, modifying the correction settings again, re-checking the spectrum and so on.
These steps are reiterated until an acceptable level of degradation of the spectrum is achieved.
This method of adjusting the correction settings of the linearity corrector 3 is awkward and time consuming and does not provide any actual indication to the operator of the transfer characteristics of the transmitter.
It is an object of the present invention to provide an apparatus and method of testing the linearity of a digital signal transmitter to provide an indication of the adjustments needed to pre-conection circuits to achieve linear amplification of a digital signal.
The present invention seeks to provide: greater ease of adjustment of the correction settings ; a straightforward adjustment procedure; a faster adjustment procedure than the above described traditional method; the ability to monitor the transfer characteristics of the transmitter during a test of the transmitter transfer characteristics; and the ability to test the transmitter with a test signal which has statistical properties which are quasi-identical to the statistical properties of a non-test signal.
Accordingly, one aspect of the present invention provides an apparatus for testing the linearity of a digital signal transmitter comprising: a digital signal source for producing a digital input signal; a test signal source for producing a test signal; switching means to replace a portion of the digital signal with the test signal; means to sample an output signal from a transmitter, the output signal incorporating the test signal as modified by the transmitter; and means to provide time domain information on the transfer characteristic of the transmitter based on the modified test signal.
A further aspect of the present invention provides a digital signal transmitter in combination with an apparatus for testing the linearity thereof.
Another aspect of the present invention provides a method of testing the linearity of a digital signal transmitter comprising: generating a digital input signal; generating a test signal; replacing a portion of the digital signal with the test signal; sampling an output signal from a transmitter, the output signal incorporating the test signal as modified by the transmitter; and providing time domain information on the transfer characteristic of the transmitter based on the modified test signal.
A further aspect of the present invention provides a test apparatus for measuring the linearity of a radio frequency transmitter, a signal input circuit for providing input signals to the transmitter including a communication signal and a pulse type test signal that is selectively inserted for testing the linearity of the transmitter, and a monitor circuit for monitoring the output of the transmitter during the presence of the test signal for providing an indication of the linearity of operation of the transmitter.
In order that the present invention may be more readily understood, embodiments thereof will now be described, by way of example, with reference to the accompanying drawings, in which: FIGURE 1 is a block diagram of a traditional means for testing the linearity of the transfer characteristics of a digital transmitter; and FIGURE 2 is a block diagram of an apparatus embodying the present invention for testing the linearity of the transfer characteristics of a digital transmitter.
The description of the present invention includes reference to precorrection circuits which are used to adjust the transfer characteristics of a transmitter. Such pre-correction circuits are well known in the art and include pre-correction circuits for adjusting the transfer characteristics of both phase and amplitude components of a signal.
The term"digital signal"refers to an analogue signal onto which digital information has been encoded, usually by some form of modulation. Thus, the components of the circuitry described herein are analogue components. The system can operate at either base band or IF, with appropriate up-converting and down-converting as necessary.
An apparatus embodying the present invention is shown in Figure 2 and comprises the same circuit elements of a digital transmitter as described in connection with Figure 1, notably a digital signal source 1, an up-converter 2, a linearity corrector 3, a power amplifier 4 and a load 6 comprising an antenna. A probe 5 for viewing the spectrum of an amplified digital signal is also provided. In operation, an input signal from a signal source at base band frequency is passed through the up-converter 2 to convert to the final transmission frequency. The output of the up-converter 2 is fed to the linearity corrector 3 which comprises a non-linear circuit for applying a pre-correction to the transfer characteristics of the digital signal. The linearity corrector 3 is sometimes termed a pre-correction circuit or a pre-distoition circuit. The nonlinear characteristics which are applied to the input signal by the linearity corrector 3 can be adjusted by an operator. The pre-corrected digital signal is fed to the power amplifier 4 to amplify the signal to the required power level for transmission.
In addition to the digital signal source 1 which provides the input digital signal, the circuit is also provided with an analogue signal source 8. The outputs of the digital signal source 1 and the analogue signal source 8 are connecte to a signal switch 9. The signal switch 9 is operable to output either the digital signal or the analogue signal from their respective sources independence of a logic signal received from a switch control circuit 10. For example, if the logic input to the signal switch 9 from the switch control 10 is 1, then the output from the signal switch 9 is the digital signal from the digital signal source 1. Alternatively, if the logic input from the switch control 10 is 0, then the output from the signal switch 9 is the analogue signal from the analogue signal source 8.
The switch control 10 generates the logic input 1 for most of the time such that the digital signal is usually being output from the signal switch 9. However, the switch control 10 also generates a periodic pulse of logic input 0 for a very short time. The output of the signal switch 9 is therefore equal to the digital signal for most of the time and equal to the analogue signal, periodically, for a very short time period. The time for which the analogue signal is "inserted"by the signal switch 9 is short enough so that the statistical properties of the output signal are quasi-identical to those of the digital signal.
By adopting this arrangement, the transfer characteristics of the transmitter are not affected by the short time period insertions of the analogue signal.
For example, in one embodiment of the invention, the analogue signal has a duration of 120 microseconds for every 20 milliseconds of operation (a duty cycle of 0.6%). The requirement that the amount of time for which the analogue signal is inserted in the digital signal can be judged by comparing the realm over which the amplifier 4 operates during normal amplification of the digital signal compared to its realm of operation when amplifying the digital signal inserted with the analogue signal. Thus, one can look at the thermal or power draw of the amplifier 4 to see whether the insertion of the analogue signal has a substantial effect thereon.
It has been found that a 0.5% duty cycle is usually sufficient and that duty cycles in the region of 1 to 2% also provide good results although, at these higher levels of duty cycle, the corruption of the digital signal is increased and the operation of the amplifier 4 changes to respond to the different analogue input signal. A duty cycle of about 4% is the maximum that one would usually want to use. Duty cycles greater than this percentage tend to corrupt the signal stream so as to make any testing less useful. Clearly, it should be appreciated that the precise limit for the duty cycle varies from system to system in accordance with the characteristics of the amplifier 4 being tested, the input digital signal and the input analogue signal.
One aspect to bear in mind when selecting the duty cycle for the test signal is that the test signal should not cause a large change in the temperature of the transistors in the power amplifier 4 so that there are no resultant changes in the correction signal applied to the digital signal.
The signal from the signal switch 9 therefore comprises a flow of digital signal interrupted by brief bursts of the analogue signal. The analogue signal comprises a test signal which preferably has a spectral similarity to the digital signal. A ramp signal, specifically a linear ramp signal, is an easy to generate accurate analogue signal which can be used as the test signal. The test signal should preferably go from +100% modulation to-100% modulation, i. e. the signal goes through the zero carrier. The fact that the test signal goes through zero carrier is more important than the extent (+/-100%) of the signal.
The slope of the ramps should be kept within the bandwidth of the system. Thus, a ramp which is too fast represents a signal not within the bandwidth of the system and is of little use. The test signal should also have the same characteristics as the digital signal to the greatest possible extent and thus, the ramp should be adjusted accordingly. An analogue test signal having two lines (ramps) within a 120 microsecond switching period was successfully used.
The output signal from the power amplifier 4 is obtained by an RF sample probe 5 or any other conventional means for sampling the output. The output signal is down-converted through a conventional down-converter (not shown) using a local oscillator set to the centre frequency of the channel on which the RF signal was transmitted. In one embodiment, the local oscillator for the channel in the down-converter can be a copy of the same signal as was used for the up-conversion of the input signal. The output can be fed to a spectrum analyser 7 to measure the performance of the transmitter in the frequency domain as previously described in relation to the conventional technique. However, the output signal is also fed to a synchronous demodulator 11 to provide an in-phase output and a quadrature output. These outputs can, respectively, be fed to waveform monitors 12,13 or other indicator means so as to give time domain information on the linearity of the transmitter transfer characteristics. The time domain information is derived from the analogue test signal only. The digital signal does not contribute substantially to this information. This direct visual indication of the transfer characteristics of the transmitter, in the time domain, allows the operator to adjust the correction settings for the linearity corrector whilst viewing the waveform monitors, the operator being aware of what form of adjustment is necessary to the correction settings of the linearity corrector 3, the time domain information acting as feedback to the operator when adjusting the correction settings. The correction settings for the linearity corrector 3 are adjusted in a conventional manner.
Testing of the linearity of the transfer characteristics of the output signals for a transmitter are carried out at regular maintenance intervals.
It should be appreciated that the present invention is not limited to the arrangement shown in Figure 2 and could be used in other digital transmitters with appropriate adjustments to the circuitry.
The invention can operate at either base band or IF, with appropriate upconverting and down-converting as necessary. Thus, the up-converter may upconvert from base band to IF and up-convert from IF to RF (if the digital signal source is providing a base band signal) or the"up-converter"may convert from IF to RF only (if the digital signal source is providing an IF signal). The"test signal source"will provide a signal in the same form (base band or IF) as being supplied by the digital signal source.
It should be appreciated that the apparatus and method embodying the present invention requires testing of the transmitter to be done whilst the transmitter is off-line. This is because the testing process, i. e. the insertion of the analogue signal in the digital signal, substitutes an analogue signal for a portion of the digital signal thereby corrupting the output signal. The testing cannot, therefore, be done on-line.
The digital signal source can be either an on-line signal (i. e. real data), with the understanding that the on-line signal will not be used later, or a specially generated digital signal could be used. If a special digital signal is used, then this signal should be generated with the same characteristics (bandwidth, power, spectral qualities) as a real signal otherwise the effects of the amplifier on a real signal would not be tested. In most cases, it is simply easier to use a real signal instead of a specially generated digital signal since the real signal is what will be used when the transmitter is on-line.
The analogue test signal could be a staircase signal instead of a ramp signal. In any event, the test signal should be a linear signal. If a staircase signal is used, each of the steps of the staircase signal should have the same height.
The analogue test signal could be a digital test signal which has been transformed to its analogue equivalent in the same manner in which the digital signal source provides a digital signal encoded on an analogue carrier signal.
It would also be possible for the test signal and the digital signal from the digital signal source to both be digital. In such an embodiment, the signal switch circuitry would be replaced by a two-way multiplexer and a digital to analogue converter. The multiplexer would digitally mix the digital signal (the on-line signal) with a digital test signal and then form the analogue equivalent thereof through the digital to analogue converter. However, the use of a digital signal and an analogue test signal is preferred.

Claims (33)

  1. CLAIMS: 1. An apparatus for testing the linearity of a digital signal transmitter comprising: a digital signal source for producing a digital input signal; a test signal source for producing a test signal ; switching means to replace a portion of the digital signal with the test signal; means to sample an output signal from a transmitter, the output signal incorporating the test signal as modified by the transmitter; and means to provide time domain information on the transfer characteristic of the transmitter based on the modified test signal.
  2. 2. An apparatus according to Claim 1, wherein the test signal source is an analogue signal source which produces an analogue test signal.
  3. 3. An apparatus according to Claim 2, wherein the analogue test signal is a ramp signal.
  4. 4. An apparatus according to Claim 2, wherein the analogue test signal is a staircase signal.
  5. 5. An apparatus according to any preceding claim, wherein control means are provided to control the duration and period of the test signal to establish a duty cycle of the test signal with respect to the digital signal.
  6. 6. An apparatus according to Claim 5, wherein the duty cycle of the test signal with respect to the digital signal is less than about 4%.
  7. 7. An apparatus according to Claim 6, wherein the duty cycle is in the region of 0.1 to 4%.
  8. 8. An apparatus according to Claim 4 or 5, wherein the duty cycle is in the region of 0.5%.
  9. 9. An apparatus according to any preceding claim, wherein the sample means comprises an output probe to sample the output of an amplifier of the transmitter, including the modified test signal.
  10. 10. An apparatus according to any preceding claim, wherein a demodulator is provided to demodulate the modified test signal to provide the time domain information on the transfer characteristic of the transmitter.
  11. 11. An apparatus according to any preceding claim, wherein indicator means are provided to display the time domain information.
  12. 12. An apparatus according to Claim 11, wherein the indicator means comprises a waveform monitor.
  13. 13. An apparatus according to Claim 1, wherein the test signal source is a digital signal source in combination with a digital to analogue converter to output an analogue test signal.
  14. 14. An apparatus according to Claim 1, wherein the test signal source and the digital signal source comprise a single digital signal source and the switching means comprises a multiplexer having first and second outputs comprising the digital signal, the second output being fed to a digital to analogue converter to produce an analogue test signal.
  15. 15. A digital signal transmitter in combination with an apparatus according to any preceding claim.
  16. 16. A digital signal transmitter having means for testing the linearity thereof, the test means comprising: a digital signal source for producing a digital input signal; a test signal source for producing a test signal; switching means to replace a portion of the digital signal with the test signal; means to sample an output signal from the transmitter, the output signal incorporating the test signal as modified by the transmitter; and means to provide time domain information on the transfer characteristic of the transmitter based on the modified test signal.
  17. 17. A method of testing the linearity of a digital signal transmitter comprising: generating a digital input signal; generating a test signal; replacing a portion of the digital signal with the test signal; sampling an output signal from a transmitter, the output signal incorporating the test signal as modified by the transmitter; and providing time domain information on the transfer characteristic of the transmitter based on the modified test signal.
  18. 18. A method according to Claim 17 comprising the further step of controlling the duration and period of the test signal to establish a duty cycle of the test signal with respect to the digital signal.
  19. 19. A method according to Claim 17 or 18 comprising the further step of providing a display of the time domain information.
  20. 20. A method according to any one of Claims 17 to 19 comprising the steps of generating the test signal and the digital signal from a single digital signal source and providing first and second outputs comprising the digital signal, the second output signal being fed to a digital to analogue converter to generate an analogue test signal from the second output, the test signal replacing a portion of the digital signal from the first output.
  21. 21. A method according to any one of Claims 17 to 20, wherein the test signal goes through zero carrier.
  22. 22. A method according to any one of Claims 17 to 21, wherein the testing of the transmitter is carried out whilst the transmitter is off line.
  23. 23. Test apparatus for measuring the linearity of a radio frequency transmitter, a signal input circuit for providing input signals to the transmitter including a communication signal and a pulse type test signal that is selectively inserted for testing the linearity of the transmitter, and a monitor circuit for monitoring the output of the transmitter during the presence of the test signal for providing an indication of the linearity of operation of the transmitter.
  24. 24. Test apparatus as defined in Claim 23, wherein the signal input includes a switching circuit wherein the communication signals are applied to the transmitter except during the presence of the test signal.
  25. 25. Test apparatus as defined in Claim 23 or 24, wherein the duration of the test signal is short enough so that the operating properties of the transmitter do not significantly change from operating properties exhibited while transmitting the communication signal.
  26. 26. Test apparatus as defined in any one of Claims 23 to 25, wherein the duration of the test signal is short enough so that the transfer characteristics of the transmitter while transmitting the communication signal are not affected by the test signal.
  27. 27. Test apparatus as defined in any one of Claims 23 to 26, wherein the duration of the test signal has a duty cycle relative to the communication signal no greater than in the order of 4%.
  28. 28. Test apparatus as defined in any one of Claims 23 to 27, the test signal is in the form of a linear ramp causing the transmitter to exhibit positive and negative modulation about a zero carrier level.
  29. 29. Test apparatus as defined in any one of Claims 23 to 28, wherein the transmitter includes an adjustable linearity correction circuit, and the indication output of the monitor circuit is adapted to be used for adjusting the linearity correction circuit.
  30. 30. An apparatus substantially as hereinbefore described with reference to and as shown in Figure 2.
  31. 31. A method substantially as hereinbefore described with reference to and as shown in Figure 2.
  32. 32. A test apparatus substantially as hereinbefore described with reference to and as shown in Figure 2.
  33. 33. Any novel feature or combination of features disclosed herein.
GB9816972A 1998-08-04 1998-08-04 Predistortion adjustment method for a digital TV transmitter power amplifier Withdrawn GB2342799A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9816972A GB2342799A (en) 1998-08-04 1998-08-04 Predistortion adjustment method for a digital TV transmitter power amplifier

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Application Number Priority Date Filing Date Title
GB9816972A GB2342799A (en) 1998-08-04 1998-08-04 Predistortion adjustment method for a digital TV transmitter power amplifier

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GB9816972D0 GB9816972D0 (en) 1998-09-30
GB2342799A true GB2342799A (en) 2000-04-19

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2388983A (en) * 2002-05-24 2003-11-26 Wireless Systems Int Ltd Predistortion control

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381108A (en) * 1992-11-16 1995-01-10 Linear Modulation Technology Limited Automatic calibration of the quadrature balance within a cartesian amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381108A (en) * 1992-11-16 1995-01-10 Linear Modulation Technology Limited Automatic calibration of the quadrature balance within a cartesian amplifier

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2388983A (en) * 2002-05-24 2003-11-26 Wireless Systems Int Ltd Predistortion control
GB2388983B (en) * 2002-05-24 2006-06-28 Wireless Systems Int Ltd Predistortion Control
US7279972B2 (en) 2002-05-24 2007-10-09 Andrew Corporation Predistortion control apparatus

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Publication number Publication date
GB9816972D0 (en) 1998-09-30

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