GB2340268A

GB2340268A - Monitoring data processing

Info

Publication number: GB2340268A
Application number: GB9816912A
Authority: GB
Inventors: Waldemar Friedrich; Graeme Wintle; Robert George Wicker
Original assignee: Nokia Telecommunications Oy
Current assignee: Nokia Oyj
Priority date: 1998-08-05
Filing date: 1998-08-05
Publication date: 2000-02-16
Also published as: WO2000008784A3; GB9816912D0; AU5183299A; WO2000008784A2

Description

2340268 TITLE: IMPROVL74ENTS IN AND RELATING TO DATA PROCESSING APPARATUS

Field of the Invention

This invention relates to data processing apparatus, and in particular to a node for a digital telecommunications system and to means for monitoring the performance of a central processing unit of such a node.

Background to the Invention

A node of a digital telecommunications system has a central processor unit which has to perform a large number of functions. Most of those functions are constituted by a plurality of individual processes. Examples of those functions are the configuring of the node to accept a synchronisation signal from another part of the system, the setting up of cross connections between transmission signals, the configuration of interfaces for the node and the downloading of control software. Typically, during a multi process function, the process being performed by the node might change three hundred times each second.

The various processes are performed under the control of software which has to be such as to enable the functions to be performed within a predetermined time limit. If the software is incapable of achieving that objective, it becomes necessary to determine why this is so. For example, the central processing unit may be taking an inordinate amount of time to perform one of the processes, giving rise to a "bottle-neck".

If the performance of the central processing unit is to be monitored, then this activity desirably has a minimal impact on the operation of the central processing unit.

2 Known monitoring methods require that the central processing unit writes into the memory of the node, details of each process and the times during which the process is being performed. As a result, the node has to have a memory of a considerably larger capacity than would otherwise be required, thus increasing production costs of the node. In addition, the time data is obtained from the timer provided by the node.

The timer may need to operate at a frequency which provides a resolution of approximately 10 ms in order to enable the time spent on the processes to be measured with sufficient accuracy. However, the normal operation of the node might be possible with a slower, and hence cheaper, timer.

Thus, the need for a timer suitable for monitoring the performance of the central processing unit may also increase the production costs of the node.

In addition, the results of the monitoring process are conventionally presented in the form of a chart in which the individual processes are set out on one axis, and the other axis is used to represent time. At each point along the time axis, the chart is shaded in at a position which indicates the process being performed at that time. The resultant chart therefore contains a series of bars of differing widths arranged in rows, each corresponding to a respective process. It has been found that this sort of chart can be very difficult to interpret to determine how the software of the central processing unit can be improved.

The present invention aims to enable the performance of a central processing unit of data processing apparatus to be monitored, whilst having relatively little impact on the design of the apparatus.

Summary of the Invention

3 According to a first aspect of the invention, there is provided data processing apparatus comprising a central processing unit for performing a plurality of processes, a memory connected to the central processing unit and to monitoring means for determining which processes are being performed during which periods of time, wherein the central processing unit is operable to swap one process for another, and, for each swap, to write into the memory an identification of at least one 'of those two processes at a time related to the respective time of occurrence of the swap, the monitoring means being operable to monitor the memory and to store each identification with a timestamp indicative of the time at which the identification was written into the memory, and hence of an associated time of occurrence of the swap.

Thus, the timestamps are generated by the monitoring means, so that the memory for the central processing unit does not need to store timing information relating to the process swaps.

For the purposes of this specification, the idle time of the central processing unit may also constitute a process.

Preferably, the central processing unit is operable to write each identification into the memory at a fixed time before the swap at which the identified process becomes that being performed by the central processing unit. Thus, the monitoring means can monitor the memory and, as soon as a new process identification is entered, calculate the actual time at which the process will begin and apply a timestamp accordingly. Alternatively, the timestamp can be representative of the time at which the identification was written into the memory, the actual time of commencement of the process being identified during subsequent processing of the data obtained by the monitoring means.

Preferably, the central processing unit is so arranged so as to write all the process identifications into the same location 4 of the memory, the previous identification being overwritten at each time related to a respective swap. This avoids the need for the data processing apparatus to be provided with an expanded memory, and also helps to minimise the effect of the monitoring of the central processing unit on the perf ormance of the latter, since the process identifications can. be very rapidly written into the memory location.

Preferably, the memory location comprises a single address in the latter.

Preferably, the monitoring means has an input for a signal from the clock for the central processing unit. Alternatively, the monitoring means may include its own clock.

The monitoring means may be operable to generate an output signal to drive a display, such as an LED, to indicate when a selected process is being performed. Additionally or alternatively the data obtained by the monitoring means can be processed to provide a signal which causes a visual display unit (such as a cathode ray tube) to provide an indication of the length of time taken to perform a function requiring the performance of a plurality of processes, and the proportion of time taken to perform a given one of the processes.

Preferably, the monitoring means comprises calculating means for calculating the proportion of the central processing unit Is time spent on said given process during each of a succession of windows of time, wherein said output signal is such as to cause the display to provide a graphical representation, in which the windows of time are represented by one axis and the associated proportions of time are plotted on the other axis.

Preferably, for each window of time, the calculating means determines the respective proportion of that time spent on each of a plurality of processes, the output signal being such as to cause all of said proportions to be plotted on said other axis.

Preferably, for each window of time, the plots of the proportions of time for the processes being performed during that window are concatenated to give a bar which is sub-divided along its length in accordance with the proportion.-of time devoted to the individual tasks in that window.

It has been found that such a representation facilitates the analysis of the performance of the central processing unit, since an operator can determine information about the time taken to perform various processes from the width of associated features in the representation and the amount of processing power needed for each process during said time by the size of the zone attributable to that process.

According to a second aspect of the invention, the data processing apparatus forms part of a node of a telecommunications system.

According to a third aspect of the invention, there is provided a node for a telecommunications system, the node comprising a central processing unit for performing a plurality of processes and swapping one process for another at a respective time, and a memory, wherein, for each said swap, the central processing unit is operable to overwrite a given location of the memory with an identification of a given process at a time related to the time of occurrence of the swap corresponding to the commencement or the ending of the process.

Preferably, the central processing unit is operable to overwrite said location of the memory with an identification of each process a set time before the respective swap time at which that process becomes the process currently being performed by the central processing unit. Conveniently, the central processing unit is not operable to write into the memory information indicative of said swap time.

6 According to a further aspect of the invention, there is provided monitoring means for use with a node according to the previous aspect of the invention, the monitoring means being operable to read each said identification from said location of the memory and to store said identification with a timestamp indicative of the time at which the identification was "written into the memory and hence of an associated swap time.

The invention also lies in monitoring means for monitoring the performance of a central processing unit which is operable to perform a plurality of processes, the monitoring means comprising input means for receiving data identifying the processes and the times during which those processes were being performed and calculating means for calculating the proportion of the central processing unit's time spent performing a given process during each of a succession of windows of time and display means for providing a graphical representation in which the windows of time are plotted on one axis and the proportions on another axis.

Preferably, the calculating means is operable to determine, for each window of time, a respective proportion of that time spent on each of a plurality of processes, said proportions all being plotted on said other axis.

Preferably, the plots of the proportions of time for the respective processes are concatenated to give a bar which is sub-divided along its length in accordance with the proportion of time devoted to individual processes during that window of time.

Brief Description of the Drawings

The invention will now be described, by way of example only, with reference to the accompanying drawings in which:

Figure 1 is a simplified block hardware diagram of a node for 7 a telecommunications system and monitoring apparatus, both in accordance with the invention; Figure 2 comprises a pair of tables showing examples of files of information used in the analysis of the node; Figure 3 is a simplified diagram showing times at which various processes are performed by the central processing unit of the node; Figures 4 and 5 show one way in which the results of the monitoring of the performance of the central processing unit can be displayed; Figure 6 shows the results displayed as a bar chart; Figure 7 is a simplified diagram showing how the results can be displayed in accordance with an aspect of the present invention; and Figure 8 shows an example of a display provided by the apparatus.

Detailed Description

With reference to Figure 1, reference numeral 1 denotes apparatus which is identical to a node of a digital telecommunications system such as a synchronous add-drop multiplexer. The apparatus 1 is not part of the telecommunications system, but is used to test software for the actual nodes of the system. To that end, the apparatus I is connected to a monitoring device generally referenced 2.

The apparatus 1 comprises one central processing unit 4 which performs a number of processes (one at a time) under the control of software loaded into the apparatus 1. The apparatus 1 includes a random access memory 6 connected to the central 8 processing unit (CPU) 4 through a 16 bit bus 8. The software controlling the CPU 4 is so configured that the CPU 4 writes an identification of a given task into an address 10 in the memory 6 just before the CPU 4 stops performing its current process and begins to perform the identified process. If no processing is being performed by the CPU 4 process, identification representative of idle time is written into the memory 6.

The monitoring device 2 comprises a logic analyser 12 connected to a terminal 20 through which the analyser 12 can be configured, and its operation initiated.

The logic analyser 12 incorporates a clock (not shown) connected to a counter 14 which is incremented by each cycle of the clock. The signal produced by the clock also causes the logic analyser 12 to interrogate the address 10 of the memory 6 once per cycle of the signal. The logic analyser 12 includes a memory 11 for storing data obtained from the address 10 and the counter 14.

Each time the logic analyser 12 detects that a new process identification has been written into the address 10, it stores that identification in its memory 11 along with the time (registered by the counter 14) at which the identification was detected. In the present example, the identification is 32 bits long, but since the bus is only a 16 bit bus needs to be read as two code "words", a higher order word and a lower order word, which are written in sequence into the address 10. In this way, the logic analyser 12 builds up a trace file in its memory, as represented by the table 15 of Figure 2.

Referring to Figure 2, the left-hand column of the trace file table indicates whether the identification code in the adjacent two columns is a higher order or lower order word. The righthand column in Figure 3 indicates the time (read from the counter 14) at which each respective word was detected in the 9 address 10.

The logic analyser 12 includes a disc drive (not shown) which is operable to store the trace file once the latter has been compiled. This enables the trace file to be loaded into the random access memory of a personal computer 19 which. has a data processor 21 and is controllable via a terminal 23 (which includes a visual display unit).

The process identifications are in the form of machine code, and are not therefore readily intelligible to somebody wishing to analyse the performance of the CPU 4. Accordingly, the memory 17 includes a map file, an example of which is shown in the table 25, which correlates the programme identification codes, examples of which are listed in the second column, with descriptive terms (the third column) which can be relatively easily understood. The computer is also programmed with profile analysis software for processing and presenting the data obtained from the analyser 12.

Figure 3 illustrates, in a simplified form, one way in which the activities of the CPU 4 can be displayed on the terminal 23. In the scenario shown in Figure 3, the CPU 4 performs a function requiring two processes, Process A and Process B. The times at which the processes are being performed are indicated by bars such as bar 22 for Process A and bar 24 for Process B. Thus, initially, the CPU 4 performs the Process A until time tj when it swaps Process A for Process B until time t2 when the CPU 4 becomes idle as indicated by bar 26. Process A is then initiated or resumed at time t3 and the swap to Process B then occurs at time t, and this sequence is repeated.

However in reality, the CPU 4 will perform a far greater number of different processes which for a given function will be swapped far more times than are indicated in Figure 3, and as a result the representations such as are shown in Figures 4 and are obtained.

Figure 5 shows the results of the analysis of the CPU 4 over a period of just over 137 seconds. This is a relatively long period of time, and the resolution of the representa tion is such that a number of the processes, for example TnsF3P, are represented by relatively large solid bars and some of the other processes, for example TqsP, are shown as a series of much thinner bars which occur within the time period defined by the thick bars. In order more accurately to determine which process is occurring in a given time, it is therefore necessary to increase the time resolution of the representation by expanding the time axis, as has happened in Figure 4 in which the activities performed over a period of 175 milliseconds are shown. Additionally or alternatively, the profile analysis software in the computer 19 can be arranged to generate a bar chart such as is shown in Figure 6, which represents the portion of the time of the CPU 4 (over a period of 10 seconds) devoted to various specified tasks.

If the CPU 4 does not perform its function within a predetermined minimum time, the representations of the type shown in Figures 4 and 5 can help to determine why this is so. However, those representations can still be difficult to analyse since they do not provide an overview of the operation of the CPU 4 in the course of the entire function. A bar chart of the type shown in Figure 6 can provide useful indications of the demands on the CPU over longer periods of time, but is less effective at enabling an operator to spot when (and why) the CPU is not working efficiently.

However, the profile analysis software is also capable of causing the computer 19 to display the results in the way shown in Figure B. Figure 7 is a simplified diagram illustrating the way in which the representation of Figure 8 is generated.

Figure 7 has three parallel axes 28, 30 and 32 representative 11 of time. Figure 7 indicates three Processes, A-C, which can be carried out by the CPU, and the times during which each process are indicated by bars on a respective one of the axes. Thus, for example, the bar 34 indicates that the CPU initially performs Process C. Process B is then initiated as indicated by the bar 36, but is interrupted by Process A as indicated by bar 38. Process A is in turn interrupted by Process B at the time corresponding to the bar 40 and the CPU swaps processes back to Process A for the time indicated by the bar 42. The bars 34-42 all appear within a window of time 44.

The computer 19 calculates the respective total amount of time spent by the CPU on each of the Processes A-C and these totals can be displayed as proportions of the period of the window 44 as indicated by the graphical representation 46 in which time is represented by a horizontal axis and proportions are represented by the vertical axis. As can be seen, the representation of the portions of time attributable to each of the processes are concatenated so that the proportion of time attributable to Process A is represented by block 48, the proportion attributable to Process B by block 50 extending upwards from the top of block 48 and the proportion attributable to Process C by block 52 which is added to the top of block 50. Thus, the blocks 48, 50 and 52 define a bar divided along its length in accordance with proportions of time spent performing each of the Processes A-C during the window 44. This process is repeated for subsequent windows 54 and 56 to produce corresponding, contiguous bars 58 and 60.

Figure 8 shows an example of a representation which is obtained by this method for a much larger number of windows of time. In the representation, HDLC - TxRxP represents a hardware driver process in which the node transmits or receives configuration signals and checks the identities of neighbouring nodes. Netecc is a process for handling the protocol associated with the data packets constituting the signals and is indicated by the lower white zone. The position of the 12 representation identified on swapBackground corresponds to the idle time (itself treated as a process) of the CPU, the remaining two identified processes are background activities, whilst the upper white zone represents various non-relevant processes (from the point of view of the function under consideration). This representation provides an indication, not only of how long it takes to perform a given process, but also how much of a demand the process makes on the CPU. Thus, for example, the minima of the plots of a given process can provide an indication of the length of time taken to perform a function involving that process.

In Figure 8, the distance between the minima 62 and 64 of the zone representing the netecc process indicate the length of time taken to perform a function which involves that process, whilst the height of the peak 66 of the plot for that process above the corresponding point (ie the point corresponding to the same window of time) for the plot for the HDLC - TxRxP process indicates the maximum proportion of time spent performing the netecc process during that function.

It can be seen that, even during the periods when the netecc and HDLC TxRxP processes are using the maximum amount of available processing time (and hence power) of the CPU 4, there is still a significant amount of idle time of the CPU 4. If, however, the function of the CPU were to be overloaded when performing the function, this would be illustrated by a break in the zone representing idle time (caused, for example, by a peak of the zone for netecc extending up to and meeting the TPsSoftPollP zone).

13

Claims

1. Data processing apparatus comprising a central processing unit for performing a plurality of processest a memory connected to the central processing unit and to monitoring means for determining which processes are being performed during which periods of time, wherein the central processing unit is operable to swap one process for another, and, for each swap, to write into the memory an identification of at least one of the two respective processes at a time related to the time of occurrence of the respective swap time, the monitoring means being operable to monitor the memory and to store each identification with a timestamp indicative of the time at which the identification was written into the memory, and hence of an associated time of occurrence of the swap.

2. Apparatus according to claim 1, in which the central processing unit is operable to write each identification into the memory at a fixed time before the swap at which the identified process becomes that being performed by the central processor unit.

3. Apparatus according to either of the preceding claims, in which the processor is so arranged as to write all the process identifications into the same location of the memory, the previous identification being overwritten at each time related to a respective swap.

4. Apparatus according to claim 3, in which the identifications are written into a single memory address.

5. Apparatus according to any of the preceding claims, in which the monitoring means has an input for a signal from the clock of the central processing unit, is operable to interrogate the memory at a frequency corresponding to that of the clock signal and uses said signal to derive said 14 timestamps.

6. Apparatus according to any of claims 1 to 4, in which the monitoring means includes a timer for causing the monitoring means to interrogate the memory at regular intervals and for providing said timestamps.

7. Apparatus according to any of the preceding claims, in which the monitoring means is operable to generate an output signal to drive a display so as to provide a visual indication of the length of time taken to perform a function requiring the performance of a plurality of processes and the proportion(s) of that time taken to perf orm. a given one of the tasks.

8. Apparatus according to claim 7, in which the monitoring means comprises calculating means for calculating the proportion of the processing unit Is time on said given process during each of a successions of windows of time, wherein said output signal is such as to cause the display to provide a graphical representation, in which the windows of time are represented by one axis and the associated proportions of time are plotted on another axis.

9. Apparatus according to claim 8, in which, for each window of time, the calculating means determines the respective proportion of that time spent on each of a plurality of processes, the output signal being such as to cause all of said proportions to be plotted on said other axis.

10. Apparatus according to claim 9, in which, for each time window, the plots of the proportions of time for the tasks being performed during that window are concatenated so that the distances along said other axis attributable to the tasks being performed during that window are added together to give a bar which is sub-divided along its length in accordance with the proportion of time devoted to the individual tasks in that window.

11. A node of a telecommunications system having apparatus according to any of the preceding claims.

12. A node for a telecommunications system, the node comprising a central processing unit for performing a plurality of tasks, and to swap one task for another at the '' t ' ime of occurrence of a respective swap, and a memory, wherein, for each said swap, the central processing unit is operable'to overwrite a given location of the memory with an identification of a task at a time related to the respective time of occurrence.

13. A node according to claim 12, in which the central processing unit is operable to overwrite said location of the memory with an identification of each task a set time before the respective swap at which that task becomes the task currently being performed by the central processing unit.

14. A node according to claim 12 or claim 13, in which the central processing unit is not operable to write into the memory information identifying said times.

15. Monitoring means for use with a node according to any of claims 12 to 14, the monitoring means being operable to read each said identification from said location of the memory and to store said identification with a timestamp indicative of the time at which the identification was written into the memory and hence of an associated swap.

16. Monitoring means for monitoring the performance of a central processing unit operable to perform a plurality of tasks, the monitoring means comprising input means for receiving data identifying the tasks and the times during which those tasks were being performed, calculating means for calculating the proportion of the central processing unit's time spent performing a given task during each of a succession of windows of time and display means for providing a graphical representation, in which the windows of time are plotted on one axis and the proportions of time on another axis.

17. Apparatus according to claim 16, in which the calculating means is operable to determine, for each window of time, the respective proportion of that time taken spent on each of a plurality of processes, said proportions all being plotted on said other axis.

18. Apparatus according to claim 17, in which, for each window of time, the plots of the proportions of time for the respective processes are concatenated to give a bar which is sub-divided along its length in accordance with the proportion of time devoted to individual processes during that window of time.