GB2332999A

GB2332999A - Transmitting video data

Info

Publication number: GB2332999A
Application number: GB9727434A
Authority: GB
Inventors: Dong-Seek Park
Original assignee: Samsung Electronics Co Ltd
Current assignee: Samsung Electronics Co Ltd
Priority date: 1997-12-31
Filing date: 1997-12-31
Publication date: 1999-07-07
Anticipated expiration: 2017-12-31
Also published as: GB9727434D0; GB2332999B

Abstract

A device for transmitting video data, having improved error resilience, includes a temporary memory for storing N VLC (Variable Length Coding) data blocks b1-bn, Figure 3A and a standby memory for sequentially storing the N blocks. As fixed length blocks having different start points. Figure 3B. In an alternative embodiment each block is transferred to the standby memory at a bit rate such that the block fills a symbol position.

Description

METHOD AND DEVICE FOR TRANSMITTING VIDEO DATA IN RADIO COMMUNICATION SYSTEM The present invention relates to a radio communication system using a radio channel or a data channel having lower error resilience, and in particular, to a method and device for transmitting video data in a radio communication system, capable of making up for a shortcoming of a variable rate bit stream.

It is generally known that in case a radio communication system transmits data via a radio (or wireless) channel (in particular, at a transfer rate of over 64Kbps), a fixed rate bit stream has a lower bit error rate than that of a variable rate bit stream.

Figures 1A to 1D illustrate how bit streams having different lengths are converted into fixed rate bit streams having the same specified length S, as proposed by NTT Mobile Communication Network of Japan, on June, 1995.

Specifically, in case that N blocks bl-bn each having a difference length as shown in Figure 1A, the blocks (or symbols) b2 and b3 which are coded to be shorter than a specified bit rate length S are made up (or filled up) by blocks bl and bn-l which are coded to be longer than the specified bit rate length S, as shown in Figures 1B to 1D, so as to replace all the blocks bl-bn to be transmitted at the same bit rate S simultaneously. However, the conventional method takes a considerable time to perform variable length coding (VLC) for making all the blocks blbn have the same length S. Furthermore, a very long block such as the block bl of Figure 1A needs to be divided several times to fill the shorter symbols b2 and b3 as shown in Figures 1B and 1C. Therefore, the conventional method may take quite a long processing time.

It is an aim of embodiments of the present invention to provide a video data transmission method and device with reduced calculation time and complexity for a bit stream.

It is another aim of embodiments of the present invention to provide a video data transmission method and device with increased error resilience.

According to an aspect of the invention, there is provided a device for transmitting video data, comprising: a temporary memory for temporarily storing N VLC (Variable Length Coded) data blocks; a standby memory for sequentially storing the N blocks stored in said temporary memory using a bit rate which is shorter than a specified bit rate, prior to transmission of the block data; a bit counter for generating an address signal for sorting the data blocks into said temporary memory, and for generating an address signal for storing the VLC data blocks into said standby memory with different start points; and a controller for controlling said bit counter by checking a state of the input block data, reading the block data from the temporary memory using the bit rate shorter than the specified bit rate S1 and writing the data read from said temporary memory to said standby memory.

According to a second aspect of the invention, there is provided a method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory; if a current symbol is a last symbol, sequentially reading the symbol data stored in the temporary memory to check whether the respective symbols are longer or shorter than a specified bit rate; if a selected symbol is longer than said specified bit rate, transferring the data as much as said specified bit rate to a standby memory; and reading next symbol data as much as said specified bit rate to transfer it to said standby memory.

According to a third aspect of the invention, there is provided a method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory; and transferring symbol data of said N symbols from said temporary memory to a standby memory, said standby memory having a number of symbol positions, each of which has a specified bit rate, wherein if a current symbol for transfer between the temporary memory and the standby memory has insufficient symbol data to fill a current symbol position in the standby memory then, following transfer of said current symbol, symbol data from a next symbol or symbols is sequentially transferred to said current position until said current position is full, symbol data remaining to be transferred from said temporary memory being thereafter sequentially transferred to the next and subsequent positions in said standby memory so that sequential positions in said standby memory are filled.

According to a fourth aspect of the invention, there is provided a device for transmitting video data, comprising: a temporary memory for temporarily storing N VLC data blocks; a standby memory for sequentially storing the N data blocks stored in the temporary memory by a specified bit rate, prior to transmission of the symbol data; a bit counter for generating an address signal for sorting the data symbols into said temporary memory, and an address signal for storing the data symbol of which bit rate is variable according to the state of the data blocks stored in said temporary memory, into said standby memory by said specified bit rate; a codec for controlling said bit counter according to the state of the data blocks to vary the bit rate, so as to generate a same bit rate as said specified bit rate; and a controller for controlling said bit counter by checking a state of the input symbol data, to allow the codec to read the block data from said temporary memory by the bit rate, which is variable to have the same bit rate as the specified bit rate, and to write the data read from said temporary memory via said codec into said standby memory.

According to a fifth aspect of the invention, there is provided a method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory one by one; checking whether a current symbol is a last symbol to be coded into the variable rate, and if the current symbol is not the last symbol, continuing to read the symbol data stored in said temporary memory and calculate the bit rate to determine an encoding bit rate; subjecting a symbol whose decoding bit rate is determined at the second step to convolution coding, and transferring it to a standby memory; and reading next symbol data as much as a specified bit rate to transfer it to said standby memory.

According to a sixth aspect of the invention, there is provided a method for transmitting video data, a method comprising the steps of: sequentially storing N symbols of varying symbol data length into a temporary memory; checking whether a current symbol is a last symbol, and if the current symbol is not the last symbol, reading the symbol data of said current symbol from the temporary memory and calculating a converting bit rate for converting the length of said current symbol to fill a corresponding current symbol position in a standby memory; encoding said current symbol using said bit rate calculated above, transferring said encoded symbol to the current symbol position of said standby memory; and repeating the above steps for each subsequent symbol so as to fill subsequent positions of said standby memory until a last symbol has been transferred.

For a better understanding of the invention, and to show how embodiments of the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which: Figures 1A to 1D are diagrams for showing how bit streams having different lengths are converted into fixed rate bit streams according to the prior art; Figure 2 is a schematic block diagram of a video data transmission device according to a preferred embodiment of the present invention; Figures 3A and 3B are diagrams for showing a bit planarization (or equalization) process according to a preferred embodiment of the present invention; Figure 4 is a flow chart for illustrating transmission of video data by means of the device of Figure 2; Figure 5 is a schematic block diagram of a video data transmission device according to another preferred embodiment of the present invention; Figures 6A and 6B are diagrams for showing a bit planarization process according to another preferred embodiment of the present invention; and Figure 7 is a flow chart for illustrating transmission of video data by means of the device of Figure 5.

A preferred embodiment of the present invention will be described in detail referring to the attached drawings, in which like reference numerals denote the same elements in the drawings, for understanding. Though the specific embodiment will be exemplarily defined and described in detail to clarify the subject matter of the present invention, the present invention may be implemented with the description of the present invention by those skilled in the art even without the details. In addition, an unnecessary detailed description of widely known functions and constructions may be avoided here.

Referring to Figure 2, a video data transmission device according to the present invention includes a temporary memory 201, a controller 204, a bit counter 206, and a standby memory 208. The temporary memory 201 temporarily stores N VLC (Variable Length Coding) data blocks (or symbols) bl-bn. The standby memory 208 sequentially stores the N Blocks bl-bn stored in the temporary memory 201 by a bit rate shorter than a specified bit rate S1, prior to transmission of the block data. The bit counter 206 generates an address signal for sorting the data blocks into the temporary memory 201, and an address signal for storing the VLC data blocks having different start points into the standby memory 208. The controller 204 controls the bit counter 206 by checking a state of the input block data, to read the block (or symbol) data from the temporary memory 201 by the bit rate shorter than the specified bit rate S1 and to write the data read from the temporary memory 201 into the standby memory 208.

Figures 3A and 3B show that the blocks bl-bn are processed to have different start points according to a preferred embodiment of the present invention.

Specifically, Figure 3A shows N symbols (or blocks) bl-bn each having a different length, stored in the temporary memory 201, and Figure 3B shows the N symbols (or blocks) bl-bn' stored in to the standby memory 208 in response to the address signal generated from the bit counter 206, such that the respective symbols have different start points within the first specified bit rate S1.

Figure 4 shows a flow chart for transferring the N symbols bl-bn stored in the temporary memory 201 to the standby memory 208 according to the present invention.

With reference to Figure 4, the flow chart consists of four process steps. At a first step, the controller 204 sequentially stores the N symbols bl-bn into the temporary memory 201 one by one, as shown in Figure 3A. At a second step, if the current symbol is the last symbol (i.e., N-th symbol) bn, the controller 204 sequentially reads the symbol data stored in the temporary memory 201 to check whether the respective symbols are longer or shorter than the specified bit rate S1. At a third step, if a selected symbol is longer than the specified bit rate S1, the controller 204 transfers the data up to the specified bit rate S1 to the standby memory 208. At a fourth step, the controller 204 reads the next symbol data as much as the specified bit rate S1 to transfer it to the standby memory 208.

Now referring to Figures 1 to 4, the preferred embodiment of the present invention will be described in detail. As illustrated in Figures 3A and 3B, if a selected symbol (or block) does not have the same length as the specified bit rate S1, a part of the selected symbol only is transferred to the standby memory 208 as a fill bit, so as to reduce the calculation time at the transmitter and to lower the complexity at the receiver.

With reference to Figure 4, at step 4a, the controller 204 sets the temporary memory 201 to a write mode and generates the address signal by means of the bit counter 206, to store received data into the temporary memory 201.

At steps 4b to 4d, the controller 204 sequentially stores the received data into the temporary memory 201 by the block (or symbol), as shown in Figure 3A. Specifically, at the step 4b, the controller 204 checks whether the currently received data is the data for the last block bn.

If not so, the controller 204 continues to sequentially store the respective blocks bl-bn into the temporary memory 201, at the steps 4c and 4d. However, if the current data is the data for the last block bn at the step 4b, the controller 204 sets the temporary memory 201 to a read mode and generates the address signal to the temporary memory 201 by means of the bit counter 206, in order to read the data therefrom. At steps 4e to 4h, the controller 204 reads the data of the respective blocks by the specified bit rate S1 in response to the address signal generated from the bit counter 206, and stores it into the standby memory 208 which is set to the write mode. That is, the block bl of Figure 3A which is longer than the specified bit rate S1 is first stored in the first block bl' of the standby memory 208 as much as the specified bit rate S1, and then the remaining data of the block bl' is stored at the beginning of the next block b2' of the standby memory 208 as shown in Figure 3B. The same process is repeated for all the remaining blocks b2'-bn'.

In the meantime, if the current block is the last block bn' at step 4i, the controller 204 completes the process.

It could be appreciated from the foregoing description that the data is processed within the specified bit rate S1, so that the calculation time may be reduced at the transmitter and the complexity of calculation may be lowered at the receiver.

Figure 5 shows a block diagram of a video data transmission device according to another preferred embodiment of the present invention. In the drawing, the temporary memory 201 temporarily stores N VLC (Variable Length Coding) data blocks (or symbols) bl-bn, as shown n Figure 6A. The standby memory 208 sequentially stores the N symbols bl-bn stored in the temporary memory 201 by a specified bit rate S2, prior to transmission of the symbol data. The bit counter 206 generates an address signal for sorting the data symbols into the temporary memory 201, and an address signal for storing the data symbol of which bit rate is variable according to the state of the data blocks stored in the temporary memory 201, into the standby memory 208 by the specified bit rate S2. A codec 510 controls the bit counter 206 according to the state of the data blocks to vary the bit rate, so as to generate the same bit rate as the specified bit rate S2. The controller 204 controls the bit counter 206 by checking a state of the input symbol (or block) data, to allow the codec 510 to read the block (or symbol) data from the temporary memory 201 by the bit rate, which is variable to have the same bit rate as the specified bit rate S2, and to write the data read from the temporary memory 201 via the codec 510 into the standby memory 208.

Figure 7 is a flow chart for transmitting video data by means of the device of Figure 5 according to another preferred embodiment of the present invention, in which the process includes four steps. At a first step, the controller 204 sequentially stores the N symbols bl-bn into the temporary memory 201 one by one as shown in Figure 6A. At a second step, it is checked whether the current symbol is the last symbol (i.e., N-th symbol) bn to be coded into the variable rate. If not so, the controller 204 continues to read the symbol data stored in the temporary memory 201 and calculates the bit rate to determine an encoding bit rate. At a third step, the symbol whose decoding bit rate is determined at the second step undergoes convolution coding, and is transferred to the standby memory 208. At a fourth step, the controller 204 reads the next symbol data as much as the specified bit rate S2 to transfer it to the standby memory 208.

The preferred embodiment of the present invention shown in Figure 7 is to form a fixed rate bit stream by using unequal error protection (UEP), in which the VLC symbols (or blocks) undergo the channel coding with different weight according to its significance.

Referring to Figure 7, at step 7a, the controller 204 sets the temporary memory 201 to the write mode and generates the address signal by means of the bit counter 206, to store received data into the temporary memory 201.

At steps 7b to 7d, the controller 204 sequentially stores the received data into the temporary memory 210 by the block (or symbol), as shown in Figure 6A. Specifically, at the step 7b, the controller 204 checks whether the currently received data is the data for the last block bn.

If not so, the controller 204 continues to sequentially store the respective blocks bl-bn into the temporary memory 201, at the steps 7c and 7d. However, if the current data is the data from the last block bn at the step 7b, the controller 204 checks at step 7e whether the current symbol data stored in the temporary memory 201 corresponds to the last symbol bn'. If not so, the controller 204 sets the temporary memory 201 to the read mode and generates the address signal to the temporary memory 201 by means of the bit counter 206 so as to read the symbol data therefrom. Then, at step 7g, the controller 204 calculates a bit number of the symbol (or block). At step 7h, the controller 204 determines an encoding bit rate in order to make the corresponding symbol have the same bit rate as the specified bit rate S2 based on the calculated bit rate of the symbol. Then, at step 7i, the controller 204 controls the codec 510 to perform the convolution coding, and the convolution coding result as shown in Figure 7B is transferred to the standby memory 208 which is set to the write mode, at step 7j.

That is, the blocks bl-bn each having different bit rate of Figure 6A are converted into the blocks bl'-bn' having the same specified bit rate S2 of Figure 6B, and stored into the standby memory 208.

The above process is repeated until the current symbol (or block) data is the data for the last block bn' at the step 7e. Here, the convolution coding performance of the codec 510 can be determined by the rate (of input to output). As the rate becomes lower (that is, the number of the output symbols is higher than that of the input symbols), the redundancy increases thereby enhancing the error resilience. In Figure 6A, it is meant that the longer VLC code such as the block bl includes the majority of high frequency components, and the shorter VLC code includes the majority of low frequency components.

Therefore, in accordance with the present invention, it is possible to obtain fixed bit rate, enhancing the error resilience of the symbols (blocks) including the majority of low frequency components. That is, the bit counter 206 recognizes the bit number of symbol data stored in the temporary memory 201, and the codec 510 performs the variable rate coding for the symbol data so as to make the symbol data have the same bit rate as the specified bit rate S2. The coded symbol data is stored in to the standby memory 208, and then, applied to a multiplexer (not shown). The above process is repeated for all the VLC data.

As can be appreciated from the foregoing descriptions, when transmitting video data via a radio channel or a channel with a lower error resilience, the device according to embodiments of the present invention can enhance the error resilience of the channel by simply converting the variable rate data into the fixed rate data. Further, with use of a variable rate codec, the device according to embodiments of the present invention can protect those symbols having a higher significance more strongly, thereby minimizing the burst error.

While there have been illustrated and described what are considered to be preferred embodiments of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the scope of the present invention as defined by appended claims.

The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.

Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel corbination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings) , or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

Claims

CLAIMS 1. A device for transmitting video data, comprising: a temporary memory for temporarily storing N VLC (Variable Length Coded) data blocks; a standby memory for sequentially storing the N blocks stored in said temporary memory using a bit rate which is shorter than a specified bit rate, prior to transmission of the block data; a bit counter for generating an address signal for sorting the data blocks into said temporary memory, and for generating an address signal for storing the VLC data blocks into said standby memory with different start points; and a controller for controlling said bit counter by checking a state of the input block data, reading the block data from the temporary memory using the bit rate shorter than the specified bit rate S1 and writing the data read from said temporary memory to said standby memory.
2. A method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory; if a current symbol is a last symbol, sequentially reading the symbol data stored in the temporary memory to check whether the respective symbols are longer or shorter than a specified bit rate; if a selected symbol is longer than said specified bit rate, transferring the data as much as said specified bit rate to a standby memory; and reading next symbol data as much as said specified bit rate to transfer it to said standby memory.
3. A method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory; and transferring symbol data of said N symbols from said temporary memory to a standby memory, said standby memory having a number of symbol positions, each of which has a specified bit rate, wherein if a current symbol for transfer between the temporary memory and the secondary memory has insufficient symbol data to fill a current symbol position in the standby memory then, following transfer of said current symbol, symbol data from a next symbol or symbols is sequentially transferred to said current position until said current position is full, symbol data remaining to be transferred from said temporary memory being thereafter sequentially transferred to the next and subsequent positions in said standby memory so that sequential positions in said standby memory are filled.
4. A device for transmitting video data, comprising: a temporary memory for temporarily storing N VLC data blocks; a standby memory for sequentially storing the N data blocks stored in the temporary memory by a specified bit rate, prior to transmission of the symbol data; a bit counter for generating an address signal for sorting the data symbols into said temporary memory, and an address signal for storing the data symbol of which bit rate is variable according to the state of the data blocks stored in said temporary memory, into said standby memory by said specified bit rate; a codec for controlling said bit counter according to the state of the data blocks to vary the bit rate, so as to generate a same bit rate as said specified bit rate; and a controller for controlling said bit counter by checking a state of the input symbol data, to allow the codec to read the block data from said temporary memory by the bit rate, which is variable to have the same bit rate as the specified bit rate, and to write the data read from said temporary memory via said codec into said standby memory.
5. A method for transmitting video data, comprising the steps of: sequentially storing N symbols into a temporary memory one by one; checking whether a current symbol is a last symbol to be coded into the variable rate, and if the current symbol is not the last symbol, continuing to read the symbol data stored in said temporary memory and calculate the bit rate to determine an encoding bit rate; subjecting a symbol whose decoding bit rate is determined at the second step to convolution coding, and transferring it to a standby memory; and reading next symbol data as much as a specified bit rate to transfer it to said standby memory.
6. A method for transmitting video data, the method comprising the steps of: sequentially storing N symbols of varying symbol data length into a temporary memory; checking whether a current symbol is a last symbol, and if the current symbol is not the last symbol, reading the symbol data of said current symbol from the temporary memory and calculating a converting bit rate for converting the length of said current symbol to fill a corresponding current symbol position in a standby memory; encoding said current symbol using said bit rate calculated above, transferring said encoded symbol to the current symbol position of said standby memory; and repeating the above steps for each subsequent symbol so as to fill subsequent positions of said standby memory until a last symbol has been transferred.
7. A device for transmitting data, substantially as herein described with reference to Figures 2 to 4.
8. A method for transmitting data, substantially as herein described with reference to Figures 2 to 4.
9. A device for transmitting data, substantially as herein described with reference to Figures 5 to 7.
10. A method for transmitting data, substantially as herein described with reference to Figures 5 to 7.