GB2332791A - Frequency control in a voltage controlled oscillator by adjusting the relative phases of two feedback signals - Google Patents

Abstract

A voltage controlled oscillator A is described in which a resonator 6 is fed from two amplifiers (1,2) in parallel, the phases of the positive feedback paths from the resonator to the amplifiers being adjusted by varying the gains of the amplifiers (CONTROL1 and CONTROL2). This provides tuning without the use of a tuning diode. Networks 1(9 and 10) and 2 (11 and 12) produce -45 and +45 degree lag and lead respectively. 13 is a decoupling capacitor. 7 and 8 are load capacitors. Circuit B is a bandgap/current stabiliser for the current source transistor 3. May be used in a GSM portable phone.

Description

VOLTAGE CONTROLLED OSCILLATOR CIRCUIT AND OPERATIONAL METHOD THEREOF FIELD OF THE INVENTION The present invention relates to crystal oscillators generally, and more particularly to voltage controlled crystal oscillators which have to operate in a low voltage (typically at or below one volt) environment, such as for example in portable battery powered equipment which could include radios and cellular telephones and in particular GSM portable telephones.

BACKGROUND OF THE INVENTION In certain applications it is important to control the frequency of an oscillator.

However, where such control is important there is a problem in providing a frequency control circuit which will not result in a high voltage being required to the point where the effective operation of the oscillator is jeopardised.

It is known to incorporate a variable capacity diode (also known as a tuning diode) in an oscillator circuit to control frequency. Such a voltage controlled crystal oscillator (VCXO) uses a variable capacitance diode requiring a reasonably high voltage supply (e. g. 5 volts) in order to give an adequate capacitance change to cover the requisite range of frequency. Thus, a tuning diode is not a suitable means for controlling frequency in low-voltage operating environments. Furthermore, tuning diode capacitance also varies with temperature such that adequate temperature compensation to maintain good frequency tolerance is normally required. Yet another disadvantage of tuning diodes is that the spread of the capacitance value from nominal can be quite large, particularly at the low capacitance end of its voltage range. Moreover, tuning diode components are relatively expensive. The present invention is therefore concerned with achieving the desired objective of frequency control without, in particular, employing a tuning diode.

A further prior art arrangement employs an amplifier together with a voltage controlled variable phase shifter, wherein the frequency is controlled by varying the phase of the feedback. Such an amplifier arrangement drives the crystal positive feedback network, which in turn gives the conjugate phase shift at the oscillation frequency. Today's state-of-the-art circuits employez this method stack the required elements (amplifiers, phase shifters and gain controllers) on top of one another, which each element having its own required operation voltage of about 0. 5 volts. Thus, the total operating voltage which is the sum of the operating voltage of each element in the stacked arrangement) is in excess of the desired low level.

The present invention is therefore concerned with providing a VCXO designed to run at low voltage (i. e. at or below 1 volt) and which is suitable for GSM portable telephones, the operating frequency being typically 13 MHz.

SUMMARY OF THE INVENTION According to the present invention a voltage controlled oscillator circuit comprises two amplifiers driving a resonant load with positive feedback to each of the amplifier inputs via paths of differing phase shift and means for changing the relative gains of the amplifiers with respect to one another.

BRIEF DESCRIPTION OF THE FIGURES The invention will now be described by way of example only and with reference to the accompanying drawings in which : Figure 1 illustrates, in circuit diagram form, a VCXO in accordance with one embodiment of the present invention ; Figure 2 illustrates, in graph form, the performance of the circuit of Figure 1. ; and Figure 3 illustrates, in circuit diagram form, an equivalent circuit for the quartz crystal of figure 1 for purposes of obtaining the performance information of Figure 2.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT Generally, the present invention is a circuit which utilises the technique of phase shirting for frequency control, as some prior art techniques use. But in contrast to known circuits, the present invention uses two amplifiers with their summed outputs driving the crystal feedback network, but with feedback provided individually to the amplifiers by separate phases of the feedback signal.

These an other features of the present invention will be more clearly understood from the following description taken in conjunction with the drawings. While only one particular embodiment of the invention is illustrated, it is understood that variations and deviations of the embodiment may fall within the scope of the invention as defined by the claims.

Figure 1 illustrates one embodiment of the present invention in circuit diagram form. This embodiment consists essentially of two circuits, the first being circuit A, an oscillator circuit according to the present invention, and circuit B which serves as a bandgap/current stabiliser for a current source transistor 3. Transistor 3 provides a common DC load for inverting amplifiers 1 and 2 of oscillator circuit A. Circuit A is described in further detail below.

Circuit B includes transistors 14, 15, 16 and 17 and resistors 18 and 19, with transistors 14 and 16 being wired as diodes. The base of PNP transistor 3 (the current source) is driven from the collector of NPN transistor 15. The collector of transistor 15 also drives the PNP current mirror combination of diode-connected transistor 14 and transistor 17. The collector current of transistor 3 will be equal to those of transistors 14 and 17 multiplied by any transistor size factor. Preferably transistor 3 has four times the emitter area of transistor 14. The current mirror combination of transistor 14 and transistor 17 forces the collector currents of NPN transistors 15 and 16 to ha equal. Preferably, transistor 15 has ten times the emitter area of transistf 16, and hence will have a base-emitter ON voltage of 60 milliVolt (mV) less than transistor 16. This 60mV (obtained by kT/qlnlO) will appear across resistor 18 and thereby determine the collector current of transistor 15, which being equal to that of transistor 16 will determine the current in transistors 14, 17, and 3. Resistor 19 serves to force a starting current in the combination of elements 15, 16, 14, 17 and 18.

In accordance with an embodiment of the present invention, Circuit A includes transistors 1 and 2 which perform as inverting amplifiers (thus they are subsequently referred to as amplifiers 1 and 2). The outputs of amplifiers 1 and 2 are summed together at a common output ("output"in figure 1) which drives a resonant load with positive feedback to the amplifiers. In a preferred embodiment the resonant load is a quartz crystal 6, as shown in figure 1, but can alternatively be an inductor/capacitor combination. As well as the AC positive feedback via the quartz crystal network, the two amplifiers have DC negative feedback from the common output via resistors 5 and 4 to Inputl and Input2, respectively. The DC negative feedback sets the operating voltage at the common output to a value such that the two inputs are at a sufficiently high voltage that the two amplifiers absorb the current delivered by current source transistor 3. If the voltage at controll equals the voltage at control2, the two amplifiers will equally share the current delivered by current source transistor 3. Modification of the voltage at controll with respect to control2 will modify the relative current taken by amplifiers 1 and 2 in a predictable manner. The gain of amplifiers 1 and 2 will be proportional to their collector carrent, thus controll and/or control2 can be used to vary the relative gain of amplifiers 1 and 2.

The phase of the common output signal from the amplifiers is a function of the relative gain of the two inverting amplifiers 1 and 2, and of the phase and amplitude of their respective input signals. The input signal amplitudes are ideally equal and the signal phases are ideally +45 and 45 about the signal coming from the quartz crystal feedback network.

The feedback network includes two separate resistor/capacitor (RC) networks, networkl and network2. Networkl includes resistor 9 and capacitor 10, and is coupled to inputl of amplifier 1 and to controll.

Network2 includes resistor 11 and capacitor 12, and is coupled to input2 of inverter 2 and to control2. The feedback network also includes appropriate load capacitors 7 and 8. A further capacitor 13 is provided in order to give AC decoupling to the base of resistor 9, its value being chosen to produce the desired time constant.

In the feedback portion of the circuit, resistor/capacitor networkl produces a phase lead and resistor/capacitor network2 produces a phase lag. The lag of networkl is-45 , while the lead of network2 is +45 . The 45 lag and lead are produced by standard RC series networks in which the capacitor is chosen to have a reactance equal to the resistor value at the frequency of operation (e. g.

13 MHz). If the signal arriving from the crystal feedback circuit to the phase shift networks is VangleO (VZO), the outputs of the lead-lag networks are VZ+45 and VZ-45, respectively. With such lead-lag, the combined output of amplifiers 1 and 2 at the common output will be VZ+45 times the gain of amplifier 1 plus VZ-45 times the gain of amplifier 2, i. e. : VZ+45*Gainl + VZ-45*Gain2 The gain of amplifier 1 with respect to amplifier 2 is dependent upon their relative collector currents, which are a function of the voltages on controll and control2, respectively. Thus, by changing the relative gain of the amplifiers 1 and 2 by changing the voltages on controll and control2, the phase shift of the parallel amplifier combination may be varied about the nominal value of 180 , thereby modifying the frequency of the oscillation. The frequency of oscillation is such that the phase shift given by the crystal network elements 6, 7, and 8, is exactly opposite to the phase shift given by the lead/lag networks (networkl and network2) and the amplifiers 1 and 2.

Stated otherwise, the phase shift from the common amplifier output to node X2 is exactly opposite the shift from X2 to the common output. By varying the phase shift of path X2 to the common output from the nominal value of 180 (where the gain of amplifier 1 equals the gain of amplifier 2), the phase shift of the path from the common amplifier output to X2 is forced to move from its nominal 180 . But this can only happen by moving to a frequency offset from the nominal frequency.

Figure 2 graphically illustrates the simulated performance of the circuit shown in figure 1. More specifically, the graph demonstrates the operation of the circuit from node X2 to the common amplifier output with the two inverting amplifiers 1 and 2 set to equal gains. For purposes of simulation, the circuit equivalent as shown in figure 3 was used. The SPICE listing of the circuit of figure 1 used to obtain the performance information in figure 2 is included in the Appendix. The quartz crystal circuit of figure 3 is the equivalent circuit for the quartz subcircuit of the SPICE listing.

In figure 2, the variations of voltage in the line 21 (inputl) of circuit A over time is indicated by the curve 23, and the variation of voltage in the line 22 (input2) of circuit A over time is indicated by the curve 24. A curve labelled Vx2 represents the voltage at node X2 of figure 1, which via lead networkl produces the voltage shown by curve 23 at inputl. As shown, the voltage at inputl leads the voltage at node X2 by 45 degrees. As also shown, the lagging voltage at input2, shown by curve 24, lags Vx2 by 45 degrees. Also included in figure 2 is a curve labelled Voutput. The two amplifiers invert their respective input signals and sum the resultants to produce Voutput. This output is at 180 to the average of the two input signal phases and to voltage Vx2.

The foregoing description and illustrations contained herein demonstrate the features and advantages associated with the present invention. In particular, it has been revealed that frequency control of an oscillator can be achieved in low voltage applications, such as needed in portable electronic devices including cellular phones. Since amplifiers 1 and 2, which control the output phase relative to the input phases, are in parallel and not stacked on top of each other, the total required supply voltage is reduced compare to prior art phase shift controlled oscillators. Furthermore, the circuit is easy to integrate with other circuitry since all the component values lie within acceptable ranges (eg. capacitors 10 and 12 can be about 1 picoFarad (pF)).

Although the invention has been described and illustrated with reference to specific embodiments thereof, it is not intended that the invention be limited to these illustrative embodiments. Those skilled in the art will recognise that modifications and variations can be made without departing from the scope of the invention. For example, although circuit A is shown to include two controls (controll and control2) it could be operated with only a single control.

A single control is simpler, but two controls provide better immunity to interference/electrical noise. Also, while transistors 3, 14 and 17 are shown as PNP type transistors in figure 1, they could be replaced by P channel devices.

Likewise, the amplifiers 1 and 2 are shown as NPN transistors but could be replaced by N channel devices. Therefore, it is intended that this invention encompass all such variations and modifications as fall within the scope of the appended claims.

APPENDIX SPICE LISTING FIGURE 1 CORRELATION R6 A GND 300K (R6=resistor 19) Q3 OUTPUT A VCC P 4 (Q3=transistor 3) Q4 A A VCC P (Q4=transistor 14) Q7 B A VCC P (Q7=transistor 17) RF1 OUPUT INPUT1 150K (RF1=resistor 5) RF2 OUTPUT INPUT2 150K (RF2=resistor 4) RCON2 INPUT2 CONTROL2 220K (RCON2=resistor with Control2) RCON1 INPUT1 CONTROLl 220K (RCON1=resistor with Controll) Ql OUTPUT INPUT1 GND N (Q1=transistor 1) Q2 OUTPUT INPUT2 GND N (Q2=transistor 2) Q6 B B GND N (Q6=transistor 16) Q5 A B C N 10 (Q5=transistor 15) RLEAD INPUT1 DC 12K (RLEAD=resistor 9) RLAG X2 INPUT2 12K (RLAG=resistor 11) R5 C GND 6K (R5=resistor 18) CL1 OUTPUT GND 22P (CL1=capacitor 8) CL2 X2 GND 22P (CL2=capacitor 7) CLEAD X2 INPUT1 1P (CLEAD=capacitor 10) CDC DC GND 23P (CDC=capacitor 13) CLAG INPUT2 GND 1P (CLAG=capacitor 12) XQUARTZ OUTPUT X2 QUARTZ . SUBCKT QUARTZ XI X2 ikick xl xla dc 0 pulse (0 100e-6 lOn lOn lOn lOn lm) CO X1 Xl 6P Cl X1A X1B 15FF C3 X3A X3B 1. 67FF C5 X5A X5B 0. 6FF C7 X7A X7B 0. 306FF RO XI X2 20MEG RI X1B X2 15 R3 X3B X2 25 R5 X5B X2 30 R7 X7B X2 35 LL1 Xl X1A 10MH LL3 Xl X3A 10MH LL5 Xl X5A 10MH LL7 Xl X7A 10MH . ENDS QUARTZ

Claims (10)

1. CLAIMS 1. A voltage controlled oscillator circuit comprising two amplifiers driving a resonant common resonant load with positive feedback to each of the amplifier inputs via paths of differing phase shift and including means of changing the relative gains of the amplifiers with respect to one another.
2. 2. A voltage controlled oscillator circuit as claimed in Claim 1 in which the resonant load is a quartz crystal or inductor/capacitor combination.
3. 3. A voltage controlled oscillator circuit as claimed in Claim 1 or 2 in which the paths of differing phase shift are provided by lead and lag networks respectively.
4. 4. A voltage controlled oscillator circuit as claimed in Claim 3 in which the lead and lag networks comprise resistor/capacitor networks.
5. 5. A voltage controlled oscillator circuit as claimed in any previous claim wherein relative gains of the two amplifiers are changed by varying DC operating points of the two amplifiers.
6. 6. A voltage controlled oscillator circuit as claimed in any previous claim and fabricated in the form of an integrated circuit.
7. 7. A cellular telephone incorporating a voltage controlled oscillator circuit as claimed in any previous claim.
8. 8. A voltage controlled oscillator circuit substantially as hereinbefore described with reference to and as shown in figures 1 and 2 of the accompanying drawings.
9. 9. A method of changing the relative gains of two amplifiers in a voltage controlled oscillator circuit comprising the steps of : using the two amplifiers to drive a common resonant load ; and varying the dc operating points of the two amplifiers to modify the relative gains of the two amplifiers.
10. 10. A method of changing the relative gains of two amplifiers in a voltage controlled oscillator substantially as hereinbefore described with reference to the accompanying drawings.