GB2332113A - Video encoding apparatus providing weighting signal for scaled motion vector interframe decoding - Google Patents
Video encoding apparatus providing weighting signal for scaled motion vector interframe decoding Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/124—Quantisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/124—Quantisation
- H04N19/126—Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/48—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using compressed domain processing techniques other than decoding, e.g. modification of transform coefficients, variable length coding [VLC] data or run-length data
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
- H04N19/51—Motion estimation or motion compensation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/30—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using hierarchical techniques, e.g. scalability
Abstract
A scalable MPEG encoder produces an optimal weighting signal W in generator 70 which is subsequently used during decoding, instead of a fixed weighting signal (eg 0.5 in Fig 2B), for scaling a motion vector MV applied to a low-resolution image decimated from a high-resolution image. The optimal weighting signal is such that the decoded image has the best S/N ratio and accumulated drift effects caused by the interframe encoding are eliminated thereby enabling good video recovery.
Description
2332113 SC-Aldk-SLE ENCODING APPARATUS AND 14ETROD WITH IMPROVED FUNCTION
OF SCALING MOTION VECTOR
FIELD OF THE INVENTION
The present invention relates to a scalable encoder and its encoding method for enco ding both of high-resolution image and low-resolution image in a transmitter with video compression function. More particularly, this invention deals with a scalable encoder and its encoding method for eliminating the drift effect that reduces the quality of picture on the screen, by precisely performing the scaling of motion vector in intraframe coding.
BACKGROUND OF THE INVENTION
Generally speaking, the araount of video data is extremely huge, compared with voice or characters data, so that the real-time processing in storage or transmission becomes impossible without coding.
The coding of video data in a certain method enables them to be orocessed in real time during storage or transmission. For the international standards for video coding, there are currently suggested JPEG for still image, MPEG1 and MPEG2 for moving image, and M-PEG4 under development for low-speed bitrate trans-mission.
In video data, the amount of information practically i contained and the amount of information actually used to express it are not equal, which is called redundancy of data.
Spatial redundancy is caused by the similarity of value between pixels. it is noted that when a predetermined pixel is selected, its value and other adjacent pixels' values are similar. For the processing of spatial redundancy, discrete cosine transform (DCT) is used.
Secondly, probabilistic redundancy results from the redundancy of symbols that express data. The distribution of data is not regular probabilistically, and there are frequently occurring symbols as usual. For this redundancy, entropy coding is utilized, which belongs to variable length coding.
Temporal redundancy is produced from the similarity between previous and present frame images. This is processed with motion estimation/motion compensation.
Meanwhile, with the rapid development of information/communications industry, many services, such as video on demand, tele-teach ing, videoconferencing, highdefinition TV, tele-diagnosis, teleshopping, are now under way or in course of preparation- If compressed video signals of these various services are to be provided using respective receivers, as many receivers as the number of services are required- In order to overcome such a drawback, scalable coding has been suggested in which the services' signals are 2 compressed in a single mode and decoded in accordance with the re. 5pectilTe receivers. With this scalable coding, such many services can be offered through only a receiver. The scalable. coding has roughly two kinds of sub-band coding and pyramid coding, which are different in dividing an or,,iginal image into smaller pieces.
FIG. 1 is a diagram of the whole configuration of a conventional scalable encoder. This encoder codes video signals input by frames into highresolution image and lowresolution image. Intraframe coding is performed in the highresolution frame, and then interframe coding is carried out. From now on, intraframe coding and interframe coding are explained respectively.
First, the configuration of intraframe coding includes an 88 block divider 11 for dividing a video signal Sin input by frames into 88 blocks, an 88 block discrete cosine transformer 12 for converting the plane domain of the video signal divided into 88 blocks into frequency domains through DCT transform, an 88 block quantizer 13 for quantizing the difference signal (a video signal without overlapped image) between the video signal (88 block frame) converted into frequency domains and the video signal (44 block frame) of block inverse compensator 33, an 88 block variable length coding portion 14 for encoding the quantized video signal, and then outputting the encoded signal S14 to a multiplexer 60, a 3 44 block decimator 21 for decimating 44 blocks of video signal from BS blocks of video signal output from 88 block DCT 12, an energy coefficient compensator 22 for multiplying the video signal extracted into 44 blocks by 0.25(1/4) in order to perform energy compensation, a 44 block quantizer 23 for quantizing the energy-compensated video signal, a 44 block variable length coding portion 24 for encoding the quantized video signal, and then outputting the encoded signal S24 to multiplexer 60, a 44 block inverse quantizer 31 for inversely quantizing the video signal from 44 block quantizer 23, an 88 block interpolator 32 for interpolating the inversely quantized 44 block video signal into 88 blocks of video signal, using zero, an block inverse compensator 33 for inversely compensating for the energy of the interpolated video signal, an 88 block inverse quantizer 41 for inversely quaritizing the video signal from 88 block quantizer 13, an 88 block inverse DCT 42 for performing the inverse DCT to the sum signal (an approximate signal of the video signal of 88 block DCT 12) between the video signal of 88 block inverse qua-ntizer 41 and the video signal of block inverse compensator 33, an adder 43 for summing the video signal of 88 block inverse DCT 42 and the video signal (zero) of motion compensator 53, and a frame memory 44 for storing the frame signal passing through adder 43 for the purpose of interfrane coding- Because the video signal of motion compensator 53 is 4 concerned only during interframe coding, it becomes zero during intraframe coding, and during interframe coding, is a video signal of 88- blocks having a predetermined value.
The configuration of interframe coding in the conventional encoder is added to the aforementioned construction of intraframe coding. The interframe coding configuration includes a 1616 block divider 51 for dividing a video signal into 1616 blocks, a motion vector estimation portion 52 for detecting a motion vector MV from the video signal (present frame) divided into 1616 blocks and the video signal (previous frame) of frame memory 44, and a motion compensator 53 for producing a new frame, using the motion vector 01 MV of motion vector estimation portion 52 and the frame of frame memorv 44. Additionallv, there is a multiplexer 60 for selectively outputting video signal (88 block video signal) S14 of 88 block variable length coding portion 14, video signal S24 (44 block video signal) of 44 block variable length coding portion 24, and motion vector MV of motion vector estimation portion 52 in a predetermined order- FIG. 2a is a diagram of the configuration of a conventional high- resolution decoder, FIG. 2b being of a conventional low-resolution decoder. With FIGS- 2a and 2h, there will be explained the configurations of the decoders that decode the signals encoded in the aforementioned encoder.
First of all, referring to FIG- 2a, the high-resolution decoder (related to 88 block image) includes a demultiplexer Ill for separately outputting input compressed video signal Sin into signals S14 and S24 of 88 blocks and 44 blocks, and into motion vector MV, an 88 block inverse quantizer 112 for inversely quantizing 88 blacks of video signal S14, a 44 block inverse quantizer 113 for inversely quantizing 44 blocks of video signal S24, an 88 block interpolator 114 for interpolating the 44 block video signal inversely quantized in 44 block inverse quantizer 113 into 88 blacks of video signal, an 88 block inverse DCT 115 for converting the frequency domain of the sum signal between the video signal of 88 block inverse quantizer 112 and the video signal of 88 block interpolator 114 into plane domain through inverse DCT, an adder 116 for summing the video signal converted into plane dornain and the video signal of motion compensator 118, and then outputting a video signal Sout of the decoder, a frame memory ll? for storing the signal passing through adder 116 for the purpose of interframe coded data recovery, and a motion compensator 118 for compensating for the video signal stored in frame memory 117 according to the motion vector of demultiplexer Ill, and then offering the compensated result to adder 116.
Turning to FIG. 2b, the low-re5olution decoder includes a demultiplexer 121 for separately outputting input compressed video signal Sin into video signal S24 of 44 blocks and 6 motion vector MV, a 44 block inverse quantizer 122 for inversely quantizing 44 blocks of video signal S24, a 44 block inverse DCT 123 for converting the frequency domain of the video signal of 44 block inverse quantizer 122 into plane domain through inverse DCT, a motion vector scaling portion 124 for scaling motion vector MV of demultiplexer 121, an adder 127 for summing the video signal 44 block inverse DCT 123 and the video signal of motion compensator 126, and then outputting a video signal Sout of the decoder, a frame memory 125 for storing the signal passing through adder 127, and a motion compensator 126 for compensating for the video signal stored in frame memory 125 according to the output signal of motion.vector scaling portion 124, and then offering the compensated result to adder 127.
The conventional scalable encoder adopts pyramid coding. However, when the top left 44 blocks are decimated from the 88 block frame, the 88 blocks' energy is not suitable for 44 blocks extracted so that it needs to be compensated for.
Until now, the configuration of the conventional scalable encoder was explained in addition to the.conventional decoder for reference. The scalable encoder has the following drawbacks.
in the conventional scalable encoder, the scaling of motion vector is imprecisely performed on basis only of frame size rate, not in consideration with SNR in frame or image's -7 complexity. An image produced with the motion vector becomes inaccurate. With those problems, as interframe coding advances, errors are accumulated, causing drift effect where an image becomes wavelike to decrease the quality of picture.
SUMMARY OF THE INVENTION
Therefore, in order to overcome such drawbacks of the prior art, an objective of the present invention is to provide a scalable encoding apparatus and method for accurately performing the scaling of motion vector in consideration of SNR to video signal in interframe coding, eliminating the drift effect and enabling good video recovery.
T9 accomplish the objective of the present invention, there is provided a scalable encoder for producing an optimal weight for scaling an optimal motion vector to be applied to a low-resolution image decimated from a high-resolution image, the encoder comprising: an 88 block DCT for dividing a video signal input by frames into 86 blocks, and performing DCT to the video signal divided; a 44 block decimator for decimating 44 blocks of video signal from the video-signal DCT transformed; a 44 block quantizer for quantizing the video signal decimated; a 44 block inverse quantizer for inversely quantizing tI-Le signal quantized; a 1616 block divider for dividing the input video signal into 1616 blocks; a motion vector detector for detecting a motion vector from a video 8 signal from the 1616 block divider, a video signal from the frame memory, and a video signal from the frame memory; and an optimal weight generator for zcaling the motion %rector fzorr.
the motion vector detector into multiple motion vectors according to multiple weights within a predetermined range, and producing an optimal weight having the best among signalto-ratios based upon a sampled image and multiple 44 block images produced according to the scaled motion vector.
BRIEF DESCRIPTION OF THE ATTACHED DRAWINGS
These and other features of the invention will be understood more clearly from the following description, read in conunction with the drawings, in which:
FIG. 1 is a block diagram of the whole configuration of a conventional scalable encoder; FIG- 2a is a block diagram of a conventional highresolution decoder, FIG. 2b being a low-resolution decoder; FIG. 3 is a concept diagram for explaining energy compensation according to prior art;
FIG. 4 is a block cUagram of a scalable encoder of the present invention; FIG. 5 is an internal block diagram of the energy coefficient compensator of FIG. 4; FIG. 6 is a flowchart of showing energy compensation in ff Lhe energy coe, icient compensator of FIG. 5; 9 FIG. 7 is an internal block diagram of the block inverse compensator of FIG. 4; FIG. 8 is a flowchart of showing the energy inverse compensation oil block inverse compensator of FIG. 7; FIG. 9 is an internal block diagram of the optimal weight generator '70 of FIG. 4; FIG. 10 is a flowchart of showing an optimal weight g eneration in the optimal weight generator of FIG. 9; FIG- 11 is a concept diagram of explaining energy compensation according to the present invention; and FIG. 12 is a graph for explaining the difference between the conventional energy compensation and the energy co'mpensation of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a preferred embodiment of a scalable encoder of the Dresent invention will be described in detail with reference to the. attached drawings. In those drawings, components having substantially the same construction and function are indicated with the same reference numeralsRoughly stating the whole configuration of the scalable encoder of the present invention, this encoder additionally contains an optimal weight generator that produces an optimal weight which can scale an optimal motion vector- Referring to FIG. 4, the configuration of intraframe coding of the present invention includes an 8-,S block divider 11 for dividing a video signal Sin input by frames into 88 blocks, an 88 block DCT 12 for DCT transforming the video signal divided into 86 blocks, an 88 block cruantizer 13 for quantizing the difference signal (a video signal without overlapped image) between the DCT transformed video signal (88 block frame) and the video signal (44 block frame) of block inverse compensator 331, an 88 block variable length coding portion 14 for encoding the quantized video signal, and then outputting the encoded signal S14 to a multiplexer 60, and a 44 block decimator 21 for decimating top left 44 blocks of video signal from 88 blocks of video signal output from 88 block DCT 12.
In addition to those components, there are further included an energy coefficient compensator 22 for obtaining energy compensation value ECV on basis of the energy of the video signal of 88 block DCT 12, and compensating for the energy of the 44 block video signal from 44 block decimator 21 according to the energy compensation value ECV, a 44 block quantizer 23 for quantizing the energy-compensated video signal, a 44 block variable length coding portion 24 for encoding the quantized video signal, and then outputting the encoded signal S24 to multiplexer 60, a 414 block inverse quantizer 31 for inversely quantizing the video signal from 44 block quantizer 23, an 88 block interpolator 32 for 11 interpolating the inversely quantized 44 block video signal into 68 blocks of video signal, using zero, and a block inverse compensator 331 for inversely compensating for the energy of the video signal from 88 block interpolator 32 according to energy compensation value ECV of energy coefficient compensator 22'- Furthermore, there are included an 88 block inverse quantizer 41 for inversely quantizing the video signal from 88 block quantizer 13, an 88 block inverse DCT 42 for performing the inverse DCT to the sum sig-nal (an approximate signal of the video signal of 88 block DCT 12) between the video signal of 86 block inverse quantizer 41 and the video signal of block inverse compensator 331, a first adder 43 for sunming the video signal of 88 block inverse DCT 42 and the video signal (zero) of motion compensator 53, and a first frame memory 44 for storing the frame signal passing through the first adder 43 for the purpose of interframe codingBecause the video signal of motion compensator 53 is concerned only during interframe coding, it becomes zero during intraframe coding, and during interframe coding, is a video signal of 88 blocks having a predetermined value.
The configuration of interframe coding in the present invention is added to the aforementioned construction of intraframe coding. The interframe coding configuration includes a 1616 block divider 51 for dividing a video signal 12 Sin into 1616 blocks, a motion vector estimation portion 52 for detecting a motion vector MV from the video signal divided into 1616 blocks and the video signal of the frame memory, a motion compensator 53 for producing a new frame, using the motion vector MV of motion vector estimation portion 52 and the frame of frame memory 44, and an optimal weight generator 70 for scaling motion vector MV output from motion vector estimation portion 52 into plurality (MVI=MVW) according to multiple weights W within a predetermined range, and producing an optimal weight having the best among SNRs based upon a sampled frame and the plural 44 block frame produced according to the scaled motion vector MVI. Additionally, there is a multiplexer 60 for selectively outputting high-resolution video signal (88 block video signal) S14 of 88 block variable length coding portion 14, low-resolution video signal S24 (44 block video signal) of 44 block variable length coding portion 24, motion vector MV of motion vector estimation portion 52, and optimal weight W of optimal weight generator '70 in a predetermined order.
Referring to FIG..5, the conventional eriergy coefficient compensator 22 is changed to energy coefficient compensator 221 - Energy coefficient compensator 22' of the present invention includes an energy calculator 221a for calculating total energy TE for video signal S12 from 88 block DCT 12 and partial energy PE for the video signal of the top left 44 13 blocks in 88 blocks, an energy ratio calculator 22'b for calculating the ratio TE/PE of total energy TE to partial energy PE obtained in energy calculator 221a, a square root calculator 221c for putting a square root to energy ratio TE/PE obtained from energy ratio calculator 22'b, and a multiplier 22'd for multiplying weight W to the square root of the energy ratio to obtain final energy compensation value ECV which is then provided to block inverse compensator 331, also multiplying energy compensation value ECV to signal S21 (DCT coefficient) from 414 block decimator 21 in order to compensate for its energy, and providing the energy compensated video signal S221 to 44 block quantizer 23. The DCT coefficient is obtained when DCT is performed.
Referring to FIG., the conventional block inverse compensator 33 is changed to block inverse compensator 331. Block inverse compensator 33' of the present invention includes energy inverse compensation value calculator 331a for calculating energy inverse compensation value IECV (=1/ECV) with the inverse number of energy compensation value ECV from energy coe-fficient compensator 221, and a multiplier 331b for multiplying energy inverse compensation value 1ECV to signal S32 (DCT coefficient) from 88 block interpolator 32 to pe--forr.i energy inverse compensation, and providing the energy compensated video signal to 88 block quantizer 13.
Referring to FIG. 9, optimal weight generator -70 of the 14 present invention includes a 41,4 block inverse DCT 74 fox performing inverse DCT to video signal S31 from 44 block inverse quantizer 31, a second frame memory 76 for summing and storing the video signal of 44 block inverse DCT 74 and the video signal of third frame memory 79, a factoring portion 78 for scaling motion vector MV from motion vector estimation portion 52 into plurality MVI according to multiple weights W within a predetermined range, a second motion compensator 77 for compensating for the video signal of second frame memory 76 according to the respective motion vectors MVI scaled in factoring portion 78 in order to produce multiple predicted images and offer them to third frame memory '79 and SIN ratio calculator 72, a sampling portion 71 for sampling video signal S51 of 1616 blocks from 1616 block divider 51 into 88 blocks of video signal, an SIN ratio calculator 72 for calculating SIN ratio, using the sampled video signal and the produced video signal, an SIN ratio comparator 73 for producing an optimal weight corresponding to the largest among the calculated SIN ratios, and a third frame memory 79 for storing the video signal from second motion compensator 77, and offering a frame image corresponding to the optimal weight W from SIN ratio comparator '73 to adder 75.
FIG. 6 is a flowchart of showing energy compensation in energy coefficient compensator 221 of FIG. 5. FIG. 6 is a flowchart of showing energy inverse compen5aticr- in block is inverse compensator 331 Of FIG. 7. FIG. 10 is a flowchart of showing optimal weight generation in optimal weight generator 70 of FIG. 9.
FIG- 11 is a concept diagram of energy compensation according to the present invention. When 44 block lowresolution image is decimated from 88 block high-resolution image, energy compensation is inevitably required because the energy of 88 blocks is not suitable for the 44 block decimated.
FIG. 12 is a frequency spectrum for explaining the difference between the energy compensation according to the present invention and that according to prior art.
The operation of the encoder of the present invention will he described below in detail with reference to the attached drawings.
First of all, referring to FIG. 4, the scalable encoder of the present invention processes video signal Sin in units of frame. This frame video signal is divided into 88 blocks in 88 block divider 11. 88 block DCT 12 converts the plane domain of the video signal into frequency domain through DCT. The converted signal is offered to SIB block quantizer 13 and 44 block decimator 21- In 88 block quantizer 14 the frequency domain of video signal is quantized, and then in 88 block variable length coding portion 14 it is encoded. The encoded signal S14 is output to multiplexer 60.
16 The C4 block decimator 21 decimates the 44 block video signal from the 88 block video signal output from 88 block DCT 12 in order to produce a low- resolution frame image from a high-resolution frame image. In this embodiment, the top left CA block is extracted from 88 blocks, as shown in FIG. 11.
For the decimated 44 block video signal, energy coefficient compensator 221 performs energy compensation. This is because the energy of 88 blocks is not suitable for the decimated 44 blocks. Through this procedure, the energy of the video signal extracted from high-resolution image becomes fitted to a low-resolution image.
Specifically explaining the energy compensation performed in energy coefficient compensator 22' of the present invention referring to FIG. 5, in energy calculator 221a of energy coefficient compensator 22', the total energy TE of the video signal from 88 block DCT 12 and the partial energy PE of the video signal of the top left C4 blocks in the 88 blocks are calculated. The total energy TE is obtained according to equation 1, and partial energy PE according to equation 2.
[EquatJon 11 T E (Ci) 2 (8 x 8 blocks) tEcluation 2) is PE = (Ci)2 (4x4 blocks) 1 c 1-7 Here, Ci is a DCT coefficient (CDCT) produced after the DCT of 8-8 block and 44 block frame images.
In energy ratio calculator 22'b, the ratio TE/PE of total energy TE to partial energy PE obtained in energy calculator 22'a is calculated and offered to square root calculator 22'c. In square root calculator 221c a square root is taken to energy ratio TE/PE obtained in energy ratio calculator 221, which is then provided to multiplier 22'd. In multiplier 221d, the square root of the energy ratio is multiplied by weight W,.that is, 0.25, in order to find final energy compensation value ECV. This energy compensation value is given to block inverse compensator 331, and is expressed in equation 3. Multiplier 22'd multiplies energy compensation value ECV by the signal (DCT coefficient) from 44 block decimator 21 for the purpose of energy compensation. The energy- compensated video signal is offered to C4 block quantizer 23.
[Equat ton 31 ECV = ipli - 0.25 (W) The explanation referring to FIG- 5 is a case where energy coefficient compensator 22' is formed with hardwareHowever, the energy coefficient compensator 221 may be made with so-fzware. The description of energy coefficient
18 compensator formed with software corresponds to steps 221 to 227 in FIG. 6, and it is equal to that of energy coefficient compensator 22' made with hardware.
Meanwhile, the energy compensation considering the energy of 88 block frame in energy coefficient compensator 221 of the present invention is performed only for AC component in the frequency domain. DC components indicate average luminance for the 44 block frame, This average luminance does not change even after the decimation of 44 blocks from 88 blocks. The energy compensation for the DC components is performed by multiplying the DCT coefficient of 44 block5 by the weight 0.25 without any scaling.
The above procedure includes, with respect to the first input frame image, a step of encoding high-resolution image and a step of decimating and encoding a low-resolution image from the high-re5olution image. Next, the intraframe coding and interframe coding are explained.
First of all, in intraframe coding, the video signal of 44 block quafitizer 23 is inversely quantized in 44 block inverse quantizer 31, and zero is interpolated to the rest blacks excluding the 44 blocks in 88 block interpolator 32 in order to produce 88 blocks of video signal. The energy of the 88 block video signal is inversely compensated for in block inverse compensator 331 to be suitable for highresolution image (88 block image) because it was compensated 19 for to be suitable for low resolution in energy coefficient compensator 221 - The inverse energy compensation in energy coefficient compensator 22' will be explained below.
Referring to FIG. 7, in energy inverse compensation value calculator 33'a of block inverse compensator 331, energy inverse compensation value IECV (=11ECV) is calculated with the inverse number of the energy compensation value ECV from energy coefficient compensator 221, and then offered to multiplier 331b. Multiplier 331b multiplies energy inverse compensation value IECV by the signal (DCT coetficient) from 88 block interpolator 32 for the purpose of inverse energy compensation. The inversely energy compensated video signal is offered to both of 88 block cluaritizer 13 and 88 block inverse DCT 42- The explanation referring to FIG. 7 is a case where block inverse compensator 33' is formed with hardware. However, the compensator 331 may be made with software. The description of block inverse compensator formed with software corresponds to steps 331 to 334 in FIG. 8, and it is equal to that of compensator 331 made with hardware.
The 88 block quantizer 13 quantizes and outputs the difference signal where the video signal from block inverse compensator 33' is subtracted froin the second input video signal. Here, when the video signal from block inverse compensator 331 is subtracted from the second input frame video signal, the overlapped video signal corresponding to the 44 blocks decimated in 44 block dec-;.mator 21 is removed from the B8 block frame, performing intraframe coding.
A preparation prior to interframe coding is now explained. The 88 block video signal (video signal without 444 block signal value) quantized in 88 block quantizer 13 i inversely quantized and output to 88 block inverse DCT 42. The 88 block inverse DCT 42 sums the 88 block video signal from 818 block quantizer 13 and the 88 block video signal (video signal where signal value exists only in 44 blocks) from block inverse compensator 331, and then converts the frequency domain into plane domain through inverse DCT- The 88 block video signal converted into plane domain is stored after passing through adder 43. This is the completion of preparation for interframe coding.
In interframe coding, the video signal input to the scalable encoder of the present invention is divided into 1616 blacks in 1616 block divider51, and then offered to both of motion vector estimation portion 52 and optimal weight generator 70. The motion vector estimation portion 52 detects motion vector MV from the video signal divided into 1616 blocks and the video signal from frame memory 44, and the motion vector is provided to first motion compensator 53, multiplexer 60, and optimal weight generator 70. First motion compensator 53 compensates for the video signal of first frame 21 memory 44 using the motion vector so that a new frame video signal is sent to 88 block DCT 12 and adder 43. The 88 block DCT 12 subtracts the new frame video signal from the video signal from 88 block divider 11. The different signal where only the signal component corresponding to the contour remains is converted into frequency domain through DCT. The further procedure is the same as that of high-resolution encoding, and thus will be omitted.
As in above, there have been sequentially described encoding of highresolution video signal, encoding of lowresolution video signal, intraframe coding, and interframe coding- From now, the specific operation of optimal weight generator 70 for producing an optimal weight for optimal motion vector MV by scaling it will be explained.
Referring to FIG. 9, in 44 block inverse DCT 74 of optimal weight generator 10, the video signal of 44 blocks from 44 block inverse quantizer 31 is converted into plane domain through inverse DCT, and then output to second frame memory 76 through second adder 75 so that the video signal is stored in second frame memory 76.
Meanwhile, in factoring portion 78 of optimal weight generator 70, the motion vector MV from motion vector estimation portion 52 is scaled according to multiple weights within a predetermined range. For instance, the range of weight is set to be from 0.1 to 0.8, and the interval between 22 weights be 0.1, weights W become 0.1, 0.2, 0.3, 0.4, 0-5, 0.6, 0.7, and 0.8. If the motion vector is scaled with the multiple weights, the scaled motion vectors become 0.1MV, 0.2.MV, 0. 3Y-V, 0. SMV, which are sent to second motion compensator 77. in this embodiment, for clear understanding, the range of weight is set from 0.3 to 0.6, and their interval 0.1.
Therefore, the motion vectors MVI are scaled as 0.3MV, 0-41MV, 0.5MV, 0.6MV, which are then sent to second motion compensator 77.
Here, second motion compensator 77 predicts multiple new frame images by applying scaled motion vectors MV1 (=0.3MV, 0.4MV, 0.5MV, 0.6MV) given from factoring portion 78 respectively to the video signals stored in frame memory 76, and the predicted frame images are stored in frame memory 79.
The predicted frame images are designed to enable the decoder to perform an optimal decoding procedure when an image to be obtained during decoding in the decoder is previously produced, then an optimal weight having the best among SNRs based upon the previously predicted image and the present image is produced, and finally the optimal weight is sent to the decoder.
In sampling portion 71 of optimal weight generator 70, the video signal of 16116 blocks from 16416 block divider 51 is sampled into 88 blocks, which are then sent to SIN ratio calculator 72. In SIN ratio calculator 72, the SIN ratio of 23 each of the 88 block video signal from sampling portion 71 and the video signal from second motion compensator 77 is calculated, and the result is sent to S/N ratio comparator 73. Then, SIN ratio comparator 73 compares the SIN ratio values provided, and sends the optimal weight corresponding to the largest to multiplexer 60 and third frame memory 79. The third frame memory 79 outputs a frame video signal corresponding to the optimal weight from SIN ratio comparator 73 to adder 75. The adder 75 sums the video signal from frame memory 79 and the video signal through 44 block inverse DCT 74, and sends the result to frame memory 76- The explanation referring to FIG. 9 is a case where optimal weight generator 70 is formed with hardware. However, the generator may be made with software. The description of the generator formed with software corresponds to steps 710 to 740 in FIG. 10, and it is equal to that of generator 70 made with hardware.
Finally, multiplexer 60 outputs encoding signal 514 from e8 block variable length coding portion 14, encoding signal 524 from 44 block variable length coding portion 24, motion vector MV from motion vector estimation portion 52, and Optimal weight W from optimal weight generator 70 in a se(z,uen-ial order.
As described above, the energy compensation of the presellt invention in decimation of low-resolution image from 24 high-resolution image is performed with optimal energy to the low- resolution image by considering the rate between the total energy TE of the high-resolution.and partial energy PE of a correspo-nding block to be decimated. However, in the prior art, energy compensation is very simple by multiplying the DCT coefficient by weight W, 0-25. Even in the scaling of motion vector, the prior art scales it with a fixed value 0.5. In this invention, the optimal weight is produced so that an image to be decoded has the best SIN ratio, and is thus applied to the motion vector scaling. The energy compensation and motion vector scale of the present invention eliminate the drift effect where the quality of picture decreases so that a good video recovery is enabled in decoding-
For the brief explanation of the scalable encoder, first of all, the operation of high-resolution decoding is the same as that referring to FIG- 2a- The low-resolution decoding operation is almost the same as that referring to FIG. 2b. The difference is that instead of fixed weight 0-5 for motion vector scaling, the present invention applies an optimal weight that ensures best quality of picture.
In conclusion, the present invention accurately performs motion vector scaling in intertrame coding so that an optimal weight is applied instead of a weight only dependent upon the size of image, eliminating the drift effect on the image and enabling good video recovery.
It will be apparent to the reader that the foregoing description of the invention has been presented for purposes of illustration and description and for providing an understanding of the invention and that many changes and modifications can be made without departing from the scope of the invention. It is therefore intended that the scope of the invention be indicated by the appended claims rather than by the foregoing description; and all changes which come with-in the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
26
Claims (19)
1. A scalable encoder for producing an optimal weight for scaling an optimal motion vector to be applied to a lowresolution image decimated from a high-resolution image, the ezzicoder comprising:
an 848 block DCT for dividing a video signal input by frames into'88 blocks, and performing DCT to the video signal divided; a 44 block decimatoz for decimating 44 blocks of video signal from the video signal DCT transformed; a 44 block quantizer for quantizing the video signal decimated; a 44 block inverse quantizer for inversely quantizing 4-he signal quantized; a 1616 block divider for dividing the input video signal into 1616 blocks; a motion vector detector for detecting a motion vector from a video signal from the 1616 block divider, a video signal from the frame memory, and a.video signal from the f L.rame memory; and an optimal weight generator for scaling the motion vector from the motion vector detector into multiple motion vectors according to multiple weights within a predetermined range, and producing an optimal weight having the best among signal- 7 to-ratios based upon a sampled image and multiple 44 block images produced according to the scaled motion veczor.
2. The encoder as claimed in claim 1, wherein the optimal weight generator comprises:
44 block inverse DCT for performing inverse DCT to the video signal from the 44 block inverse quantizer; second frame memory for summing and storing the video signal of the 44 block inverse DCT and the video signal of the third frame memory; a factoring portion for scaling the motion vector from the motion vector detector into plurality according to multiple weights within a predetermined range; a second motion compensator for compensating for the video signal of the second frame memory according to the respective motion vectors scaled in the factoring portion in order to produce multiple predicted images and offer them to the third frame memory and S/N ratio calculator; a sampling portion for sampling the video signal of 1616 blocks from the 1616 block divider into 8 blocks of video signal; an SIN ratio calculator for calculating SIN ratio, using the sampled video signal and the produced video signal; an S/.N ratio comparator for producing an optimal weight corresponding to the largest among the calculated SIN ratios; 2 8 and a third frame memory for storing the video signal from the second motion compensator, and offering a frame image corresponding tO the optimal weight from the SIN ratio comparator to the adder.
3. The encoder as claimed in claim 2, wherein in the factoring portion, the range of weight for scaling the notion vector is set between 0.1 and 0.3.
4. The encoder as claimed in claim 3, wherein in the factoring portion, the interval of the weights is set below 0.1 within the range of weight.
5. The encoder as claimed in claim 4, wherein in the factoring portion, the interval of the weights is set to 0.1 within the range of weight.
6. The encoder as claimed in claim 4, wherein in the factoring portion, the interval of the weights is set to 0.05 within the range of weight-
7. The encoder as claimed in claim 2, wherein in the factoring portion, the range of weight for scaling the motion 29 vector is set between 0. 3 and 0 - 6
8. The encoder as claimed in claim '7, wherein in the factoring portion, the interval of the weights is set below approximately 0.1 with-in the range of weight-
9. The encoder as claimed in claim 4, wherein in the factoring portion, the interval of the weights is set to 0.1 within the range of weight.
10. The encoder as claimed in claim 4, wherein in the factoring portion, the interval of the weights is set to 0.05 within the range of weight.
1.
11. A scalable encoding method for producing an optimal weight for scaling an optimal motion vector to be applied to a low-resolution image decimated from a high-resolution image, using an 848 block DCT for dividing a video signal input by frames into 88 blocks, and performing DCT to the video signal divided; a 44 block decimator for decimating 44 blocks of video signal from the video signal DCT transformed; a 44 block quantizer for quantizing the video signal decimated; a 44 block inverse quantizer for inversely quantizing the signal q'uantized; a 1616 block divider for dividing the input video signal into 1616 blocks; and a motion vector detector for detecting a motion vector from a video signal from the 1616 block divider, a video signal from the frame memory, and a video signal from the frame memory, the method comprising the steps ofl:
(a) scaling the motion vector from the Taotion vector detector into plurality according to multiple weights within a predetermined range; (b) producing a plurality of C4 block images according to the multiple motion vectors scaled; and (c) producing an optimal weight having the best SNR by calculating it on basis of multiple predicted images and a sampled image.
12. The method as claimed in claim 11, wherein in the step (a), the range of weight for scaling the motion vector is set between 0.1 and 0.8.
13. The method as claimed in claim 12, wherein in the step (a), the interval of the weights is set below 0.1 within the range of weight.
14. The method as claimed in claim 13, wherein in the step (a), the interval of the weights is set to 0.1 within the range of weight.
31
15. The iuez:hod as claimed in claim 13, wherein in the step (a), the interval of the weights is set to 0.05 within the range of weight.
16. The method as claimed in claim 11, wherein in the tep (a), -,-he range of weight for scaling the motion vector is et between 0.3 and 0.6.
17. The method as claimed in claim 16, wherein in the step (a), the interval of the weights is set below 0-1 within the range of weight.
18. The method as claimed in claim 17, wherein in the step (a), the interval of the weights is set to 0-1 within the range of weight.
19. The method as claimed in claim 17, where-in in the step (a), the interval of the weights is set to 0-05 within the range of weight.
32
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019970065888A KR100240771B1 (en) | 1997-07-11 | 1997-12-04 | Scarable coding apparatus and method for improving function of motion vector-scaling |
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| Publication Number | Publication Date |
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| GB9727345D0 GB9727345D0 (en) | 1998-02-25 |
| GB2332113A true GB2332113A (en) | 1999-06-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9727345A Withdrawn GB2332113A (en) | 1997-12-04 | 1997-12-24 | Video encoding apparatus providing weighting signal for scaled motion vector interframe decoding |
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| Country | Link |
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| JP (1) | JP3131181B2 (en) |
| DE (1) | DE19758231C2 (en) |
| GB (1) | GB2332113A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1091592A2 (en) * | 1999-10-07 | 2001-04-11 | Matsushita Electric Industrial Co., Ltd. | Video signal encoding apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7623447B1 (en) | 2000-04-10 | 2009-11-24 | Nokia Corporation | Telephony services in mobile IP networks |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2313514B (en) * | 1993-08-03 | 1998-02-25 | Sony Uk Ltd | Motion compensated video signal processing |
| KR0185940B1 (en) * | 1996-01-11 | 1999-04-15 | 김광호 | Method for guessing a fine movement in its apparatus |
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1997
- 1997-12-24 GB GB9727345A patent/GB2332113A/en not_active Withdrawn
- 1997-12-26 JP JP36111997A patent/JP3131181B2/en not_active Expired - Fee Related
- 1997-12-30 DE DE1997158231 patent/DE19758231C2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1091592A2 (en) * | 1999-10-07 | 2001-04-11 | Matsushita Electric Industrial Co., Ltd. | Video signal encoding apparatus |
| EP1091592A3 (en) * | 1999-10-07 | 2003-05-28 | Matsushita Electric Industrial Co., Ltd. | Video signal encoding apparatus |
| US6650708B1 (en) | 1999-10-07 | 2003-11-18 | Matsushita Electric Industrial Co., Ltd. | Video signal encoding apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| DE19758231A1 (en) | 1999-06-10 |
| GB9727345D0 (en) | 1998-02-25 |
| JP3131181B2 (en) | 2001-01-31 |
| DE19758231C2 (en) | 2001-09-06 |
| JPH11187409A (en) | 1999-07-09 |
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