GB2326523A - Chemical mechanical polishing using two low pH slurries - Google Patents
Chemical mechanical polishing using two low pH slurries Download PDFInfo
- Publication number
- GB2326523A GB2326523A GB9726685A GB9726685A GB2326523A GB 2326523 A GB2326523 A GB 2326523A GB 9726685 A GB9726685 A GB 9726685A GB 9726685 A GB9726685 A GB 9726685A GB 2326523 A GB2326523 A GB 2326523A
- Authority
- GB
- United Kingdom
- Prior art keywords
- polishing
- dielectric layer
- layer
- slurry
- chemical mechanical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005498 polishing Methods 0.000 title claims description 149
- 239000002002 slurry Substances 0.000 title claims description 95
- 239000000126 substance Substances 0.000 title claims description 53
- 238000000034 method Methods 0.000 claims description 74
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical group [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 69
- 229910052721 tungsten Inorganic materials 0.000 claims description 69
- 239000010937 tungsten Substances 0.000 claims description 69
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 239000000203 mixture Substances 0.000 claims description 21
- 230000001590 oxidative effect Effects 0.000 claims description 11
- 239000002245 particle Substances 0.000 claims description 11
- 230000004888 barrier function Effects 0.000 claims description 8
- VCJMYUPGQJHHFU-UHFFFAOYSA-N iron(III) nitrate Inorganic materials [Fe+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O VCJMYUPGQJHHFU-UHFFFAOYSA-N 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052593 corundum Inorganic materials 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 2
- 229910016874 Fe(NO3) Inorganic materials 0.000 claims 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 2
- 241000206607 Porphyra umbilicalis Species 0.000 claims 1
- 230000008569 process Effects 0.000 description 18
- 239000011810 insulating material Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 239000003082 abrasive agent Substances 0.000 description 1
- 238000010669 acid-base reaction Methods 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K3/00—Materials not provided for elsewhere
- C09K3/14—Anti-slip materials; Abrasives
- C09K3/1454—Abrasive powders, suspensions and pastes for polishing
- C09K3/1463—Aqueous liquid suspensions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
CHEMICAL MECHANICAL POLISHING METHODS
USING LOW pH SLURRY MIXTURES
Background of the Invention.
1. Field of the Invention
The present invention relates to planarizing surfaces during the formation of integrated circuit devices More particularly, the present invention relates to improved methods for carrying out chemical mechanical polishing (CNtP).
2. Description of the Related Art
During the fabrication of integrated circuit devices, it is often necessary to remove material from the surface of the device at one or more stages of the fabrication process and to planarize material layers before proceeding with further processing steps. With increasing frequency, material removal and planarization are accomplished using chemical mechanical polishing (CMP). CMP processes are carried out by holding a wafer against a rotating polishing surface with a controlled pressure in the presence of a slurry. The slurry often includes both a chemically active component such as an acid or base and a mechanically active, abrasive component such as fine particles of silicon oxide. Though the exact mechanisms are poorly understood, chemical reactions and mechanical abrasion contribute to the polishing and planarization process. CMP methods have been developed for planarizing both metal layers and dielectric layers.
CMP processes may be used for polishing multiple layers in an integrated circuit device.
For example, devices such as FETs, diodes or transistors are formed in and on a substrate and then a first level of insulating material is deposited over the integrated circuit device. A pattem of contact holes or vias is defined through the first level of insulating material and, at some point in the process, the vias are filled with a conducting material to define vertical interconnects through the first level of insulating material to contact appropriate portions of the devices on the surface of the substrate. Because certain wiring line metals such as aluminum do not provide adequate fill within the vias, and
it is common to fill the vias with tungsten deposited using chemical vapor deposition (CVD). Depositing CvD tungsten into the via results in a layer of tungsten being formed over the insulating material as well as within the via through the insulating material.
After the via is filled, the layer of tungsten that overfilled the via is removed and an aluminum wiring line is deposited over the dielectric layer and over the via. The layer of tungsten may be removed using an etch back step such as reactive ion etching (ME). The RIE step, however, can overetch the tungsten and remove tungsten from within the via. This can result in poor contact between the recessed tungsten within the via and the subsequently deposited aluminum wiring
Line layer More over, Particles remaining on si wafer surface after tungsten etch back, will
be a killer of device. As an alternative to performing an etch back step, CMP processes can be used for removing excess tungsten.
For tungsten CMP, a two step process is conventionally used. In the first step, the wafer is polished at a first polishing station using a slurry having an oxidizer and a low pH to remove the excess tungsten layer from the surface of the insulating layer. The underlying insulating layer may be used as an etch stop during the first CMP step. In the second step, the wafer is moved to a second polishing station in which a high pH slurry is used to planarize and polish the insulating layer. Both steps are conventionally believed necessary because the first polishing step leaves scratches in the insulating layer which can trap contaminants and subsequently cause shorts between conductive structures. The second polishing step is used to buff the scratches out of the insulating layer. Ideally, the second polishing step is carried out so that the thickness of the removed oxide layer during the second polishing step equals the depth of the largest scratch resulting from the first metal removal step. In addition to scratches, the first polishing step may also remove a portion of the tungsten from within the via because the slurry is formulated to remove the tungsten at a greater rate than the dielectric material. The second step of polishing the dielectric layer with a slurry that is selective to the dielectric layer acts to planarize the dielectric layer and the tungsten within the via.
Fig. 1 illustrates a conventional CMP set-up. A wafer 10 is mounted to a wafer carrier 12 above a rotating platen 14. The wafer carrier 12 can exert a force on the wafer 10 and is attached to a rotating spindle 20 so that the wafer can be rotated independently of the platen 14. Polishing pad 16 is disposed on the platen 14 and polishing slurry 18 is supplied to the surface of the rotating pad. As illustrated in Fig. 2, the wafer carrier may include a chuck 22 and backing film 24. The backing film 24 is placed between the wafer 10 and the chuck 22 to provide the desired level of elasticity between the chuck 22 and the wafer 10. If the wafer 10 is held too tightly to the chuck 22, then any particles or non-planar defects in the chuck 22 will be transmitted to the wafer 10 and cause a thin spot or defect within the wafer 10. One or more polishing pads 16 may be used in order to provide the desired level of elasticity between the wafer 10 and the platen 14.
If the contact between the polishing pad and the wafer is too rigid, there is an increased risk of wafer breakage. If the polishing pad 16 is too soft, then it will deform into areas on the wafer 10 that are not intended to be polished and uneven amounts of material will be removed from the surface of the wafer. The resultant structure will have a less planar surface than desired. The polishing pad is usually kept somewhat rough, with protrusions of about 1 to 10 llm built into the pad to hold and transport the polishing slurry.
The exact mechanisms by which chemical mechanical planarization takes place are complex and poorly understood. There are numerous variables related to both the chemical and mechanical aspects of CMP. Chemistry-related factors include the slurry type, slurry pH, slurry solid content, slurry flow, and process temperature. Mechanical-related factors include polishing pressure, back pressure, platen speed, and pad type. The slurry mixture is typically either an acid or base along with an abrasive material such as silicon oxide. For polishing and removing a metal layer such as tungsten, it is conventional to use a slurry solution having an oxidizing component such as H202 and a pH of 2 to 4 in the first step of tungsten CMP. For polishing or planarizing an oxide layer in the second step of tungsten CMP, it is conventional to use an alkali based solution such as KOH with a pH of 10 to 11.5. For uniform polishing it is gene rally desirable for: (1) each point on the wafer to travel the same velocity relative to the polishing pad; (2) the polishing slurry to be uniformly distributed under the wafer; and (3) the wafer to be symmetrical.
The two steps of the process for removing the excess tungsten and buffing the underlying insulating layer are generally carried out at different polishing stations, or by switching the polishing pad between the first and second CMP steps. Because of differences between the first and second slurries used for polishing the metal and the insulator, the same pad is not used for the first and second CMP steps. If the same pad were used, problems due to pH shock and particle generation will occur because acid-base reactions take place between the first acidic slurry and the second basic slurry and precipitate undesirable particles on the pad. The need for a two step process causes the tungsten CMP process to be more time consuming, expensive and unpredictable than desired.
Summary of the Preferred Embodiments.
It is an object of the present invention to provide a simplified tungsten CMP process where, through appropriate control of selected process variables, tungsten CMP can be acceptably performed using a single polishing pad or at a single polishing station.
Embodiments of the present invention include a chemical mechanical polishing method comprising the steps of providing a semiconductor wafer including a dielectric layer and a metal layer formed over at least a portion of the dielectric layer. At least one polishing pad is provided for chemical mechanical polishing. A first slurry mixture is provided for polishing the metal layer and the metal layer is polished, leaving a surface of the dielectric layer exposed. A second slurry mixture is provided for polishing the dielectric layer and the dielectric layer is polished after the step of polishing the metal layer. The first slurry mixture and second slurry mixture each have a pH in the range of approximately 2 to approximately 4.
Embodiments also include a method for chemical mechanical polishing a component, the method comprising the steps of providing a dielectric layer and forming at least one via through the dielectric layer. A tungsten layer is formed within the via and over the dielectric layer. A first chemical mechanical polishing step to remove the tungsten layer from over the dielectric layer using a first slurry having an oxidizing component and having a pH of approximately 2 to approximately 4 is performed. A second chemical mechanical polishing step to polish the dielectric layer using a second slurry having a pH in the range of approximately 2 to approximately 4 is performed.
Embodiments also include a method for forming an integrated circuit structure including chemical mechanical polishing a tungsten layer overlying a dielectric layer, the method comprising providing a dielectric layer over a substrate, at least one via through the dielectric layer, a tungsten plug in the via and a tungsten layer over at least a portion of the dielectric layer.
A first slurry includes abrasive particles and has a pH of approximately 2 to approximately 4. A second slurry includes abrasive particles and has a pH of approximately 2 to approximately 4. A polishing pad on a chemical mechanical polishing apparatus is provided. A first chemical mechanical polishing step is performed using the first slurry to remove the tungsten layer from over the dielectric layer. A second chemical mechanical polishing step is performed using the second. slurry to polish the dielectric layer. The first and second chemical mechanical polishing steps are carried out on the polishing pad.
Brief Description of the Drawings.
Embodiments of the present invention are described with reference to the accompanying drawings which, for illustrative purposes, are schematic and are not drawn to scale, where:
Fig. 1 illustrates a perspective view of a conventional chemical mechanical polishing apparatus.
Fig. 2 illustrates a cross-sectional view of a conventional chemical mechanical polishing apparatus.
Figs. 3-10 illustrate steps in the formation of a structure including chemical mechanical polishing according to embodiments of the present invention.
Detailed Description of the Preferred Embodiments.
- Conventional tungsten CMP technology includes a multi-step process using a first slurry for removing excess tungsten from over a dielectric layer, and a second slurry for polishing or buffing the scratches from the underlying dielectric layer that were formed during the tungsten polishing step. Conventional methods must use two different polishing pads for the different slurries, which generally means two different polishing stations, one set up with a pad and slurry for removing the tungsten, and a second set up with a different pad and different slurry for polishing the underlying dielectric layer. The first slurry conventionally has a pH in the range of 2 to 4. The second slurry conventionally has a pH in the range of 10 to 11.5. The need to use two different polishing pads or stations causes the tungsten CMP process to be slower than desired.
Embodiments of the present invention include a CMP process in which the same polishing pad can be used for polishing the excess tungsten and the underlying dielectric after the excess tungsten has been removed. The present inventors have found that a first slurry for removing the tungsten and a second slurry for polishing the underlying insulating layer may be used one after the other on the same polishing pad by forming first and second slurries that both have similar, low pH values. Conventional methods must use two pads, which generally means two different polishing stations, one set up with a pad and slurry for removing the tungsten, and a second set up with a different pad and different slurry for polishing the underlying insulating layer. The first slurry conventionally has a pH in the range of2 to 4. The second slurry conventionally has a pH in the range of 10 to 1 1.5. Preferred embodiments of the present invention include first and second slurries for polishing tungsten and polishing oxide, respectively, each having a pH in the range of approximately 2 to approximately 4.
In preferred embodiments of the present invention, certain parameters relating to the particle size in the slurry, the specific gravity of the slurry mixture, the hardness and the compressibility of the polishing pad are controlled to limit the level of scratching that occurs in the tungsten polishing process. Applicants have found that careful control of the pH of the slurry mixtures can eliminate the need to use separate polishing stations for the tungsten and oxide polishing steps. Preferred embodiments of the present invention utilize low pH slunies for the excess tungsten removal step and for the insulating layer polishing step in a tungsten CMP process. For example, a slurry including H20, Al203 abrasive particles, and Fe(NO3)3 as an oxidizing component may be used for the first slurry. The Fe(NO3)3 may be present in an amount of approximately 5 to approximately 10 wt. percent of the slurry mixture. Other
oxidizing components such as KlO3ay also be used. A preferred low pH slurry for the insulating layer polishing step is supplied by Solution Technology, Inc., of North Carolina, under the product name Klebsol, which has a pH in the range of approximately 2 to approximately 4.
An example of an embodiment of the present invention includes the formation of a wafer including structures having a first level wiring line, an interlevel dielectric layer deposited over the wiring line, a via formed through the interlevel dielectric layer to expose a portion of the first level wiring line, and a metal deposited into the via to form a vertically extending interconnect or "plug." A second level of wiring lines is then formed over the interlevel dielectric layer, with the plug connecting the first level wiring line to other conductors in the circuit. The interlevel dielectric layer provided between wiring line layers is often an oxide material deposited using atmospheric pressure chemical vapor deposition (APCVD) or plasma-enhanced chemical vapor deposition (PECYD) with a TEOS precursor gas. As illustrated in Fig. 3, the structure includes interlevel dielectric layer 32 over first wiring line layer 30. Contact vias 34 are formed through the dielectric layer 32. A barrier or adhesion layer 36 is preferably deposited over the dielectric layer 32 and within the vias 34, as illustrated in Fig. 4. Preferably the barrier layer 36 is formed from titanium or titanium nitride. A tungsten plug 38 is then formed within the vias 34 and over
the dielectric layer 32, as illustrated in Fig. 5. The tungsten plug 38 may be formed by CVD of
tungsten using WF6 as a source gas.
After tungsten deposition, the wafer is transported to a CMP station and the excess
tungsten 38 is brought into contact with a first slurry mixture 42 on a polishing pad 44, as illustrated in Fig. 6. The slurry mixture 42 has a pH in the range of2 to 4 and includes an oxidizing component for oxidizing the tungsten. The CMP is performed to remove the excess tungsten metal from the surface of the oxide layer 32. This first CMP step may result in the formation of scratches 46 being present in the underlying oxide layer 32, as illustrated in Fig. 7.
The first CMP step may also remove a portion of the tungsten 38 frorn within the vias, due to the selectivity of the first slurry towards tungsten. A second CMP step is then carried out by stopping the supply of the first slurry to the polishing pad 44 and initiating supply of a second slurry 48 for polishing the oxide layer 32 including the scratches 46, as illustrated in Fig. 8. The second slurry 48 has a pH in the range of2 to 4 to avoid pH shock as the second slurry is introduced to the polishing pad. The second CMP step preferentially polishes the oxide layer, removing scratches 46 and yielding a planar surface as illustrated in Fig. 9.
After the CMP steps are complete, the barrier layer 36 will have been removed and a second barrier layer 50 is preferably deposited over the oxide layer 32. A conducting layer 52 such as aluminum is then deposited over the second barrier layer 50 and in electrical contact with the plug 38 to form a second level wiring line layer, as illustrated in Fig. 10. Patterning of the aluminum layer and the barrier layer may be performed in the conventional manner to form second level wiring lines.
The processes described herein are compatible with a range of different materials used in integrated circuit devices. While the present invention has been described in terms of a particular type of layered structure and a particular wiring line structure, this should be understood as generically referring to a structure formed on a substrate. The method does not require the presence of a via or that alternate layers be conducting and insulating materials, although certain aspects of the present invention will find their most preferred application to such structures.
Those of ordinary skill in the art will appreciate that various modifications and alterations to the embodiments described herein might be made without altering the basic function of the present invention. Accordingly, the scope of the present invention is not limited to the particular embodiments described herein; rather, the scope of the present invention is to be determined from the following claims.
Claims (19)
1. A chemical mechanical polishing method comprising the steps of:
providing a semiconductor wafer including a dielectric layer and a metal layer formed over at least a portion of the dielectric layer;
providing at least one polishing pad for chemical mechanical polishing;
providing a first slurry mixture for polishing the metal layer and polishing the metal layer, leaving a surface of the dielectric layer exposed; and
providing a second slurry mixture for polishing the dielectric layer and polishing layer after the step ofpolishing the metal layer,
wherein the first slurry mixture and second slurry mixture each have a pH in the range of approximately 2 to approximately 4.
2. The method of claim 1, wherein a single polishing pad is used for polishing through at least a portion of the metal layer and for polishing the dielectric layer.
3. The method of claim 2, wherein the step of polishing the dielectric layer is carried out immediately after the step of polishing the metal layer.
4. The method of claiin 1, wherein the first slurry includes an oxidizing component and has a pH in the range of 2 to 4.
5. The method of claim 1, wherein the first slurry includes water, Fe(NO3)3, and
A120,.
6. The method of claim 1, wherein the first slurry includes a component selected from the group consisting of Fe(NO3)3 and KIO3.
7. The method of claim 1, wherein the first slurry includes H2O2.
8. The method of claim 4, wherein the second slurry includes an oxide etchant and has a pH in the range of 2-4.
9. The method of claim 1 wherein the metal layer is tungsten.
10. A method for chemical mechanical polishing a component, the method compnsing the steps of:
providing a dielectric layer;
forming at least one via through the dielectric layer;
forming a tungsten layer within the via and over the dielectric layer;
performing a first chemical mechanical polishing step and removing the tungsten layer from over the dielectric layer using a first slurry having an oxidizing component and having a pH of approximately 2 to approximately 4; and
performing a second chemical mechanical polishing step and polishing the dielectric layer using a second slurry having a pH in the range of approximately 2 to approximately 4.
11. The method of claim 10, wherein the first and second CMP steps are performed on the same polishing pad.
12. The method of claim 10, wherein the first and second slurries each have a pH in the range of2 to 4.
13. The method of claim 10, further comprising forming a conducting layer over the dielectric layer after polishing the dielectric layer.
14. The method of claim 13, wherein the conducting layer includes a barrier layer and a metal wiring line layer.
15. The method of claim 10, wherein the first slurry includes a component selected from the group consisting of Fe(NO3), and KIO3.
16. A method for forming an integrated circuit structure including chemical mechanical polishing a tungsten layer overlying a dielectric layer, the method comprising:
providing a dielectric layer over a substrate;
providing at least one via through the dielectric layer;
providing a tungsten plug in the via and a tungsten layer over at least a portion of the dielectric layer;
providing a first slurry including abrasive particles and having a pH of approximately 2 to approximately 4;
providing a second slurry including abrasive particles and having a pH of approximately 2 to approximately 4;
providing a polishing pad on a chemical mechanical polishing apparatus;
performing a first chemical mechanical polishing step on the polishing pad using the first slurry to remove the tungsten layer from over the dielectric layer; and
performing a second chemical mechanical polishing step on the polishing pad using the second slurry to polish the dielectric layer.
17. The method of claim 16, wherein the first slurry is supplied to the polishing pad during the first chemical mechanical polishing step and is not supplied to the-polishing pad during the second chemical mechanical polishing step, and wherein the second slurry is supplied to the first polishing pad during the second chemical mechanical polishing step and is not.
supplied to the polishing pad during the first chemical mechanical polishing step.
18. A chemical mechanical polishing method, substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of
Figs. 3 to l() oL the accompanying drawings
19. A method for chemical mechanical polishing a component. substantially as hereinbefore described with reference to and/or as illustrated in any one ot or any combination of Figs. 3 to 10 of the accompanying drawings.
2(). A method for forming an integrated circuit structure. substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of Figs. 3 to 1() of the accompanying drawings.
18. The method of claim 17, wherein the first and second chemical mechanical polishing steps are carried out consecutively.
19. The method of claim 16, further comprising depositing a conducting layer over the dielectric layer and on the tungsten plug after the first and second chemical mechanical polishing steps.
20. The method of claim 16, wherein the first and second slunies each have a pH of 2 to 4, and filrther comprising the step of forming a wiring line layer over the dielectric layer and in electrical contact with the tungsten plug.
21. A chemical mechanical polishing method, substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of
Figs. 3 to 10 of the accompanying drawings.
22. A method for chemical mechanical polishing a component, substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of Figs. 3 to 10 of the accompanying drawings.
23. A method for forming an integrated circuit structure, substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of Figs. 3 to 10 of the accompanying drawings.
Amendments to the claims have been filed as follows A A chemical mechnicil polishing method comprising the steps of: providing a scmiconductor wafer including a dielectric layer and a metal layer formed over at least a portion ol the dielectric layer:
providing at least one polishing pad for chemical mechanical polishing:
providing a first slurry mixture having an oxidizing component:
polishing the metal layer using said first slurry mixture leaving a surface oi the dielectric layer exposed: and
providing a second slurry mixture including an oxide etchant for polishing the dielectric layer;
polishing the dielectric layer using said second slurry mixture after the step ot polishing the metal layer:
wherein the first slurry mixture and second slurry mixture each have a pH in the range of 2 to 4.
2. The method of claim 1. wherein a single polishing pad is used for polishing through at least a portion of the metal layer and for polishing the dielectric layer.
The method of claim 2 wherein the step of polishing the dielectric layer is carried out immediately after the step ol polishing the metal layer.
4. The method of claim 1. wherein the first slurry includes water, Fe(NO3);, and Al2O3.
5. The method of claim 1. wherein the first slurry includes a component selected from the group consisting of Fe(NO3)3 and KIO;.
6. The method of claim 1. wherein the first slurry includes H,O,.
7. The method of claim 1 wherein the metal layer is tungsten.
X. A method of chemical mechanical polishing a component. the method comprising the steps of:
providing a dielectric layer; forming at least one vii through the dielectric layer:
forming a tungsten layer within the via and over the dielectric layer:
performing a first chemical mechanical polishing step and removing the tungsten layer from over the dielectric layer using a first slurry having an oxidizing component and having a pH of 2 to 4: and
performing a second chemical mechanical polishing step and polishing the dielectric layer using a second slurrv including an oxide etchant and having a pH in the range of 2 to 4.
9. The method of claim 8. wherein the first and second CMP steps are performed on the same polishing pad.
10. The method of claim S. further comprising forming a conducting layer over the dielectric layer after polishing the dielectric layer.
11. The method of claim 10 wherein the conducting layer includes a barrier layer and a metal wiring line layer.
12. The method of claim 8. wherein the first slurry includes a component selected from the group consisting of Fe(NO3)3 and KlO3.
13. A method for forming an integrated circuit structure including chemical mechanical polishing a tungsten layer overlying a dielectric laver, the method comprising:
providing a dielectric layer over a substrate;
providing at least one via through the dielectric layer:
providing a tungsten plug in the via and a tungsten layer over at least a portion of the dielectric layer;
providing a First slurry including an oxidizing component. ( r;lsivc particlcs and having a pH (rt 2 lo 4;
providing a second slurry including an oxide etchant abrasive particles and having a pH of 2 to 4;
providing a polishing pad on a chemical mechanical polishing apparatus; pcrforming a first chemical mechanical polishing step on the polishing pad using the first slurry Lo remove the tungsten layer from over the diclcctric layer; and performing a second chemical mechanical polishing step on the polishing pad using the second slurry to polish the dielectric layer.
14. The method of claim 13, wherein the first slurry is supplied to the polishing pad during the first chemical mechanical polishing step and is not supplied to the polishing pad during the sccond chemical mechanical polishing stcp. and wherein the second slurry is supplied to the polishing pad during the second chemical mechanical polishing step and is not supplied to the polishing pad during the first chemical mechanical polishing step.
15. The method of claim 14, wherein the first and second chemical mechanical polishing steps are carried out consecutively.
16. The method of claim 13, further comprising depositing a conducting layer over the dielectric layer and on the tungsten plug after the first and second chemical mechanical polishing steps.
17. The method of claim 13, further comprising the step of forming a wiring line layer over the dielectric layer and in electrical contact with the tungsten plug.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/976,605 US6362101B2 (en) | 1997-11-24 | 1997-11-24 | Chemical mechanical polishing methods using low pH slurry mixtures |
JP9346644A JPH11186200A (en) | 1997-11-24 | 1997-12-16 | Chemically/mechanically polishing method using slurry mixture of low ph value |
GB9726685A GB2326523B (en) | 1997-11-24 | 1997-12-17 | Chemical mechanical polishing methods using low ph slurry mixtures |
NL1007819A NL1007819C2 (en) | 1997-11-24 | 1997-12-17 | Chemical mechanical polishing methods using low pH slurry mixtures. |
DE19757119A DE19757119A1 (en) | 1997-11-24 | 1997-12-20 | Chemical mechanical polishing of tungsten@ via plugs |
FR9716332A FR2772986B1 (en) | 1997-11-24 | 1997-12-23 | CHEMICAL MECHANICAL POLISHING PROCESS USING LOW PH SUSPENSIONS |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/976,605 US6362101B2 (en) | 1997-11-24 | 1997-11-24 | Chemical mechanical polishing methods using low pH slurry mixtures |
JP9346644A JPH11186200A (en) | 1997-11-24 | 1997-12-16 | Chemically/mechanically polishing method using slurry mixture of low ph value |
GB9726685A GB2326523B (en) | 1997-11-24 | 1997-12-17 | Chemical mechanical polishing methods using low ph slurry mixtures |
FR9716332A FR2772986B1 (en) | 1997-11-24 | 1997-12-23 | CHEMICAL MECHANICAL POLISHING PROCESS USING LOW PH SUSPENSIONS |
NL1007897A NL1007897C1 (en) | 1997-12-24 | 1997-12-24 | Tensioning device for fabric cover on road vehicle |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9726685D0 GB9726685D0 (en) | 1998-02-18 |
GB2326523A true GB2326523A (en) | 1998-12-23 |
GB2326523B GB2326523B (en) | 1999-11-17 |
Family
ID=27515630
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9726685A Expired - Fee Related GB2326523B (en) | 1997-11-24 | 1997-12-17 | Chemical mechanical polishing methods using low ph slurry mixtures |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2326523B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2342060A (en) * | 1998-06-25 | 2000-04-05 | Unova Uk Ltd | Wafer edge polishing |
WO2000059031A1 (en) * | 1999-03-29 | 2000-10-05 | Speedfam-Ipec Corporation | Two-step chemical-mechanical planarization for damascene structures on semiconductor wafers |
GB2348618A (en) * | 1999-01-18 | 2000-10-11 | Tokyo Seimitsu Co Ltd | Polishing multi-layer semiconductor components |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5516346A (en) * | 1993-11-03 | 1996-05-14 | Intel Corporation | Slurries for chemical mechanical polishing |
-
1997
- 1997-12-17 GB GB9726685A patent/GB2326523B/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5516346A (en) * | 1993-11-03 | 1996-05-14 | Intel Corporation | Slurries for chemical mechanical polishing |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2342060A (en) * | 1998-06-25 | 2000-04-05 | Unova Uk Ltd | Wafer edge polishing |
GB2342060B (en) * | 1998-06-25 | 2001-03-07 | Unova Uk Ltd | Wafer edge polishing method and apparatus |
GB2348618A (en) * | 1999-01-18 | 2000-10-11 | Tokyo Seimitsu Co Ltd | Polishing multi-layer semiconductor components |
WO2000059031A1 (en) * | 1999-03-29 | 2000-10-05 | Speedfam-Ipec Corporation | Two-step chemical-mechanical planarization for damascene structures on semiconductor wafers |
GB2363680A (en) * | 1999-03-29 | 2002-01-02 | Speedfam Ipec Corp | Two-step chemical-mechanical planarization for damascene structures on semiconductor wafers |
Also Published As
Publication number | Publication date |
---|---|
GB2326523B (en) | 1999-11-17 |
GB9726685D0 (en) | 1998-02-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6261158B1 (en) | Multi-step chemical mechanical polishing | |
US5913712A (en) | Scratch reduction in semiconductor circuit fabrication using chemical-mechanical polishing | |
KR100399877B1 (en) | Chemical-mechanical polishing of thin materials using pulse polishing technology | |
EP1011131B1 (en) | Methods for enhancing the metal removal rate during the chemical-mechanical polishing process of a semiconductor | |
US6423640B1 (en) | Headless CMP process for oxide planarization | |
US6110820A (en) | Low scratch density chemical mechanical planarization process | |
KR100348097B1 (en) | A method of polishing a surface of a substrate, a method of manufacturing a semiconductor device, and an apparatus of manufacturing the same | |
US5702563A (en) | Reduced chemical-mechanical polishing particulate contamination | |
US6720265B2 (en) | Composition compatible with aluminum planarization and methods therefore | |
EP0926715B1 (en) | Chemical mechanical polishing for isolation dielectric planarization | |
KR20010052820A (en) | A technique for chemical mechanical polishing silicon | |
US6858540B2 (en) | Selective removal of tantalum-containing barrier layer during metal CMP | |
WO2007002915A2 (en) | Slurry for chemical mechanical polishing of aluminum | |
US5752875A (en) | Method of chemically-mechanically polishing an electronic component | |
US20060261041A1 (en) | Method for manufacturing metal line contact plug of semiconductor device | |
US20030168169A1 (en) | Chemical-mechanical polishing apparatus, polishing pad and method for manufacturing semiconductor device | |
US20020173221A1 (en) | Method and apparatus for two-step polishing | |
US6362101B2 (en) | Chemical mechanical polishing methods using low pH slurry mixtures | |
US5906949A (en) | Chemical-mechanical polishing process | |
WO1999051398A1 (en) | Apparatus and methods for slurry removal in chemical mechanical polishing | |
US20220384245A1 (en) | Methods of Forming an Abrasive Slurry and Methods for Chemical-Mechanical Polishing | |
US20060088999A1 (en) | Methods and compositions for chemical mechanical polishing substrates | |
US6634930B1 (en) | Method and apparatus for preventing metal corrosion during chemical mechanical polishing | |
GB2326523A (en) | Chemical mechanical polishing using two low pH slurries | |
US20040152325A1 (en) | Chemical mechanical polishing method, and washing/rinsing method associated therewith |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20091217 |