GB2310289A - Testing electrical devices - Google Patents

Testing electrical devices Download PDF

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Publication number
GB2310289A
GB2310289A GB9603399A GB9603399A GB2310289A GB 2310289 A GB2310289 A GB 2310289A GB 9603399 A GB9603399 A GB 9603399A GB 9603399 A GB9603399 A GB 9603399A GB 2310289 A GB2310289 A GB 2310289A
Authority
GB
United Kingdom
Prior art keywords
test
test circuitry
circuitry according
environment
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9603399A
Other versions
GB9603399D0 (en
GB2310289B (en
Inventor
Stephen Paul Maslen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TEST IND PLC
Original Assignee
TEST IND PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TEST IND PLC filed Critical TEST IND PLC
Priority to GB9603399A priority Critical patent/GB2310289B/en
Publication of GB9603399D0 publication Critical patent/GB9603399D0/en
Publication of GB2310289A publication Critical patent/GB2310289A/en
Application granted granted Critical
Publication of GB2310289B publication Critical patent/GB2310289B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2839Fault-finding or characterising using signal generators, power supplies or circuit analysers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2839Fault-finding or characterising using signal generators, power supplies or circuit analysers
    • G01R31/2841Signal generators

Description

TITLE: Method and Apparatus for Testing Electrical Devices Field of the Invention This invention relates generally to a method and apparatus for testing electrical devices, which may be constituted by single components or by circuits incorporating a plurality of components, and more specifically to the testing of such devices under a range of different electrical/electronic environments.
Background of the Invention When electrical/electronic components and circuits are being designed, evaluated or manufactured to a quality standard, there is a requirement to provide a well-defined electrical/electronic environment around the component or circuit to be tested, such that its performance can be judged under known and repeatable conditions. The test environment may be laid out in a specification document which may be of international, national origin.
As a particular example in the telecommunications industry, the testing of certain products during design approval and production quality assurance, requires the application of a great many feeding arrangements (electrical/electronic environments). The range of test conditions may also vary further to take account of different national or regional requirements that might apply to a product before it can be approved for, or functions correctly in different countries around the world.
An electrical/electronic environment may consist of voltage/current sources, resistive and reactive feeds accompanied by resistive and reactive loads along with other circuit elements. Conventional components to provide such environments, e.g. power voltage/current feeds, resistors, capacitors and inductors may be physically large, difficult to manufacture if high tolerances are required, expensive for unusual specialist parts and inconvenient to produce if the environment is particularly complex. Where many different specific environments are needed to satisfy a primary test specification and then where a number of different (typically international) specifications have to be met, the inconvenience, cost and physical size means that only a minority of potential manufacturers or test laboratories could consider providing even a modest range of test environments.
A typical environment for a product can be generally represented in the manner shown in Figure 1 of the accompanying drawings. Here the product is designated by load ZL and the environment is defined by Vs, Z1 and Z2, where Z1 and Z2 may be individual components or complex circuits and Vs is the supply voltage and may consist of a fixed dc level and timevarying ac levels. Substitution of many different physical voltage sources and many different physical components to represent Z1 and Z2 so as to cover a wide range of possible test conditions, is very time consuming and expensive and in many instances impractical.
An aim of the present invention is to provide a solution to this problem.
The Invention According to the present invention, in its broadest aspect, there is provided electrical test circuitry comprising an electrical/electronic environment generator capable of simulating a range of different environmental conditions for a product under test, a test signal generator for stimulating the product under test, a measuring device for receiving signals from the product under test, and a feedback circuit from the measuring device to the signal generator for controlling at least one parameter of the stimulating signal.
The invention will be best understood by further reference to Figure 1. Although in practice there can exist various configurations of the load (product) and its environment, Figure 1 shows a general single-ended feed of a load ZL from a voltage source Vs and a source impedance Z1. The load ZL is shunted with an impedance Z2. The general equations that relate the load current and load voltage are then derived as follows.
The equations that govern the circuit behaviour are: VL= Vs-ia*Zl ............ (1) VL=ib*Z2 ..............,. (2) ia=ib+iL ................ (3) Re-arranging 1, gives ia=Vs/Zl - VL/Z1 .... (4) Re-arranging 2, gives ib=VL/Z2 ............ (5) Substituting into 3 gives:iL=Vs/Z1 - VL/Z1 - VL/Z2 ... (6) Re-arranging 6, gives iL=Vs/Zl - VL1/Zl + l/Z2] ......... (7) or VL=Vs*Z2/[Z1+Z2] - iL*Z1*Z2/[Z1+Z2] . (8) Thus if the load current (iL) can be measured and Z1 and Z2 are known, it is possible to calculate VL and apply that voltage to the load ZL. Given that this feedback technique is stable, the resulting system will behave in an identical way to the desired environment. The prime benefit in the invention is that the original networks of Z1 and Z2 can be replaced by a processing element which calculates the function. This may be easily adjustable, especially if it is defined in software, and removes the need to have a wide range of physically large, expensive fixed components.
An alternative method employing equation 7 applies a current to the load by measuring VL and calculates the accompanying transfer functions.
In preferred practice of the invention, the environment generator or synthesisor comprises a power amplifier and a computational means incorporating an algorithm based on equation 6 or a corresponding equation derivable for other configurations of the product and its environment, which computational means receives measurement signals from the measuring device.
In other words, by use of a simple power amplifier fed with simple measurements, and use of a computational element with a suitable mathematical algorithm it is possible to synthesis the environment around the load ZL. Thus, all the conventional components that make up Z1, Z2 and Vs can be replaced by a general purpose amplifier and a computational element with an appropriate mathematical function. By choosing various mathematical functions (which may be in the form of a software program), it is practical to synthesise an environment of choice, without the need for any physical circuit changes.
The invention thus makes possible the provision of test platforms of great versatility without the need for the many and varied physical components previously required.
A preferred arrangement, in more detail, comprises: (1) A power amplifier or amplifiers, to provide a well defined signal or signals at any instant in time.
Two arrangements are possible, both of which are equally satisfactory. Either a) an amplifier or amplifiers which provides a specified voltage or voltages at any instant; or b) an amplifier or amplifiers which provides a specified current or currents at any instant, its being well known that any voltage feed circuit can be transformed into its equivalent current feed circuit.
2) Means for measurement of: either a) load current(s) if an amplifier(s) providing specified voltage(s) is used, or b) load voltage(s) if an amplifier(s) providing specified current(s) is used.
In each case the LOAD is represented by the product under test.
3) A computational element.
This may be analogue or digital and be microprocessor based; a microcontroller; a DSP (digital signal processor) or any other suitable device/system. The computational element should incorporate, as hardware or software or both, a suitable algorithm which can take the measured readings and together with a knowledge of the environment to be synthesised, control the power amplifier(s) such that the correct environment around the load (product under test), is correctly synthesised.
The algorithm may be derived by manipulating the equations for the voltage across, and the current through, the unknown load, thereby to derive an expression which relates these two quantities as a function of the fixed environment i.e. source impedances, load impedances and applied feed voltage.
In operation one of the quantities is measured and using the algorithm which defines the particular environment, the other quantity is computed. The feedback circuit ensures that at all times the computed quantity is achieved in the actual circuit by applying that computed value to the load by means of the amplifier(s).
Test circuitry in accordance with the invention will be now be further described with reference to the accompanying drawings, in which: Figure 2 and 3 are circuit diagrams for illustrating the principle of the invention; Figure 4 and 5 are practical circuit diagrams representing this possible embodiment of the invention.
General overview of the circuit arrangements, shown in the drawings In the circuit of Figure 2, the load current is measured by the parts referenced V2 and F1. This current is applied to the four components R7, R8, C3 and L3 which perform the function Zl*Z2/[Zl+Z2). The resulting signal is applied to one input of the summing amplifier "SUM2", the gain at the K1 input being negative as required by the equation. The feed voltage Vs is applied to R4, K2, C2 and R5 which perform the function 22/[21+22]. Again, the resulting signal is applied to the summing amplifier. The output of the summing amplifier produces the load voltage VL to be applied to the load ZL which represents the product under test.
The lower circuit in Figure 2 serves to demonstrate the principle of the invention. The conventional feed arrangement is shown at the top of Figure 2 for comparison purposes.
Figure 3 shows a system form of the Figure 2 circuit, and the Figure 3 diagram is functionally identical. However, the filter functions that were made up of resistors, capacitors and inductors have been replaced with integrator and summing function blocks. Some minor manipulation has been carried out to simplify the arrangement and sum the two parts of the equation in a different place. The circuit of Figure 3 is ideal for mathematical analysis relating to the underlying principle of the invention.
Figure 4 shows how the invention can be realised in hardware.
Again the diagram is functionally identical. However the integrators and summing blocks are now constituted, by operational amplifiers and associated components. Although somewhat complex the circuit has some substantial advantages compared to the prior art in that: - All the components are low cost - All the components together are only a fraction of the weight and size of the 10H choke necessary in the prior art.
- By varying a few of the resistors either manually or by program control, it is possible to get a wide variety of feed conditions - Very accurate synthesis of feed circuits is possible - No high voltage capacitors or high current inductors are needed.
A possible limitation is that if the required feed circuit (the environment) is more complex than two resistors, a choke and a capacitor, the resulting analogue processing block would require many more amplifier stages and circuit instability may be a problem.
Finally, Figure 5 shows a practical circuit incorporating Digital Signal Processing, which replaces all the filtering functions. It is generally well understood that DSP can provide cheaper, more accurate, more complexed, more space efficient filtering than analogue filters as well as infinitely reconfigurable filtering.

Claims (13)

1. An electrical test circuitry comprising an electrical/electronic environment generator capable of simulating a range of different environmental conditions for a product under test, a test signal generator for simulating the product under test, a measuring device for receiving signals from the product under test, and a feedback circuit from the measuring device to the signal generator for controlling at least one parameter of the simulating signal.
2. A test circuitry according to claim 1 in which the environment generator or synthesiser comprises at least one power amplifier and a computational means incorporating an algorithm based on equation 6 as herein defined, or on a corresponding equation derivable for other configurations of the product and its environment, which computational means receives measurement signals from the measuring device.
3. A test circuitry according to claim 2 in which the power amplifier provides a specified voltage at any instant.
4. A test circuitry according to claim 2 in which the amplifier provides a specified current at any instant, it being well known that any voltage feed circuit can be transformed into its equivalent current feed circuit.
5. A test circuitry according to claim 3 in which the measuring device measures the current of the load represented by the product under test, where an amplifier providing a specified voltage is used.
6. A test circuitry according to claim 4 in which the measuring means measures the voltage of the load represented by the product under test, where an amplifier providing a specified current is used.
7. A test circuitry according to claim 2 in which the computational means is an analogue or digital element and is microprocessor based.
8. A test circuitry according to any one of claims 2 to 7 in which the computational means is a microcontroller, a DSP (digital signal processor) or any other suitable device/system.
9. A test circuitry according to claim 8 in which the computational element incorporates as hardware and/or software a suitable algorithm which takes the measured readings and, together with a knowledge of the environment to be synthesised, controls the power amplifier(s) such that the correct environment around the load (product under test) is correctly synthesised.
10. A test circuitry according to claim 9 in which the algorithm is derived by manipulating the equations for the voltage across, and the current through, the unknown load, thereby to derive an expression which relates these two quantities as a function of the fixed environment i.e. source impedances, load impedances and applied feed voltage.
11. A method of testing electrical devices using test circuitry according to claim 10 in which in operation one of the quantities is measured and using the algorithm which defines the particular environment, the other quantity is computed.
12. An electrical test circuitry for testing electrical devices, substantially as herein described with reference to, and as illustrated in the accompanying drawings.
13. A method of testing electrical devices, substantially as herein described with reference to, and as illustrated in the accompanying drawings.
GB9603399A 1996-02-17 1996-02-17 Method and apparatus for testing electrical devices Expired - Fee Related GB2310289B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9603399A GB2310289B (en) 1996-02-17 1996-02-17 Method and apparatus for testing electrical devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9603399A GB2310289B (en) 1996-02-17 1996-02-17 Method and apparatus for testing electrical devices

Publications (3)

Publication Number Publication Date
GB9603399D0 GB9603399D0 (en) 1996-04-17
GB2310289A true GB2310289A (en) 1997-08-20
GB2310289B GB2310289B (en) 2000-09-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB9603399A Expired - Fee Related GB2310289B (en) 1996-02-17 1996-02-17 Method and apparatus for testing electrical devices

Country Status (1)

Country Link
GB (1) GB2310289B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0656542A2 (en) * 1993-12-02 1995-06-07 Fluke Corporation Impedance synthesizer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0656542A2 (en) * 1993-12-02 1995-06-07 Fluke Corporation Impedance synthesizer

Also Published As

Publication number Publication date
GB9603399D0 (en) 1996-04-17
GB2310289B (en) 2000-09-06

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20090217