GB2306251A - Electroluminescent devices - Google Patents

Electroluminescent devices Download PDF

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Publication number
GB2306251A
GB2306251A GB9624268A GB9624268A GB2306251A GB 2306251 A GB2306251 A GB 2306251A GB 9624268 A GB9624268 A GB 9624268A GB 9624268 A GB9624268 A GB 9624268A GB 2306251 A GB2306251 A GB 2306251A
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United Kingdom
Prior art keywords
tfel
mosfet
active
addressing
dopant
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Granted
Application number
GB9624268A
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GB9624268D0 (en
GB2306251B (en
Inventor
Robert Stevens
Wayne Mark Cranton
Clive Barrington Thomas
Ian Peter Mcclean
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ULTRA SILICON TECHN UK Ltd
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ULTRA SILICON TECHN UK Ltd
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Priority claimed from GB9416731A external-priority patent/GB9416731D0/en
Priority claimed from GBGB9506328.5A external-priority patent/GB9506328D0/en
Application filed by ULTRA SILICON TECHN UK Ltd filed Critical ULTRA SILICON TECHN UK Ltd
Priority to GB9624268A priority Critical patent/GB2306251B/en
Publication of GB9624268D0 publication Critical patent/GB9624268D0/en
Publication of GB2306251A publication Critical patent/GB2306251A/en
Application granted granted Critical
Publication of GB2306251B publication Critical patent/GB2306251B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/14Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material, or by the simultaneous addition of the electroluminescent material in or onto the light source
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K11/00Luminescent, e.g. electroluminescent, chemiluminescent materials
    • C09K11/08Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials
    • C09K11/57Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials containing manganese or rhenium
    • C09K11/572Chalcogenides
    • C09K11/574Chalcogenides with zinc or cadmium
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09KMATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K11/00Luminescent, e.g. electroluminescent, chemiluminescent materials
    • C09K11/08Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials
    • C09K11/77Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials containing rare earth metals
    • C09K11/7743Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials containing rare earth metals containing terbium
    • C09K11/7744Chalcogenides
    • C09K11/7745Chalcogenides with zinc or cadmium
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/18Light sources with substantially two-dimensional radiating surfaces characterised by the nature or concentration of the activator
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B44/00Circuit arrangements for operating electroluminescent light sources
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0823Several active elements per pixel in active matrix panels used to establish symmetry in driving, e.g. with polarity inversion
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A TFEL device utilising a luminescent dopant concentration > 0.5 Wt%, such that high intensity operation may be realised via high frequency drive signals is disclosed. The radiation decay time resulting from Mn doping at such concentration is less than that for conventional devices. The optimum level of Mn doping in ZnS at > 0.5 Wt% is determined by a combination of high intensity response 4 and short decay times response 6. Devices with these levels of Mn concentration may by driven at frequencies required for active matrix addressing. The dopant may alternatively be terbium fluoride or terbium.

Description

IMPROVEMENTS IN AND RELATING TO ELECTROLUMINESCENT DEVICES The present invention relates to electroluminescent devices, in particular an improved TFEL (Thin Film Electroluminescent Device) capable of high intensity light emission facilitated by a high frequency ( > 5KHz) drive signal. Applications include both display and electrographic printing.
TFEL devices can be operated either on the refresh principle, or by active matrix addressing.
Active matrix addressing may employ a frequency greater than approximately 5 kHz, which is much greater than the refresh rate of TFELs operated on the refresh addressing principle.
Active matrix addressing may be accomplished by addressing each pixel of a TFEL array by its own cell of MOS transistors, from the appropriate MOS technology.
Refresh operated TFEL devices commonly employ in the phosphor layer optimum dopant concentrations of the order of 0.5Wt%, beyond which the intensity of emission falls off rapidly. When operated at higher frequencies such as those used in active matrix addressing, the Applicants have found that there is no such limitation on the dopant concentration, and the intensity continues to increase as the dopant concentration increases.
It is therefore one aim of the present invention to provide an electroluminescent device, for operation at frequencies corresponding to those used in active matrix addressing, which has improved luminous efficiency.
According to a first aspect of the present invention there is provided an electroluminescent device for operation at frequencies in excess of 5KHZ, the device including a phosphor layer incorporating an active luminescent dopant wherein the concentration of the active luminescent dopant is greater than 0.5 Wt%.
Preferably, the dopant concentration falls within the range 0.5 Wt% to 5 Wt%, and more particularly within the range 0.5 Wt% to 1 Wt%.
Preferably, the active phosphor layer is Zinc Sulphide doped with Manganese, or either terbium fluoride or terbium.
Conveniently, the device is capable of operation using active matrix addressing, and for this purpose it is preferably fabricated with integral drive and addressing circuitry to achieve active matrix addressing and high frequency drive signals.
Currently, TFEL devices utilised for display applications are fabricated predominantly onto glass substrates. The electronic drive circuits are therefore external to the TFEL structures, necessitating the expense of printed circuit boards, short haul connections and yield damaging wire bonds. Some of these problems are solved in Active Matrix Liquid Crystal Displays (AMLCD) in which Thin Film Transistor (TFT) circuits are grown in a-Si (amorphous Silicon) or poly-Si (polycrystalline Silicon) onto the glass substrate.
It is therefore a further aim of the present invention to provide a TFEL device utilising a Si substrate with on-board electronics, thus entirely removing the need for an external circuit and significantly reducing the number of interconnects.
Hence, according to a further aspect of the present invention there is provided a method of manufacturing a TFEL device with integral drive and addressing circuitry, the method comprising growing a TFEL device onto the drain or extended drain of a MOSFET (and/or onto the electrode of a shunt capacitance) and providing the TFEL device with top and bottom contacts, grounding the source of the MOSFET and providing a high voltage supply line to the top contact of the TFEL, such that when the MOSFET is turned on, emission from the TFEL device is initiated, said emission being capable of being turned on or off by application of a small voltage signal to the gate of the MOSFET.
The growth method may be RF sputtering, RF magnetron sputtering, molecular beam deposition (MBD), thermal evaporation or electron beam evaporation.
The MOSFET may be either a CMOS or DMOS FET, since CMOS (which includes NMOS and PMOS processes) can be coupled with DMOS or high voltage CMOS processes.
Conveniently, the invention includes the use of two back-toback CMOS FETs in series with the TFEL structure. This arrangement allows the existing FET protection diodes to be retained without effecting device symmetry.
Preferably, the method also includes providing a storage capacitor arranged to discharge through the back-to-back CMOS FETs, to impart inherent memory to the device.
According to yet a further aspect of the present invention there is provided a TFEL device assembly having integral drive and addressing circuitry, the assembly comprising a TFEL device grown onto the drain or extended drain of a MOSFET (and/or the electrode of a shunt capacitance) , the TFEL device having top and bottom contacts, the source of the MOSFET being grounded and the top contact of the TFEL device being connected to a high voltage supply line, such that when the MOSFET is turned on, emission from the TFEL device is initiated, said emission being capable of being turned on or off by application of a small voltage signal to the gate of the MOSFET.
Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings in which: Figure 1 shows how the transient luminescent properties may be controlled by adjustment of Mn doping concentration, Figure 2a illustrates a TFEL device with opto-electronic integrated circuit in accordance with the present invention, Figure 2b is a simplified equivalent circuit to the circuit shown in Figure 2a, Figure 3 illustrates schematically how the TFEL can be grown integrally with the circuit shown in Figure 2a, Figure 4 illustrates the brightness-voltage curves for two different growth methods, Figure 5 illustrates drive and addressing circuitry according to the present invention utilising entirely CMOS technology, Figure 5a comprises a table of on-off sequencing achieved with the circuitry of Figure 5, Figure 6 illustrates schematically how the TFEL device can be grown integrally with the circuitry of Figure 5 on a Si substrate.
Figure 7a is a plan view of an integrated LETFEL die, and Figure 7b illustrates the necessary circuitry to facilitate low voltage addressing and switching of the inherent high voltage LETFEL structure shown in Figure Ga.
Referring to the Figure 1, it can be seen that a Mn doping level greater than 0.5 Wtt results in high intensity light emission with a radiative decay time that is less than that employed for conventional refresh operated devices (curve 2) where the drive frequency is limited by the refresh rate. The decay constant represented graphically in Figure 1 is defined as the time taken to decay to 37% of the peak intensity. The reduced decay times (200as or less) ensure that high resolution, high speed electrographic printing may be facilitated by such an application of the present invention.
The use of an optimum 0.5 Wt% dopant concentration for refresh operation of TFEL devices is well known < I) (2). Dopant concentrations in excess of this 0.5 Wt% "optimum" lead to inefficient emission when refresh operation is employed.
Indeed, methods of fabricating TFEL devices such that the dopant concentration is limited to this 0.5 Wt% "optimum" are documented in several patents and patent applications (0(4)(5)(6).
The present invention is radically different, therefore, in that it makes use of the high intensity luminescent emission that is produced by a dopant concentration > 0.5 Wtt, by employing a high frequency drive voltage via active matrix addressing. Figure 1 shows how the luminescent properties of ZnS:Mn vary with Mn concentration, and how an "optimum" of 0.5 Wtt is determined by the combination of high intensity (see line 4) and short decay times (see line 6) at levels > 0.5 Wt%.
In particular, at Mn concentrations in excess of those employed as an "optimum" for refresh driven devices, the intensity of emission rises monotonically with the dopant level, and the decay time decreases. The present invention exploits these properties by employing such high Mn concentrations in devices that may be driven at frequencies in excess of the conventional refresh rate and equivalent to the frequencies that may be employed in active matrix addressing.
The remainder of the Figures relate to a possible embodiment of the invention in which active matrix addressing is employed to facilitate high frequency operation.
One embodiment of the invention is shown in Figures 2a, 2b and 3 and comprises an FET 10 in series with a TFEL device 12. The operation of the circuit. shown in Figure 2a is most clearly described with the simplified equivalent circuit of Figure 2b in conjunction with the growth structure illustrated in Figure 3. An ac TFEL device is grown onto the drain 10a of an nchannel enhancement MOSFET 10; the source 10b is grounded and a high voltage ac supply VHI is placed onto the top contact 12a of the ac TFEL. With the MOSFET 10 off (position A) no channel exists in the MOSFET and so the drain-source capacitance dominates, resulting in a capacitive voltage divider circuit.
The voltage drop Vl) across the TFEL device and the voltage drop VM across the MOSFET is determined by the equality of charge storage, namely CI,Vl, = C,,V,,, where C" is the capacitance of the TFEL device and Q is the capacitance of the MOSFET. By correct device fabrication in this state Vt, can be kept below the threshold VlH for EL emission (i.e V, < Vim). Turning on the MOSFET effectively grounds the drain connection (position B) and all VH is applied across the ac TFEL device 12 (i.e VD = VII > VlH) thus emission is initiated.Each EL pixel can thus be turned on or off by application of a small signal applied to the gate 10c. DMOS circuits can be utilised with this method which can also be prefabricated into the Si wafer prior to TFEL fabrication, thus removing the need for external high voltage MOSFET chips such as the HV77 EL device driver.
Referring to Figure 3, opto-electronic integrated circuit (OEIC) structures were grown directly onto the polished n+ drain of a DMOS circuit, prefabricated into a Si wafer. 0.3 micron thick Y,O, layersl2c, 12d grown at 1000C by RF magnetron sputtering sandwich a 1 micron thick ZnS:Mn active layer 12e grown at 150C by MBD or RF magnetron sputtering. The sputtered devices were annealed at 400"C for one hour after deposition. Al and Au contacts were placed on the top Y203 layer 12c. Device capacitances were predetermined to ensure that most of the voltage was dropped across the MOSFET 10 in the off-state to achieve maximum contrast.
Initially, a 200V ac signal was applied to the top contact 12a and the MOSFET was turned off. 45 volts and 50 volts were resultant across the TFEL device for the MBD and sputtered devices respectively, thus no emission occurred. On application of 4V to the gate 10c, bright EL emission was observed, with all but 2V appearing across the TFEL device in either case. Further toggling of the gate voltage resulted in a simultaneous change in EL state; the devices being brightly on, or fully off. Brightness-voltage curves for each growth process (14 for sputtering and 16 for MBD) were obtained and are illustrated in Figure 4.
Growing a TFEL onto a MOSFET in this way provides a switch, thus providing a fully integrated opto-electronic circuit.
Whilst the foregoing example illustrates the use of DMOS FETs, the use of these components in a real application is enhanced by their compatibility with the necessary CMOS shift registers used for line addressing. The resultant circuit would comprise a mixture of high voltage DMOS drive circuitry and/or high voltage CMOS circuitry and low voltage CMOS addressing circuitry. However, an alternative embodiment of the invention allows the total use of CMOS technology, this alternative embodiment being illustrated in Figures 5 and 6.
Figure 5 illustrates a circuit of this alternative embodiment of the invention, which has been successfully tested with its associated X and Y addressing latch. Two back-to-back CMOS FETs 18, 20 are placed in parallel with a shunt capacitor 22 of capacitance Cs and the TFEL structure 12 is placed in series with these. Back-to-back CMOS FETs are used to increase the total safe voltage drop across the shunt capacitor 22 and to prevent the FET protection diode affecting the device symmetry (the removal of such diodes would necessitate a change to standard CMOS fabrication and therefore would prove too costly). In a similar manner to the operation of the circuit shown in Figures 2a and 2b, voltage switching in the circuit shown in Figure 5 is achieved by turning on or off the CMOS FETs 18, 20.In the off state the high voltage VHl is divided across the TFEL device 12 and capacitor 22 in the ratio of CDVD = QVs where V) and VS are the voltage drops across the TFEL device 12 and the shunt capacitor 22 respectively. In the on state all the voltage VHI is dropped across the TFEL device 12.
As shown in Figure 6, the shunt capacitor 22 is grown into the Si substrate 30 using a suitable oxide; the physical dimensions being determined by the TFEL properties and CDVI) = CSVS where C5 is a parallel combination of the drain to source capacitance of the FETs and the capacitance formed by the oxide raft.
Matrix addressing is achieved with a further arrangement of CMOS FETs 24, 26 connected to the X and Y lines (control lines and shift registers respectively) as shown in Figure 4. With both X and Y lines high (i.e logic 1) the storage capacitor 28 charges up to the voltage on the Y-line, which is enough to turn on the CMOS FETs 18, 20 and the TFEL device 12 will turn on. The charge will stay on the storage capacitor 28 until the condition where the X line is high and the Y line is at 0V, and in this condition the storage capacitor 28 will discharge through CMOS FETs 18, 20 thus the CMOS FETs 24, 26 and the TFEL device 12 will turn off; any other combination of signals to the X and Y lines will not change the TFEL emissive state.
On/off sequencing is illustrated in the table of Figure 4a and clearly indicates the inherent memory introduced with this circuit due to the storage capacitor 28. This embodiment avoids the need for an expensive, mixed component circuit, whilst utilising existing CMOS technology. Additionally, no cross-talk problems are envisaged, thus removing the necessity for Si on insulator substrates.
The circuit of Figure 5 can be integrated at each pixel site, 1000 lines per inch geometries being feasible with this circuit, the shunt capacitor 22 and storage capacitor 28 also being integrated into the substrate at the pixel site.
Shown in Figure 7a is. the circuit block layout for an integrated LETFEL 40 for electrographic printers. Figure 7b shows the necessary circuit layout 50 for addressing a linear array of LETFEL devices. For say 192 LETFEL devices less than 10 wirebonds are required, because the decode logic (i.e shift registers 40a and latches 40b) formed by CMOS technology are integrated into the die prior to the LETFEL processes. High voltage CMOS (which includes NMOS and PMOS) circuitry is also defined prior to LETFEL processes. During these fabrications the shunt capacitance may be defined, during the poly-gate process for the high voltage CMOS. The process stage prior to the LETFEL process is the deposition of dielectric sidewalls to prevent excessive optical cross-talk between high resolution LETFEL emitters.
For shunt capacitors formed by the poly-gate process of the FET, electrical connection is made through holes fabricated at the rear of each LETFEL pixel. One metallisation stage defining the high voltage electrode, the link between the drain of the FET and the polyelectrode of the shunt capacitance and bondpads for wirebond connection to the die. Finally, the emitting facets along the front face and a passivation layer are deposited and etched.
The applications for the present invention are aimed primarily at visual and hard copy products. Surface emitting TFEL smallarea, high-definition displays being used in areas such as flat panel displays or projection displays, whereas lateral emitting devices are also possible with applications for areas such as electrographic printing.
References (1) R. Tornvist; J. Appl. Phys. 54 (7) (1983) 4110.
(2) L.E. Tannas Jnr.; "Flat Panel Displays and CRTs" Van Nostrand Reinhold, (1985) 237.
(3) GB 2271022 A (4) GB 2152751 A (5) GB 2122810 A (6) GB 2046012 A

Claims (7)

  1. CLAIMS 1. An electroluminescent device for operation at frequencies in excess of 5KHZ, the device including a phosphor layer incorporating an active luminescent dopant wherein the concentration of the active luminescent dopant is greater than 0.5 Wt%.
  2. 2. A device according to Claim 1 wherein the dopant concentration falls within the range 0.5 Wt% to 5 Wt%.
  3. 3. A device according to Claim 1 or Claim 2 wherein the dopant concentration falls within the range 0.5 Wt% to 1 Wt%.
  4. 4. A device according to any of the preceding Claims wherein the active phosphor layer is Zinc Sulphide doped with Manganese, or either terbium fluoride or terbium.
  5. 5. A device according to any of the preceding Claims and being capable of operation using active matrix addressing.
  6. 6. A device according to any of the preceding Claims wherein the device is fabricated with integral drive and addressing circuitry to achieve active matrix addressing and high frequency drive signals.
  7. 7. An electroluminescent device substantially as herein described and illustrated in the accompanying drawings.
    7. A method of manufacturing a TFEL device with integral drive and addressing circuitry, the method comprising growing a TFEL device onto the drain or extended drain of a MOSFET (and/or onto the electrode of a shunt capacitance) and providing the TFEL device with top and bottom contacts, grounding the source of the MOSFET and providing a high voltage supply line to the top contact of the TFEL, such that when the MOSFET is turned on, emission from the TFEL device is initiated, said emission being capable of being turned on or off by application of a small voltage signal to the gate of the MOSFET.
    8. A method according to Claim 7 wherein the growth method is selected from RF sputtering, RF magnetron sputtering, molecular beam deposition (MBD) , thermal evaporation or electron beam evaporation.
    9. A method according to Claim 7 or Claim 8 wherein the MOSFET may be either a CMOS or DMOS FET.
    10. A method according to any of the Claims 7 to 9 wherein the method includes providing two back-to-back CMOS FETs in series with the TFEL structure.
    11. A method according to Claim 10 wherein there is provided a storage capacitor arranged to discharge through the back-toback CMOS FETs.
    12. A TFEL device assembly having integral drive and addressing circuitry, the assembly comprising a TFEL device grown onto the drain or extended drain of a MOSFET (and/or the electrode of a shunt capacitance) , the TFEL device having top and bottom contacts, the source of the MOSFET being grounded and the top contact of the TFEL device being connected to a high voltage supply line, such that when the MOSFET is turned on, emission from the TFEL device is initiated, said emission being capable of being turned on or off by application of a small voltage signal to the gate of the MOSFET.
    13. A TFEL device assembly according to Claim 12 wherein the TFEL device includes a active phosphor layer having a dopant concentration of at greater than 0.5 wt t.
    14. A method of manufacturing a TFEL device with integral drive and addressing circuitry, the method being substantially as herein described and illustrated in the accompanying drawings.
    15. A TFEL device assembly substantially as herein described and illustrated in the accompanying drawings.
    16. An electroluminescent device substantially as herein described and illustrated in the accompanying drawings.
    endments to the claims have been filed as toilows CLAIMS 1. An electroluminescent device for operation at frequencies in excess of SKHz, the device including a phosphor layer incorporating an active luminescent dopant wherein the concentration of the active luminescent dopant is greater than 0.5 Wt%.
    2. A device according to Claim 1 wherein the dopant concentration falls within the range 0.5 Wt% to 5 Wt%.
    3. A device according to Claim 1 or Claim 2 wherein the dopant concentration falls within the range 0.5 Wt% to 1 Wtt.
    4. A device according to any of the preceding Claims wherein the active phosphor layer is Zinc Sulphide doped with Manganese, or either terbium fluoride or terbium.
    5. A device according to any of the preceding Claims and being capable of operation using active matrix addressing.
    6. A device according to any of the preceding Claims wherein the device is fabricated with integral drive and addressing circuitry to achieve active matrix addressing and high frequency drive signals.
GB9624268A 1994-08-18 1995-08-08 Improved luminous efficiency in a thin film EL device Expired - Fee Related GB2306251B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9624268A GB2306251B (en) 1994-08-18 1995-08-08 Improved luminous efficiency in a thin film EL device

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB9416731A GB9416731D0 (en) 1994-08-18 1994-08-18 Improvements in and relating to TFEL technology
GBGB9506328.5A GB9506328D0 (en) 1994-08-18 1995-03-28 Improvements in and relating to TFEL technology
GB9516259A GB2294585B (en) 1994-08-18 1995-08-08 Improvements in and relating to electroluminescent devices
GB9624268A GB2306251B (en) 1994-08-18 1995-08-08 Improved luminous efficiency in a thin film EL device

Publications (3)

Publication Number Publication Date
GB9624268D0 GB9624268D0 (en) 1997-01-08
GB2306251A true GB2306251A (en) 1997-04-30
GB2306251B GB2306251B (en) 1998-02-04

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2046012A (en) * 1979-03-29 1980-11-05 Timex Corp Electroluminescent backlight for electrooptic displays
US4394601A (en) * 1973-07-05 1983-07-19 Sharp Kabushiki Kaisha ZnS:Mn Thin-film electroluminescent element with memory function
GB2122810A (en) * 1982-06-09 1984-01-18 Secr Defence Electroluminescent device
GB2152751A (en) * 1983-12-08 1985-08-07 Koa Denko Electroluminescent device
GB2271022A (en) * 1992-09-24 1994-03-30 Fuji Electric Co Ltd A method for manufacturing a thin-film el device
GB2278853A (en) * 1993-06-08 1994-12-14 Fuji Electric Co Ltd Method for manufacturing thin-film EL device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4394601A (en) * 1973-07-05 1983-07-19 Sharp Kabushiki Kaisha ZnS:Mn Thin-film electroluminescent element with memory function
GB2046012A (en) * 1979-03-29 1980-11-05 Timex Corp Electroluminescent backlight for electrooptic displays
GB2122810A (en) * 1982-06-09 1984-01-18 Secr Defence Electroluminescent device
GB2152751A (en) * 1983-12-08 1985-08-07 Koa Denko Electroluminescent device
GB2271022A (en) * 1992-09-24 1994-03-30 Fuji Electric Co Ltd A method for manufacturing a thin-film el device
GB2278853A (en) * 1993-06-08 1994-12-14 Fuji Electric Co Ltd Method for manufacturing thin-film EL device

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GB2306251B (en) 1998-02-04

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