GB2305005A

GB2305005A - Active matrix electroluminescent device with sharp-edged conductive traces

Info

Publication number: GB2305005A
Application number: GB9618433A
Authority: GB
Inventors: Iranpour Khormaei; Stephen C Thayer
Original assignee: Planar Systems Inc
Current assignee: Planar Systems Inc
Priority date: 1995-09-07
Filing date: 1996-09-02
Publication date: 1997-03-26
Anticipated expiration: 2016-09-02
Also published as: GB9618433D0; DE19635746A1; GB2305005B

Description

2305005 1 USE OF TOPOLOGY TO INCREASE LIGHT OUTCOUPLING IN AMEL DISPLAYS

Backcrround of the Invention The following invention relates to an improved design for the circuit layer in an active matrix electroluminescent device to increase the light output of the device.

An active matrix electroluminescent device includes a forwardly disposed transparent electrode layer, a rearwardly disposed circuit layer, and at least three layers including an electroluminescent phosphor layer sandwiched between front and rear dielectric layers. The electroluminescent phosphor layer is located between the transparent electrode layer and the circuit layer. The circuit.-layer is deposited on a rearwardly disposed substrate.

Upon the-,application of the electric field between the transparent electrode layer and the circuit layer, light emitting pixels are formed in the phosphor layer. The physical structure of the phosphor layer causes the pixels to emit light that is directed in all directions but due to the differences in the indices of refraction of the adjacent layers, the emitted light is contained mostly within the plane of the phosphor layer. As the emitted light-Vtr avels within the phosphor layer, it is scattered in the,yVsphor layer causing a substantial portion of the emitted light to be directed in either the forward or rearward directions. Forwardly directed light may have a sufficient angle of incidence to refract through the front layers of the laminar stack, each of which may have a different index of refraction, and be emitted from the front of the display. Rearwardly directed light may have a sufficient angle of incidence to refract through other layers of the laminar stack, reflect off the circuit layer, and refract through the 2 entire laminar stack, then be emitted from the front of the display.

Light striking a boundary between two laminar layers at too small of an angle will be internally reflected within that layer. If the angle of incidence of the reflected light is too small when striking the next adjacent laminar boundary, the light will likely be totally internally reflected within that layer and will never be emitted from the front of the display as light.

However, light striking a laminar boundary at a sufficiently large angle of incidence will refract into the next adjacent layer and if forwardly directed, may be emitted from the front surface boundary. Light that cannot escape from the front surface boundary likely may freely refract between the other layers in the laminar stack and eventually be absorbed by the laminar stack.

A significant portion of the rearwardly directed light, either from the phosphor layer or light primarily reflected off the thin-film boundary at the front of the display, may have a sufficient angle of incidence to refract through the various laminar layers and reflect off the circuit layer. A traditional circuit layer is constructed with semiconductor processes that fabricate individual layers on the substrate in a way so as to create electronic components from traces. These traces relatively have rounded edges providing an overall substantially smooth surf#ce. Light that is reflected off a circuit layer with a substantially smooth surface will, in the large majority of the cases, reflect at an angle approximately equal to the angle of incidence. Such reflected light could be either diffusely scattered or strike a defect, thereby, increasing the angle of incidence relative to the thin-film boundaries within the laminar stack, thus permitting its escape from the display. However, much of the light reflected off of the circuit layer at small angles of reflection will never sufficiently increase its angle of incidence relative to 3 the front thin-film-air boundary to permit its escape. Light that does not escape from the display is internally absorbed thereby decreasing the potential brightness of the pixels.

What is desired therefore is a structure that increases the angle of incidence of reflected light striking the front thin-film-air boundary which allows this light to escape and in turn increases the brightness of the pixels within the display.

Summarv of the Present Invention The present invention overcomes the aforementioned drawbacks of the prior art by providing a thin-film electroluminescent device including a plurality of layers with at least a transparent electrode layer, a circuit layer, and.at least two layers including an electroluminescent layer and a dielectric layer. The electroluminescent layer and dielectric layer are disposed between the circuit layer and the transparent electrode layer so as to emit light upon the application of an electric field. The rearwardly disposed circuit layer includes a plurality of electrically interconnected traces. At least one of the traces has at least two substantially planar faces in a predetermined angular relationship to each other. Preferably, the faces are adjacent to one another and define a substantially sharp edge at their junction with one another.

The thin-film electroluminescent device with a circuit layer including sharply defined edges and substantially planar faces will have a greater tendency to deflect incident light at angles sufficient to refract through the laminar stack and the thin-film-air boundary at the front of the device. This increase in the light emitted at the thin-film-air boundary increases the overall brightness of the pixels.

In an alternative embodiment, an increase in the emitted light from the device may be obtained by 4 including at least one additional trace in the circuit layer that is electrically isolated from the remaining electrical traces. The additional trace preferably has adjacent substantially planar faces joined in a predetermined angular relationship to each other that define a substantially sharp edge. The additional trace or traces increases the density of substantially planar faces which further increases the tendency of incident light on the circuit layer to be deflected at angles sufficient to refract through the thin-film-air boundary at the front of the device.

Fabricating the thin-film electroluminescent device preferably comprises the steps of fabricating a plurality of electrically interconnected traces within a circuit layer, wherein each trace has at least two substantially planar faces having a predetermined angular relationship with each other, thereafter, depositing on the circuit layer a plurality of layers in a manner such that they conform substantially to the contour of the traces, wherein the plurality of layers includes at least a dielectric layer, an electroluminescent layer, and a transparent electrode layer.

Alternatively, the process of fabricating the thin-film electroluninescent device comprises the steps of fabricating a plurality of electrically interconnected and electrically isolated traces within a circuit layer, thereafter, depositing on the circuit layer a plurality of layers in a manner such that they conform substantially to the contour of the traces, wherein the plural- ity of layers includes at least a dielectric layer, an electroluminescent layer, and a transparent electrode layer.

The foregoing and other objectives, features, and advantages of the invention will be more readily understood.upon consideration of the following detailed description of the invention, taken in conjunction with the accompanying drawings.

Brief Description of the Drawinas

FIG. 1 is a cut away sectional representation of an active matrix electroluminescent device constructed in accordance with the present invention.

FIG. 2 is a cut away sectional representation of a traditional circuit layer.

FIG. 3 is a cut away sectional representation of a circuit layer constructed according to the present invention.

FIG. 4 is a cut away pictorial representation of a circuit layer showing electrically interconnected traces.

FIG. 5 is a cut away pictorial representation of a circuit layer showing multiple circuit elements with electrically interconnected traces.

FIG. 6 is.a cut away pictorial representation of an alternative circuit layer, including electrically interconnected and isolated traces.

Detailed Description of the Invention

Referring to FIG. 1, an active matrix electroluminescent device (AMEL) 10 is constructed using an inverted structure. The structure includes a transparent electrode layer 12, a circuit layer 14 and at least three layers including electroluminescent phosphorlayer 16 sandwiched between front and rear dielectric layers 18 and 20, respectively. Alternatively, either the rear dielectric layer 20 or the front dielectric layer 18 may be omitted. The three layers are disposed between the circuit layer 14 and the transparent electrode layer 12. The circuit layer 14 is deposited on a rearwardly disposed substrate 22. The rearwardly disposed substrate 24 is preferably a high purity silicon in which the circuit layer 14 is fabricated. A front glass plate 24 is affixed on the transparent electrode layer 12 if desired by using a seal material (not shown). The individual circuit elements 26a, 26b, 26c, and 26d are 6 connected to respective pixel electrodes 28a, 28b, 28c, and 28d, with a metal line connected through a hole commonly referred to as a via in auxiliary ground layers. The auxiliary ground layers comprise a first isolation layer 30, a second isolation layer 32, and a ground plane layer 34 preferably made of refractory metals. The isolation layers 30 and 32 are preferably made of glass. The grounding for the individual circuit elements 26a-26d is preferably the rearwardly disposed substrate layer 22 or the ground plane layer 34. The circuit elements for activation of the pixel electrodes may be those as described in European Patent 'PubEication No. 0701238 of which the content is incorporated herein by reference.

Referring to FIG. 2, a cross-sectional view of a portion of a traditional circuit layer 100 is shown. Traditional wisdom dictates that displays designed with sharp edges 108 and corners within the circuit layer 100 of electroluminescent laminar stacks will cause burnouts within the display. A burnout is an electrical short within the electroluminescent stack caused by a defect within the electroluminescent stack. The electrical short allows excessively high currents to pass through that portion of the electroluminescent stack when the adjacent pixel or pixels are energized destroying that portion of the electroluminescent stack and thus the associated pixel. Burnouts have been observed to occur at those locations within the display that are proximate to sharp edges within the circuit layer 100. Accord- ingly, sharp edges 108 have been associated with the causation of burnouts and therefore circuit layers 100 are designed to avoid the use of sharply defined edges 108 within the circuit layer 100. This increases the reliability of displays by decreasing or eliminating burnouts.

In contrast to the conventional belief, the present inventors have discovered that the use of sharp 7 corners and sharp edges do not inherently cause burnouts within the display. The traditional and cost effective deposition techniques for depositing the laminar stack on the circuit layer 100 are a main cause for the burnouts associated with sharp edges and corners. Displays typically use physical deposition techniques, such as sputtering.or evaporation to deposit the electroluminescent laminar stack on the circuit layer 100. Deposition techniques, such as sputtering, involve spraying the laminar layers on the stack from a location above the circuit layer 100. During deposition of the stack, the horizontal portions 102 and 104 receive a relatively even coating of the deposited material with the desired thickness. The vertical portion 106 receives a thin coating of deposited material. In particular, the sharp edge 108 also receives a thin coating of deposited material. The thin layer of material associated with the edge 108 results in a decreased distance between this portion of the circuit layer 100 and the front electrode layer resulting in higher electric fields between the edge 108 and the front electrode layer 12. The higher electric fields may be greater than the laminar stack was designed to withstand. The higher electric.fields in portions of the display where edges 108 are located results in a higher rate of burnouts in locations proximate to edges 108.

Referring to FIG. 3, to increase the thickness of the laminar stack at the edge 122, the deposition of the laminar stack on the circuit layer 120 should be accomplished using a conformal coating process. conformal coating deposits layers of material relatively evenly across the entire surface of the circuit layer 120, including the edge 122 and upright side 124. Conformal coating may be thought of as growing each layer starting from the circuit layer 120 outward, rather than spraying the layer on from above. Conformal coating results in a more consistent distance from the circuit 8 layer to the front electrode layer, which causes the electric fields to be more uniform resulting in a significant reduction in the frequency of burnouts associated with edges 122 or other sharp features. Edges 122 are preferably sharp or substantially sharp. The preferred coating technique is atomic layer epitaxy, although other suitable techniques, such as chemical vapor deposition, are also acceptable. The faces including the top and sides of traces are preferably substantially planar in nature and define sharp edges at their junctions with one another.

Referring to FIG. 4, a representation of a circuit element fabricated on the substrate for selectively selecting a pixel is shown. The traces 168 making up the electronic components, such as transistors, are electrically interconnected with one another. By designing the circuit layer 150 to include relatively sharp and defined edges 170 and corners 172 along the various circuit elements and traces 168, light incident on the circuit layer 150 will have a greater tendency to be deflected by the sharp features of the circuit layer, such as the corners and particularly the upright faces of the traces, at angles sufficient to refract through the laminar stack and the thin-film boundary at the front of the display. The faces of the traces should be substantially planar, and orientated vertically or substantially vertically so that light, and particularly light with a low angle of incidence, will have a greater tendency to be reflected off the circuit layer at an angle substant- ially different from the angle of incidence. This is achieved by light striking the circuit layer 150, and in particular the edges, corners, and substantially planar faces of the circuit layer, causing the light to reflect at angles of reflection significantly changed from the angle of incidence. Accordingly, rearwardly directed light at low angles of incidence will have a tendency to increase its angle of incidence with respect to the 9 thin-film boundaries after reflection off the circuit layer 150, thus increasing the brightness of the display.

The design and manufacturing of a circuit layer, as shown in FIG. 4, should include as many vertical edges and sharply defined features as possible. To achieve vertical faces and defined edges, extra processing may be incurred by the need for additional masking and etching steps during the fabrication process of the circuit layer. However, the additional process complexity yields a higher light output than the traditional, substantially smooth, circuit layer design.

Referring to FIG. 5, multiple circuit elements 150 are located adjacent one another for the activation of each pixel within the display.

During the traditional manufacturing of the circuit layer for active matrix electroluminescent displays, a layer is deposited on the circuit layer and all portions of that layer which are not required for the operation of the circuit layer are usually etched away.

The removal of the unnecessary portions of each layer permits a high density of traces and components to be located within each layer minimizing the amount of wasted space. Referring to FIG. 6, in contrast to the traditional fabrication technique, it is not necessary or' desirable to etch away all unnecessary portions of each layer. Instead, additional islands 190 of non-etchedaway material are fabricated within the various layers of the circuit layer. These islands 190 are preferably designed with sharp edges (or substantially sharp edges), substantially planar faces, and are not electrically connected to the remainder of the circuit layer. The masking and deposition process to create the circuit layer frequently includes as many as 8 to 16 layers. Some of these layers include unused areas that are suit- able for adding additional islands 190 without decreasing the density of the circuit elements. The circuit layer may also be designed with less density so as to provide additional space to include islands 190. The addition of islands 190 increases the density and number of reflective edges and planar faces within the circuit layer which increases the likelihood that light will strike an edge or planar face and be reflected at a angle permitting it to refract through the laminar stack and the front thin-film-air boundary of the display to increase pixel brightness.

The terms and expressions which have been employed in the foregoing specification are used therein as terms of description and not of limitation, and there is no intention, in the use of such terms and expressions, of excluding equivalents of the features shown and described or portions thereof, it being recognized that the scope of the invention is defined and limited only by the claims which follow.

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Claims

What is Claimed is:

1. A method of fabricating a thin-film electroluminescent device comprising the steps of:

(a) fabricating a plurality of electrically interconnected traces within a circuit layer, wherein each trace has at least two substantially planar faces having a predetermined angular relationship with each other; and (b) depositing on said circuit layer a plurality of layers in a manner such that they conform substantially to the contour of said traces, wherein said plurality of layers includes at least a dielectric layer, an electroluminescent layer, and a transparent electrode layer.

2. The method of claim 1 wherein step (a) further includes fabricating said at least two substantially planar faces adjacent to one another.

3. The method of claim 2, further including the step of fabricating said at least two substantially planar faces defining a substantially sharp.edge at a junction with one another.

4. A method of fabricating a thin-film electroluminescent device comprising the steps of:

(a) fabricating a plurality of electrically interconnected traces within a circuit layer; (b) fabricating a plurality of electrically isolated traces within said circuit layer; (c) depositing on said circuit layer a plurality of layers in a manner such that they conform substantially to the contour of said traces, wherein said plurality of layers includes at least a dielectric layer, an electroluminescent layer, and a transparent electrode layer.

is

5. The method of claim 4 wherein step (a) further includes fabricating said electrically interconnected traces such that each trace has at least two substantially planar faces having a predetermined angular 10 relationship with each other.

6. The method of claim 5, further including the step of fabricating said at least two substantially planar faces adjacent to one another.

7. The method of claim 6, further including the step of fabricating said at least two substantially planar faces defining a substantially sharp edge at a junction with one another.

8. The method of claim 4 wherein step (b) further includes fabricating said electrically isolated traces such that each trace has at least two substantially planar faces having a predetermined angular 25 relationship with each other.

9. The method of claim 8, further including the step of fabricating said at least two substantially planar faces adjacent to one another.

10. The method of claim 9, further including the step of fabricating said at least two substantially planar faces defining a substantially sharp edge at a junction with one another.

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11. A thin-film electroluminescent device comprising:

(a) a plurality of layers including at least a transparent electrode layer, a circuit layer, and at least two layers including.. an electroluminescent layer and a dielectric layer, said at least two layers disposed between said circuit layer and said transparent electrode layer so as to emit light upon the application of an electric field; (b) said rearwardly disposed circuit layer including a plurality of electrically interconnected traces; and (c) at least one of said traces having at least two substantially planar faces having a predetermined angular relationship with each other.

12. The thin-film electroluminescent device of claim 11 wherein said faces are adjacent to one another.

13. The thin-film electroluminescent device of claim 12 wherein said faces define a substantially sharp 25. edge at a junction with one another.

14. The thin-film electroluminescent device of claim 13 wherein said faces are substantially perpendicular to said electroluminescent layer.

15. A thin-film electroluminescent device comprising:

(a) a plurality of layers including at least a transparent electrode layer, a circuit layer, and at least two layers including an electroluminescent layer and a dielectric layer, said at least two layers 14 disposed between said circuit layer and said transparent electrode layer so as to emit light upon the application of an electric field; (b) said rearwardly disposed circuit layer including a plurality of electrically interconnected traces; and (c) said rearwardly disposed circuit layer including at least one additional trace that is electrically isolated from said plurality of electrically interconnected traces.

16. The thin-film electroluminescent device of claim 15 wherein at least one of said plurality of electrically interconnected traces has at least two substantially planar faces -joined in a predetermined angular relationship to each other.

17. The thin-film electroluminescent. device of claim 16 wherein said faces are adjacent to one another.

18. The thin-film electroluminescent device of claim 17 wherein said faces define a substantially sharp edge at a junction with one another.

19. The thin-film electroluminescent device of claim 18 wherein said faces are substantially perpendicular to said electroluminescent layer.

20. The thin-film electroluminescent, device of claim 15 wherein said at least one additional trace has at least two substantially planar faces joined in a predetermined angular relationship to each other.

21. The thin-film electroluminescent device of claim 20 wherein said faces are adjacent to one another.

22. The thin-film electroluminescent device of claim 21 wherein said faces define substantially a sharp edge at a junction with one another.

23. The thin-film electroluminescent device of claim 22 wherein said faces are substantially perpendicular to said electroluminescent layer.

24. A thin-film electroluminescent device constructed and arranged substantially as herein described and illustrated with reference to the accompanying drawings.

25. A method of fabricating a thin-film electroluminescent device as claimed in any of claim 11 to 24, said method being carried out subtantially as herein described. '