GB2299242A - Configuration of digital switch - Google Patents

Configuration of digital switch Download PDF

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GB2299242A
GB2299242A GB9605806A GB9605806A GB2299242A GB 2299242 A GB2299242 A GB 2299242A GB 9605806 A GB9605806 A GB 9605806A GB 9605806 A GB9605806 A GB 9605806A GB 2299242 A GB2299242 A GB 2299242A
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connection
submatrix
row
connections
column
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GB9605806D0 (en
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Raimo Kankaanranta
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Nokia Oyj
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Nokia Telecommunications Oy
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478Provisions for broadband connections
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06Time-space-time switching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J2203/00Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0003Switching fabrics, e.g. transport network, control network
    • H04J2203/0005Switching elements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J2203/00Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0003Switching fabrics, e.g. transport network, control network
    • H04J2203/0012Switching modules and their interconnections

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Mobile Radio Communication Systems (AREA)

Description

Configuration of digital switch 1 2299242 7lic invention relates to a
method according to the preamble of claim 1 for the configuration of a switch for digital transmission lines in situations requiring a 5 change in the switching.
Synchronous digital hierarchy (SDH) comprises a large entity for transmitting timedivision signals in a telecornint ini cation network the trunk network of which is developing into a remote-controfied switching network. The first level of SDH signals is the synchronous transport module (STM- 1) the transmission rate of which is 155.520 Mbit/s. The basic STMA frame consists of bytes (8-bit), which there are 1430, including control blocks; thus the STM- 1 frame transmits 63 TU 12 (tributary unit) 2-Mbit/s signals, which can contain a 2-Mbit/s signal of a usual 30-channel PCM system. Each byte in the frame constitutes a 64-kbit/s channel. SDH signals, or transport modules are formed from the subsystem signals by, means of byte interlacing.
A digital switch (DXC) in the SDH can switch traffic between the various SDH levels and between different signals. In addition, it has to be capable of flexibly reconfiguring the network, ie. rerouting the connections, and to guarantee a quick switch-over to backup connections in network fault situations.
Digital switching has been extensively studied in order to find an optimal architecture. A structure which is nonblocking and meets the criteria concerning capacity and feasibility is the TST structure, or time-space-time switching, as is disclosed e.g. in our patent PCT/F1/00 174 (or corresponding FI-921834). The patent discloses the general principles of a TST switch in considerable detail. Although the method disclosed in patent PCT/F1/00174 functions quite well, there is, especially in bigger switches, need for a more efficient switch control method.
The object of the invention is to provide a method for switching digital signals between two given points, thereby implementing a nonblocking connection and avoiding known deficiencies and disadvantages.
This object is achieved with a configuration calculation method implemented in time periods according to claim 1. The subclaims describe other advantageous embodiments of the invention.
0 2 ! i!.
The signals to be switched are advantageously multiplexed subsignals of highcapacity signals, which in the SDH system means that the subsignals are primarily 2-Mbit/s VC- 12 virtual containers, the main signals then being 155-Mbit/s STM- I signals. The Game algorithm according to the invention has better properties than other known point-to-point switching algorithms. Its advantages are that is needs less data memory and is faster to execute. A modest consumption of memory capacity and fast execution are very important when the switch gets big, especially when it exceeds the present size 16 16. 71e algorithm also includes a simple and straightforward rearrangement routine, which constitutes the main part of the algorithm. Thus, the rearrangement routine can he easily implemented and it is well optimized for fast execution.
The strength of the algorithm lies in the fact that it only rearranges connections needing rearrangement. This is partly realized by setting up the switching problem in a novel manner. The switching problem is presented as an imaginary matrix. The algonthm records all rearrangements done to the connections to realize the switching. When all rearrangements have been done the records provide all necessary information needed to realize the switching according to the switch control information.
In the method according to the invention, difficult switching situations are solved m the recursion stage, wherein the location of a connection in the imaginary matrix is randomly forced to a new location, whereafter operation is continued according to the basic method.
llie algorithm according to the invention can also be used to route pointto-point signals through a three-stage Benes switching network.
The invention is now described by means of examples, referring to the attached 30 drawing.
Fig. 1 is a simplified example of a switching situation having only 5 time slots instead of the usual 64.
3 is Fig. 2 shows an imaginary matrix and connections between the input ports and output ports. In this simplified example, the horizontal axis represents the input ports with the input time slots and the vertical axis the output ports With the output time slots.
3 0 Fig. 3 is a simplified flow charl of the Game algorithm according to the invention.
Fig. 4 illustrates the recursion stage according to the invention.
Fig. 5 shows a situation after the first row swap has been performed according to the method of the invention, and Fig. 6 shows a situation in the switching matrix when the first submatrix has been rearranged according to the invention using the Game algorithm.
Effective implementation of the configuration calculation according to the invention in a switch is based on the fact that in a TST switch a new configuration can be solved one time slot at a time. In other words, when a nonblocking location for an arbitrary time slot n is found through k tirne switches and kk space switches of the input side, one can be certain that the other time slots n+ 1, n+2,..., m can be solved with the same principle. Ilierefore, a configuration can be calculated for the switch one time slot at a time so that a nonblocidng switching configuration is always searched for in the input side time switch of the remaining time slots n, n+ 1, n+2,..., m and through the space switch.
The space connection of a particular time slot is nonblocldng when all the outputs of the space switch are in use. In other words, the input side time switch has to connect all time slots, or channels, in a way such that all time-switched time slots of the inputs of the space switch are directed to different outputs. If an input has no time slot that should be routed to a certain output, then, of course, that output need not be used. Thus, the flinction of the input side time switch before the space switch is to evenly divide the channels in the time slots so that the space switch can connect them to the appropriate, desired outputs. To be more specific, there should not occur in the space Switch a congestion, in which a time slot contains more than one channel routed to a particular output time slot. Using the method according to the invention the switching matrix is set up such that the switching is nonblocking.
In the switching method, the configuration of a switch is calculated one time slot at a time. First, the input channels, or the bytes in the frame, are divided into as many groups as there are switched signals, or time periods, in the transport module of the connection. For example, on an SDH STMA line connected to the input side time switch there are 63 time periods of a 2-Mbit/s signal at the transmission rate of 155 Mbit/s, which are called subsystem containers (e.g. tributary unit TU 1, which can 4 contain the 2-Mbit/s signal of a usual 30-channel PCM system). The location in the frame of each time slot selected according to the invention is obtained directly, or by calculating, by means of a pointer according to the standard. Correspondingly, on a line according to the plesiochronous digital hierarchy (PDH) there are 64 time periods of the 2Mbit/s signal when the rate is 140 Mbit/s. The switching routes are solved for each group defined in this way so that a realized switching configuration also means that the time slots yet to be calculated can also be connected. A solution for the whole switching network is thus obtaffied using a time periodic method according to Fig. 3.
The invention can be applied to switches using unidirectional or bidirectional traffic switching. In a bidirectional switch, the switching configuration of one direction can be produced in an analog manner, e.g. as a miTor image.
The switching problem is presented as an imaginary matrix, shown m Fig. 2. Let it be reminded that Fig. 2 is simplified to represent a (4 5 matrix, whereas the size of a matrix corresponding to a real switching network would be (16 6-35Y. The algorithm's low memory requirement is based on that the only necessary data fields are the data corresponding to the points on the matrix axis. 20
The algorithm records all rearrangements done to the connections to realize the switching. 'When all rearrangements have been done, the records provide all the necessary information needed to realize the switching according to the switch control information.
As was mentioned above, the signals to be connected are mainly 2-Mbit/s VC- 12 virtual containers. Connection of the main signal (STMA) as a whole between the input and output ports need not be considered, since such connections can be realized directly without calculation. Thus, the problem is the connection of VC- 12 3 W signals from incoming main signals to other outgoing main signals.
The general problem field and starting point for the algorithm is a table containing all connections to be completed in the switch. The table size is 1663, which represents the number of ports and time slots, respectively. The positions of the table 35 elements on rows and columns and the element values represent the connections. For the sake of illustration, Fig. I shows a simplified table of the order 45, ie. 4 input ports and 5 time slots. The values of the table elements represent the desired output ports and output time slots for signals at the input ports. For example, a
0 0, 0 ! 1.:.
connection over the switch from input port 1 time slot 3 has to be made to output port 4 time slot 3. So, in the table elements, the input ports comprise a row and the time slots a column, and the output port and output time slot are indicated in the element, or the crosspoint in the table, in the form: (port, time slot). In the example of Fig. 1, the switching situation is viewed from the input side. Similarly, the table contains a connection from input port 2 time slot 3 to output port 1 time slot 2, which can also be marked as 2,3 -+ 1,2.
Successful configuration in the TST architecture requires that the connections be always arranged so that in each time slot the input signals are directed to different individual outputs of the space switch, ie. two or more signals may not be directed to one output port in a particular time slot. This requirement in itself is simple, but the performance of algonthms used m bigger switches greatly differs in the way they, solve the configuration and how long a time the calculation requires.
Let us next take a look at the mathematical background of the algorithm according to the invention.
Combinatorial mathematics can be applied to the criteria of the TST architecture.
The theory MCludes a definition of a system of distinct representation (SDR). The SDR describes N sets (s I, s2,..., sN) with a distribution of elements such that it is possible to find a solution for the elements in which each of the elements is different. lhe sets sX can have the Mowing contents:
s L (1,33,5) s2: (2,4) s3: (1,2) A: (3, 4) sS: (5) Such an SDR representation made by means of &Xs can contain the following elements: 1, 4, 2, 3, 5 (in other words, element 1 from set s I, element 4 from set s2, etc.). The criterion for providing an SDR is given by Hall's statement: "A distinct representation is present in the sets sX, if for all k there is k difierent representatives 35 found in any union of k sets s."
On the basis of the set definitions above we can see that the statement is valid for these sets sX (x = 1 to 5). When the union of sets sI and s2 is modified, we get 5
6 0 representatives (elements 1, 2, 3, 4, 5), which is more than the number of sets constituting the union. If set A contained only element 5, it would make the SDR impossible, which is also recognized by Hall's statement. The union of sets A and sS would then contain only one representative, which is less than the number of sets in the union.
This mathematical situation is applicable to the TST architecture since the sets &X can represent input lines. The set elements can then represent signals that must be directed to desired output lines. Note that at this moment the order of the time slots is mathematically irrelevant as the essential thing in the TST structure is to arrange the connections so that they use different ports in the space switch. The time sWitches will provide for the appropriate order outside the scope of this definition.
Hall's statement can be shown to be valid for the TST architecture since the input and output sides are of the same size. The problem is not nonblockingness of the conditionally nonblocking TST architecture but how to describe an algorithm to find the correct switching configuration, ie. how best to find a solution in which the signals use different ports over the space switch for all 63 time slots.
One possible algorithm is found by testing the validity of Hall's statement. Such an algorithm simply picks one element out of a set sX as long as that element is not already included in the solution. The algorithm tries out elements in the set until it finds a new solution. This is continued for all sets until all sets are represented by distinct elements.
If no solution is found among all elements of a particular set, then a recursive action has to be performed. The recursion is started by selecting one element out of the unsolved set. '[lie overlapping element in another set has to be removed firom the solution and a new solution has to be found for this overlapping set. If the over- lapping set includes an element which increases the number of solutions, then it is the new solution. I on the other hand, no new solution is found, the recursion continues, but now with the new unsolved set as a starting point. The recursive action is similar to the above except that the selection of next element cannot be directed to a preceding overlapping element. The recursive calculation is continued until the number of solutions in incremented with a new solution.
Let us next take an example to illustrate the proof algorithm. The sets described above can be used ie:
7 sl: (1,3,5); sI (2,4); sI (1,2); A: (3,4); s5: (5).
1 0 Element I from set sl is selected for the solution. Next, element 2 from set Q is selected, and then we must select an element from set s3. Set 0 contains elements 1 and 2, which are already included in the solution so far, which indicates that recursive action is called for. Let the new solution be element I of set s3, which means that element I of set s I has to be removed from the solution. Then we must have a new solution for set s I, and element 3 is suitable for that because with it the number of solutions increases, ie. the preceding solution (s2(2), s3(l)) becomes (sl(3), s2(2), s3(l)). The recursion then stops. In the next step, element 4 of set s4 is selectedL and finally element 5 of set s5. Thus the final solution is: (sl(3), s2(2), s3(l), s4(4), s5(5)).
When there occurs overlapping, or a coHision, between the solutions, the approach of the algorithm is to begin from the set that has no solution yet. This starting point cannot always be considered recommendable as the algorithm may remain looping between the same sets until it finds an element of the prior sets which will increment the solution. A better starting point is then to select an element of a prior set sX With which a new solution can be found. The rest of the solutions are found by going through the algorithm in the opposite direction.
Let us next take a look at how a suitable recursive action is realized. In the case of a collision, set s.X is selected which has an element that produces an additional solution. The preceding selection in this set sX has to be removed. A free solution is now selected m another set and the element previously selected for it is removed from the solution. Ilids select-remove action in a set continues through the sets of the overaU solution until a removed element is found in a set wherefrom the recursion was started, ie. M the set that previously had only elements that were already included m other sets.
3 0 By way of example, let us consider the recursion situation described above and let us use a smoother method. Then set C has two elements, but neither of them can be selected. Both s 1 and C can increment the solution. Set s 1 fluther includes elements 3 and 5, and set C further includes element 4. Let us now take element 3 of set s 1.
Then the previously selected element 1 of set s I is removed, whereby element 1 can be selected in another set. Examining set 0 we see that this set also includes element 1, which then is selected as the solution for set sI So, the overall solution is (sl(3), s2(2), s3(1)).
1 8 0. so 0 01 The drawback of this method, or algorithm, is its inefficiency. The time required to increment the solution, ie. to include yet another connection over the space switch is in practice much too long. To increment the solution from k- 1 to k may in the worst case take k new selections. Theoretically, the solution for the whole time slot may then require Ek steps. In the worst case the theoretical efficiency of the selection process is (100% 16)/Sk = 11.76%, when kma., = 16, or when the size of the switch is 16 16.
The Game algorithm according to the invention uses a connection request table like the one in Fig. 1. Note that the table drawn up on the basis of output ports must show a switching situation in which the elements of the table indicate the inputs of the switch. So, in the table, a row corresponds to the output port, a column corresponds to the time slot, and the element contents correspond to the input port and time slot. From the connection request table the connections are mapped into two auxiliary tables which define the connections from inputs to outputs.
The primary function of the algorithm according to the invention is to solve all connections III one try without dividing the connection request table into smaller parts. Said two auxiliary tables, ie. the input table and the output table, are set up in two arrays which are ordered by time slots. These two arrays comprise the two axes of the imaginary matrix. Fig. 2 shows an example of these arrays, which are arranged into an imaginary matrix on the basis of the data presented in Fig. 1. The xaxis of the matrix corresponds to the input port request array and the y-axis the output port request array.
In Fig. 2 the inputs are on the x-axis and the first, or the top row indicates the input port and the second row the time slot of the input connection. The third row of the x-axis indicates the target output port and time slot (porttirne) for the signal at the input port/time slot. The first, or the leftmost column indicates the output port and the second column the output connection lime slot, which is presented m the output connection request. The third column indicates the desired contents of the output connection, ie. the connection source in the form: input port, input time slot. The structure of this output array is thus the same as that of the input array. In addition, 3 the contents of the output array represent the same connections as the input array; only the viewpoint is diflerent. In the rest of the table, ic. in the imaginary matrix, connections are indicated by a 'I'. So, each input is connected to an output at a crosspoint of a row and a column marked as'l'.
9 0.
VAen the size of the matrix is NN, while N = 4 in Fig. 2, the matrix can be realized as submatrices of the main matrix. Then one submatrix is formed for each time slot of both the input and the output connection array. In the main matrix the submatrices form a diagonal from the upper left comer to the lower right comer. Two of these submatrices are fi-amed by thicker lines in Fig. 2. These matrices indicate the connections over the space switch in each of the time slots. The matrices are also equivalent to the complete solution of the SDR system.
Fig. 3 shows the main loop of the algorithm. In the main loop all connections are gathered into submatrices. The solution is complete when all connections have been moved into the submatrices. The moves are performed by swapping rows Or columns in pairs. The moves are performed in the input and output arrays, but also in two extra arrays, which are not shown in Fig. 2. These extra arrays are of the same size as the input and output arrays, but they only contain one element. The function of such a status array is to indicate the moves needed in the first and second time switch of the TST switch. Therefore, these two status arrays are called the first status array and the second status array, and they correspond to the input side time switch and output side time switch, respectively.
The moves are controlled in a manner such that the target of each move is always a submatrix. Connections outside the submatrices, ie. elements marked as'l'ln the imaginary matrix, always have two alternative target submatrices, one in the direction of the row and the other in the direction of the column. A move into a submatrix is allowed if the connection is the only one using the input port and output port in question, ie. if a distinct connection is obtained in that time slot. A move in the direction of the row supersedes a move in the direction of the column because of the starting order in the main loop. Since a move is M fact a swap, the selected connection is moved into a submatrix, and also at the same time the original, or existing connection outside the submatrix, which was in the targeted row or column is moved to the original position of the selected connection. Thereby, a move in the direction of the row is performed by swapping two columns between each other. Similarly, a move in the direction of the column can be desenbed as a swap between the rows in question. The moves are performed for all connections starting from the first connection and ending at the last connection in the output array.
1 01 The algorithm in Fig. 3 starts With step 10. In the decision block 11 it is examined whether the connection is already included in a submatrix. If this is the case, execution moves on to block 18, otherwise it is examined in block 13 whether there is a free row in the submatrix in question. If not then it is examined in block 14 whether there is a free column in the submatrix in question. If no firee columin is found, the execution jumps to a recursion subroutine, which is explained in conjunction with Fig. 4. If a free column is found in block 14, a rowswap will take place in block 15 and the execution will be returned to block 11. If a free row is found in block 13, a column-swap will take place in block 17 and the execution will move on to block 18. In the decision block 18 it is examined whether the connection was the last one. If not the next connection is selected in block 19 and the execution continues from block 11, otherwise the algorithm ends at step 20.
The execution of the algorithm according to the invention can be illustrated using the case of the imaginary matrix shown in Fig. 2. The algorithm starts with the first connection in the output array, ie. the connection requested from input 3,5 to output 1, 1 in Fig. 2. This connection is not in a submatrix since the input and output time slots have different time slots, which is examined in block 11 in Fig. 3. In block 13 it is found out that the submatrix in the same row already has a connection using the same input port. Therefore, no column-swap is executed. In block 14 of Fig. 3 it is however indicated that the submatrix in the direction of the column is free, and a row-swap is performed in block 15. The matrix of Fig. 2 is updated, and the result is a table according to Fig. 5. The changed values are set in boldface and italics.
Next, it will be considered location 1, 1 in the output array. The element of this row now connects input 4,4 and output 1, 1 which means that it is not m a submatrix. The submatrix m the direction of the row has a free position and, therefore, a column-swap takes place. The first connection in the output array is thus completed. The main loop shown in Fig. 3 then continues to the next row of the imaginary matrix containing output port 2, time slot 1. This connection is already M the submatrix, so no swaps are needed. Then the next output, ie. 3,1 is examined. The connection from input 1,3 to output 3,1 is not in the submatrix, and there is no free position m the direction of the row. Then a row-swap is performed, because there is a free element in the column 3, 23) (output port 3, time slot 3) of the submatrix. At the same time, the targeted row, or the connection 2,1 --)' 3,3 is moved in the place of the row examined, whereby the connection element comes directly into the submatrix. Then the submatrix in the upper left corner is complete. The status of the 0 11 0, imaginary overall matrix is now shown in Fig. 6 inside the fi-ame with the thicker border lines.
Filling of the submatrices then goes on with the method described above.
When row- and column-swaps are performed as described above, the corresponding status arrays are also updated. A column-swap is registered in the (input Side) first status array and a row-swap is registered in the (output side) second status array.
Let us next consider a recursion situation with reference to Fig. 4. A recursion is used when neither of the possible submatrices is free for a move. That means that both submatrices are reserved, either at the input port or at the output port in question. When this happens, row- and column-swapping will continue until a free location is found. The block diagram in Fig. 3 should be complemented with these forced row- and column swaps. The recursion starts at the decision block 14 when no firee column is found, whereby the execution moves on to the recursive calculation as indicated by arrow 16.
Ilic recursive calculation resembles the recursive action in the proof algorithm described above. In the Game algorithm according to the invention, a previous selection is freed from the submatrix and at the same time it is removed from the submatrix. This corresponds to the action of the proof algorithm, in which a new solution is selected instead of the old one. Now, however, the Game algorithm is used to fill the submatrix so that a new working solution is obtained. The problem however, is that one must make sure that the Game algorithm will not become stuck in a loop when a free submatrix is fetched for a connection swapped out of a submatrix. The proof algorithm succeeds because it operates on the principle that in every remove-select step only the new solution is selected for processing. The Game algorithm according to the invention uses the same selection process when taking new connections for processing.
We will now have a look at the recursion situation. The basic structure of a big switching matrix is based on the fact that at a given moment only one connection IS present on one row or on one column. When the recursion begins, there are two 33 submatrix candidates available for the signal in question with the corresponding port reserved: one submatrix at the input side, ie. a submatrix in the row direction, and another submatix at the output side, ie. a submatrix in the column direction. Ilirough the whole recursion process, only these two submatrices will be involved 12 as the recursion will end immediately when a free location is found in one of the submatrices. This means that in the recursion connections will be moved between these submatrices until a free location is found. If the recursion then goes into a loop, swaps must take place between these two submatrices. This also means that the recursion process does not involve connections outside these two submatrices. Fig. 4 illustrates a situation with two neighbouring submatrices.
In Fig. 4, the recursion process begins with changing the location of a valid connection so that the connection is moved away from space s I, shown in the upper right comer in the figure. The move first involvesconnection b I which is moved from space s I to submatrix s3. The swap means that connections b I and b2 involved in the swap are the only connections that use a common poll which makes the swap necessary. In the figure, this port in time slot t+1, relative to which signals b I and b2 overlap, is output port 0 1. When the recursion is continued, it is required that the next forced swap involve signals that have a common port, which cannot be the same port as the common port in the preceding swap involving signal bl. In this case, the swap occurs up on the left in submatrix s2 and involves signals b2 and b3. In this case, the port common to these signals is input port 11, which means that signal b-35 has to be moved away. Then W is moved outside submatrix s2 in space s I and is moved therefrom into submatrix s3. The signal moved next, M, must again have a common port (02) with signal W. Therefore, M is moved into space s 1. The next connection is K and it is moved out of submatrix s2 because it has the same input port as connection M.
The "domino" effect of the recursion can be continued through all the available ports. To make the recursion go into a loop there has to be a connection which is swapped into the chain of forced swaps. The only available chance for a swap is M the beginning of the chain because the only unhit port is that of connection b 1, ie.
its mput port lx. In Fig. 4, Ix = 14. Since Ix also is a port that was found reserved in that connection bz and port Ix another submatrix for connection b I, this means causing the overlapping are already in another submatrix. The only way to swap connection bz with b 1 is to find another connection for port lx. Since b 1 and bz use port Ix, a third connection using the same port Ix in the area covered by the submatrices is out of the question. Therefore, there cannot occur a recursion which would cause a loop in the beginning of the swap chain. The chain reaction thus requires 2(k-1) swaps at the most to solve the connection and its placement in a submatrix through recursion. Then k corresponds to the size of the switch, le. k,,. 16. The chain swap process resembles the proof algorithm with respect to the 13 rearrangement of solutions within the submatrix, but the recursion disclosed here also solves two submatrices at the same time.
The strength of the Game algorithm is that no actual calculation processes are needed. The connections are merely moved into vacant locations in different submatrices. Another advantage of the Game algorithm IS that only connections outside the submatrices are swapped, which leaves already successful connections untouched. The swapping process also has a very useful feature: a connection moved into submatrix may force another connection immediately into a another submatrix in only one execution step. The recursion process included in the algorithm also exhibits superior properties compared to the proof algorithm. In the recursion process, connections moved out of a submatrix are used to complement another submatrix, even in a manner such that two matrices can be processed at the same time. The greatest advantage of the Game algorithm is that it begins with a collection of distinct connections, which are then rearranged, whereby, with the Game algorithm, one need not start everything from a scratch as in the proof algorithm and some other algorithms.
Since no special calculation is needed in the Game algorithm prior to selecting a move of a connection, a connection can be moved in two possible directions. A connection swap decision is made on a random basis, depending only on the distribution of the connections in the output matrix. Especially forced swaps can be used to solve random difficult situations.
0 14 0

Claims (1)

  1. Claims 1. A method for switching digital signals between given input and
    output points in a digital switch in a manner such that no more than one signal will be directed to one and the same output port in a time slot, characterized in that it comprises steps, wherein a) a kk connection request table is created with n time slots of k input ports on a row and n time slots of k output ports in a column, and the contents of an element correspond to the input port and input time slot, and from the connection request table the connections are recorded into two auxiliary tables which describe the connections from inputs to outputs and the first of which corresponds to the inputs and the second to the outputs, whereby the auxiliary tables constitute two axes of an imaginary matrix formed by the connection request table, b) nn submatrices are created on the diagonal of the matrix, c) first connection to be processed is selected, c) it is examined (11) whether the connection is in submatrix, and if it is, execution moves to step f), otherwise d) it is examined (13) whether there is a free space on the row of the connection processed in the submatrix in question, and if there is, a swap (17) is performed between the column of the connection processed and the free column in the submatrix, otherwise e) it is examined (14) whether there is a free space in the column of the connection processed in the submatrix in question, and if there is, a swap (15) is peformed between the row of the connection processed and the free row in the submatrix and the execution returns to step c), otherwise a forced row and/or column swap is performed in the recursion stage (16) and the execution returns to step c), f) it is examined (18) whether all connections in the matrix have been processed, and if this is the case, the process is ended (20), otherwise the next connection to be processed is selected (19) from the connection matrix and the execution returns to -10 step c).
    2. The method of claim 1, characte in that a submatrix corresponds to a time slot.
    The method of claim 1 or 2, characterized in that the selection in step c is directed only to a connection that has not been processed earlier.
    0.
    0 0.0 4. The method of any one of the preceding claims, characterized in that k = 16 and n = 63.
    5. The method of any, one of the preceding claims, characterized in that in said recursion stage connections are swapped between the two submatrices in question until at least one of the submatrices contains a free location.
GB9605806A 1995-03-20 1996-03-20 Configuration of digital switch Expired - Fee Related GB2299242B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI951289A FI97842C (en) 1995-03-20 1995-03-20 Configuring a digital cross connection

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GB2299242A true GB2299242A (en) 1996-09-25
GB2299242B GB2299242B (en) 1999-03-17

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552694A2 (en) * 1992-01-22 1993-07-28 Alcatel N.V. Method and circuits for realizing a modular digital cross-connect network
WO1993022858A1 (en) * 1992-04-23 1993-11-11 Nokia Telecommunications Oy Cross-connection architecture for sdh-signals comprising time- and space division switch groups
GB2281173A (en) * 1992-04-24 1995-02-22 Nokia Telecommunications Oy Method and device for configuration of a time-space-time cross-connection at occassions when the need of cross-connexion changes and use thereof
WO1995032598A2 (en) * 1994-05-25 1995-11-30 Nokia Telecommunications Oy Coupling of sdh signals in a ts's'ts's't coupling network

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552694A2 (en) * 1992-01-22 1993-07-28 Alcatel N.V. Method and circuits for realizing a modular digital cross-connect network
WO1993022858A1 (en) * 1992-04-23 1993-11-11 Nokia Telecommunications Oy Cross-connection architecture for sdh-signals comprising time- and space division switch groups
GB2281173A (en) * 1992-04-24 1995-02-22 Nokia Telecommunications Oy Method and device for configuration of a time-space-time cross-connection at occassions when the need of cross-connexion changes and use thereof
WO1995032598A2 (en) * 1994-05-25 1995-11-30 Nokia Telecommunications Oy Coupling of sdh signals in a ts's'ts's't coupling network

Also Published As

Publication number Publication date
FI97842C (en) 1997-02-25
FI951289A0 (en) 1995-03-20
GB2299242B (en) 1999-03-17
DE19611008A1 (en) 1996-09-26
FI97842B (en) 1996-11-15
FI951289A (en) 1996-09-21
GB9605806D0 (en) 1996-05-22

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