GB2297420A

GB2297420A - Read error detecting apparatus

Info

Publication number: GB2297420A
Application number: GB9601457A
Authority: GB
Inventors: Masaaki Ito; Mitsuo Yokozawa
Original assignee: Sankyo Seiki Manufacturing Co Ltd
Current assignee: Nidec Instruments Corp
Priority date: 1995-01-25
Filing date: 1996-01-25
Publication date: 1996-07-31
Anticipated expiration: 2016-01-25
Also published as: GB9601457D0; JPH08201448A; KR960029977A; GB2297420B

Description

READ ERROR DETECTING APPARATUS The present invention relates to a read error detecting apparatus for detecting a read error in the case where data recorded on a recording medium such as a card, or the like, is read out.

Heretofore, in a recording/reproducing apparatus such as a magnetic card reader, or the like, a method is generally known in which data is recorded, for example, by using a frequency F and a frequency 2F for an analog signal. In this apparatus, a method is employed in which, when the data is to be read out, the analog signal is waveshaped to obtain a digital signal 1 which is inverted at peak positions of the analog signal (see Fig. 3) and the digital signal 1 is monitored by read clock pulses generated on the basis of the wave-shaped digital signal.

That is, when an edge of the digital signal 1 obtained by analog-to-digital conversion comes, a measurement read clock pulse is generated at a time interval, for example, of T0/(1 + a). When there is any edge of the digital signal 1 in the period of T0/(1 + a), the frequency of the digital signal 1 is judged to be 2F so that read data "1" is outputted. When the next edge of the digital signal 1 comes, a measurement read clock pulse is generated at a time interval of T0/(1 + a) again. When there is no edge of the digital signal 1 in this period, the frequency of the digital signal is judged to be F so that read data "0" is outputted. In the above description, TO represents an ideal bit interval, and TO/(l + a) represents a threshold value (in which a is a value satisfying the relation 0 < a < 1).

Assume now that the n-th and (n+l)-th periods are Tn and Tn+ 1 respectively, and that, in spite of the fact that the data is "1" in the period Tn, a peak shift phenomenon arises, for example, because of deterioration of write quality so that an analog signal shifts and a peak position which should be at the time point of Tn/2 comes to a point of a value slightly larger than T0/(I + a). Then, the data which must be originally output as "1, 0" on the basis of the measurement read clock pulse signal are output as "0, 1" so that there is a possibility that a read error arises as represented by a digital signal 2 in Fig. 3.

As a data security means, generally, a horizontal parity check or a vertical parity check is known. Even if, for example, data "1, 0" are misread for "0, 1" in one frame as described above, there is no problem because such misreading can be detected by a vertical parity check while it cannot be detected by a horizontal parity check. When data "1, 0" are misread for "0, 1" in one frame, and the error data "0, 1" are then misread for "1, 0" in the same string in another frame, however, such misreading can be detected neither by a horizontal parity check nor by a vertical parity check so that there is a risk of a read error and a transaction error.

It is therefore an object of the present invention to provide a read error detecting apparatus which can detect a read error in data read from a recording medium such as a magnetic card, or the like, to thereby improve the reliability of data reading.

According to an aspect of the present invention, there is provided a read error detecting apparatus comprising: a detection means for detecting a period difference between adjacent periods of measurement read clock pulses formed on the basis of read data; and a judgement means for judging whether said period difference detected by said detection means is larger than a predetermined threshold value or not, and for detecting the error in said read data.

As described above, in the read error detecting apparatus according to the present invention, the difference between adjacent periods of measurement read clock pulses is detected by a detection means, and a judgement is made by a judgement means as to whether the period difference detected by the detection means is larger than a predetermined threshold value or not, so that a read error, for example, caused by peak shift, or the like, is detected on the basis of the result of the judgement. Accordingly, a read error which cannot be detected by a parity check can be detected in a recording/reproducing apparatus such as a magnetic card reader, or the like, so that reliability of the apparatus can be improved.

Embodiments of the invention will now be described, by way of example only, with reference to the accompanying diagrammatic figures, in which; Fig. 1 is a structural diagram showing a read error detecting apparatus according to an embodiment of the present invention.

Fig. 2 is a structural diagram showing a read error detecting apparatus according to another embodiment of the present invention.

Fig. 3 is a timing chart for explaining a conventional technique.

Embodiments of the present invention will be described below with reference to the drawings.

Referring first to Fig. 1, the principle of a read error detecting apparatus according to the present invention will be described. In the apparatus according to the present invention, a difference between adjacent periods of measurement read clock pulses is detected by a detection means 1 so that a judgement can be made as to whether the period difference detected by the detection means 1 is larger than a predetermined threshold value or not.

As described above with reference to Fig. 3, assume that the n-th and (n+l)-th periods of read data are Tn and Tn +1 respectively and that the interval Ta of a signal whose peak position must be at the time point of Tn/2 is slightly larger than T0/(l + a) in the condition of Tn+ 1/2 > T0/(1 + a). Then, for example, data "1" in the period Tn is misread for data "0". Accordingly, it is apparent that there is a high possibility of a read error in the following condition.

Tun+11 > Tn'(1 + a) or Tn+1' < Tn'/(l + a) That is, there is a high possibility of a read error in the following condition: AT = 1 Tn+1' - Tn' I 1 (1 + ss)T0 - TO in which (1 + ss)T0 - TO = PTO is a threshold value, and ss is a detection threshold value (0 < ss < 1) and is not always equal to a.

Accordingly, in the case of AT = I Tn+1' - Tn' I 1 ssT0 as a result of comparison between the measurement read clock adjacent period difference AT detected by the detection means 1 and the predetermined threshold value ssT0 in the judgement means 2 in Fig. 1, the possibility of a read error is made high so that, for example, an alarm is generated to inform the user of the error.

For example, the aforementioned detection means 1 may be configured as shown in Fig. 1. In this embodiment, a fundamental clock generator 3 generates a fundamental clock (sampling clock) pulse signal of a predetermined frequency and supplies the signal to an n-bit counter 4. The n-bit counter 4 counts the number of pulses in the fundamental clock pulse signal and supplies the count value to a first latch means 5. The n-bit counter 4 receives a measurement read clock pulse signal as an input signal through a delay circuit 8, so that the count value of the n-bit counter 4 is cleared on the basis of this input signal. As described above, the aforementioned measurement read clock pulses are formed on the basis of a digital signal inverted at peak positions of read data.

The output of the first latch means 5 is further latched by a second latch means 6.

The measurement read clock pulse signal is supplied as clock pulse signals for the first and second latch means 5 and 6. That is, the output of the n-bit counter 4 is latched by the first latch means 5 on the basis of a first measurement read clock pulse, and data A latched by the first latch means 5 on the basis of the first measurement read clock pulse is further latched by the second latch means 6 on the basis of a second measurement read clock pulse. That is, data A of the n-bit counter 4 in a new period is latched by the first latch means 5 whereas previous data (one-period-before data) B of the n-bit counter 4 is latched by the second latch means 6.

The data A latched by the first latch means 5 and the data B latched by the second latch means 6 are supplied to an arithmetic operation means 7 by which an arithmetic operation (A - B) is carried out. That is, the difference AT between the new period and the previous period in the measurement read clock pulse signal is calculated by the arithmetic operation means 7.

Then, as described above, the judgement means 2 judges whether there is any read error or not by comparison between the period difference AT and a predetermined threshold value.

As described above, in this embodiment, the difference AT between adjacent periods of measurement read clock pulses is detected by the detection means 1, and a judgement is made by the judgement means 2 as to whether the period difference AT detected by the detection means 1 is larger than a predetermined threshold value (1 + ss)T0 - TO = ssT0 or not, so that a read error, for example, caused by peak shift, or the like, is detected on the basis of the result of the judgement. Accordingly, a read error which cannot be detected by parity check can be detected in a recording/reproducing apparatus such as a magnetic card reader, or the like, so that reliability of the apparatus can be improved.

Fig. 2 is structural diagram showing a read error detecting apparatus according to another embodiment of the present invention. In this embodiment, parts the same as or equivalent to those in the previous embodiment are referenced correspondingly, and detailed description about them will be omitted to avoid duplication of description.

In the read error detecting apparatus of this embodiment, in a detection means 11, a comparison means 9 and a data selector 10 are provided between the arithmetic operation means 7 and each of the first and second latch means 5 and 6. The comparison means 9 is designed to compare the count value latched by the first latch means 5 and the count value latched by the second latch means 6. The data selector 10 is designed to select one of the count value latched by the first latch means 5 and the count value latched by the second latch means 6 on the basis of the result of the count value comparison of the comparison means 9 so that the arithmetic result of the arithmetic operation means 7 is always positive when the selected value is supplied from the data selector 10 to the arithmetic operation means 7.

Accordingly, the result of the arithmetic operation (A - B) in the arithmetic operation means 7 always takes a positive value AT = I Tn+l' - Tn' l, and the comparison l Tn+ 1' - Tn' 1 2 (1 + ss)T0 - TO = ssT0 is made in the judgement means 12.

That is, in addition to the effect of the previous embodiment, the apparatus can be improved in increase of speed without providing any software configuration or largescale hardware structure such as a CPU or the like in addition to the judgement means 12.

Although the present invention configured by the inventors has been described above specifically on the basis of embodiments, it is a matter of course that the invention is not limited to the above embodiments but various changes or modifications may be made without departing front the spirit of the present invention. For example, the configuration of the detection means 1 and 11 for detecting the difference between adjacent periods of measurement read clock pulses is not limited to the embodiments.

Further, any other medium than a magnetic card may be used as the recording medium from which data is read.

As described above, in the read error detecting apparatus according to the present invention, the difference between adjacent periods of measurement read clock pulses is detected by a detection means, and a judgement is made by a judgement means as to whether the period difference detected by the detection means is larger than a predetermined threshold value or not, so that read errors, far example, caused by peak shift, or the like, is detected on the basis of the result of the judgement. Accordingly, a read error which cannot be detected by parity check can be detected in a recording/reproducing apparatus such as a magnetic card reader, or the like, so that reliability of the apparatus can be improved.

This invention provides a read error detecting apparatus comprising: a detection means for detecting a period difference between adjacent periods of measurement read clock pulses formed on the basis of read data; and a judgement means for judging whether said period difference detected by said detection means is larger than a predetermined threshold value or not, and for detecting the possibility of error in said read data.

The aforegoing description has been given by way of example only and it will be appreciated by a person skilled in the art that modifications can be made without departing from the scope of the present invention.

Claims

CLAIMS:

1. A read error detecting apparatus comprising: a detection means (1) for detecting a period difference between adjacent periods of measurement read clock pulses formed on the basis of read data; and a judgement means (2) for judging whether said period difference detected by said detection means is larger than a predetermined threshold value or not, and for detecting the error in said read data.

2. A read error detecting apparatus according to Claim 1, wherein said detection means includes: a fundamental clock generator (3) for generating fundamental clock pulses; a counter (4) for counting the number of said fundamental clock pulses generated by said fundamental clock generator; a first latch means (5) for latching a count value of said counter when a measurement read clock pulse is input; a second latch means (6) for latching a count value of said counter when the immediately preceding measurement read clock pulse was inputted; and an arithmetic operation means (7) for calculating a difference between the count values latched by said first and second latch means.

3. A read error detecting apparatus according to Claim 2, wherein said detection means further includes: a comparison means (9) for comparing said count values latched by said first and second latch means; a data selector (10) for selecting said count values latched by said first and second latch means correspondingly to the result of comparison from said comparison means and inputting the elected values to said arithmetic operation means so that the result of the calculation of said arithmetic operation means always takes a positive value, and wherein said comparison means and said data selector are disposed between said first and second latch means and said arithmetic operation means.

4. A read error detecting apparatus according to any preceding claim, wherein said read data are data recorded on a magnetic card by using a frequency F and a frequency 2F.

5. A read error detecting apparatus according to Claim 4, wherein said measurement read clock pulses are formed on the basis of peak positions of an analog signal read from said magnetic card.